CN104572198B - A kind of service restoration method and device - Google Patents
A kind of service restoration method and device Download PDFInfo
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- CN104572198B CN104572198B CN201410855551.6A CN201410855551A CN104572198B CN 104572198 B CN104572198 B CN 104572198B CN 201410855551 A CN201410855551 A CN 201410855551A CN 104572198 B CN104572198 B CN 104572198B
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Abstract
The present embodiments relate to a kind of service restoration method and device, this method includes：When receiving system reset Restart Request, the part configuration data in chip internal state, chip internal configuration data and DRAM is preserved, the part configuration data in the DRAM is the data needed to use in DRAM initialization procedures；Configure the DRAM and switch to the second state from first state；Wherein, the DRAM sends refresh command to maintain the state data memory in the DRAM constant from peripheral control unit to the DRAM in said first condition；The DRAM controls the DRAM to perform refresh operation to maintain the state data memory in the DRAM constant by the DRAM itself in said second condition；Reset reboot operation is carried out to system；Configure the DRAM and switch to the first state from second state；Business recovery is carried out using the part configuration data in the chip internal state, chip internal configuration data and the DRAM of preservation.The present invention can effectively reduce service recovery time, reduce business interruption time.
Description
Technical field
The present embodiments relate to a kind of service restoration method and device.
Background technology
In existing facility communication system or computer system, the related configuration data of a large amount of system operations is stored in
(English full name is Dynamic Random Access Memory to dynamic RAM outside System on Chip/SoC, english abbreviation
For DRAM) in.These configuration datas play vital effect to system normal operation, if configuration data is lost, system
Interruption will occurs in business.
However, when running into the system failure or system needs upgrading, generally require to carry out reset to equipment to restart, at this moment
The configuration data being stored in the DRAM will all lose.With the increase of communication equipment bandwidth and disposal ability, DRAM
The amount of configuration data of middle storage is also increasing.Therefore, how quick recovery configuring data, reduction business interruption time are as one
The problem of individual urgent need to resolve.
There are two methods and carry out recovery configuring data when device reset is restarted in prior art, one kind is in device reset weight
Whole configuration datas in DRAM are preserved in a hard disk, again from configuration data described in disk recovery after device reset before opening；One
Kind is that configuration data is not preserved before device reset is restarted, but re-issues relevant configuration by master controller after device reset
Data are to carry out business recovery.There is the defects of allocation data recovering time is long, business interruption time is long in both approaches, special
Be not when the amount of configuration data stored in DRAM is more, time of allocation data recovering need tens seconds even a few minutes when
Between.Therefore, a kind of method and apparatus of quick-recovery business fast in system reboot are needed badly, to solve configuration existing for prior art
The problem of data recovery time is long, business interruption time is long.
The content of the invention
The embodiments of the invention provide a kind of service restoration method and device, can effectively reduce configuration during system reboot
The data recovery time, system service recovery speed is effectively improved, reduce business interruption time.
Therefore, the embodiment of the present invention provides following technical scheme：
First aspect according to embodiments of the present invention, there is provided a kind of service restoration method, methods described include：
When receiving system reset Restart Request, chip internal state, chip internal configuration data and dynamic are preserved
Part configuration data in random access memory DRAM, the part configuration data in the DRAM are in the DRAM initialization procedures
In the data that need to use；
Configure the DRAM and switch to the second state from first state；Wherein, the DRAM in said first condition by
Peripheral control unit sends refresh command to maintain the state data memory in the DRAM constant to the DRAM；The DRAM exists
The DRAM is controlled to perform refresh operation to maintain the data in the DRAM to deposit by the DRAM itself under second state
Storage state is constant；
Reset reboot operation is carried out to system；
Configure the DRAM and switch to the first state from second state；
Matched somebody with somebody using the part in the chip internal state, the chip internal configuration data and the DRAM of preservation
Put data and carry out business recovery.
In the first possible implementation of first aspect, the preservation chip internal state, the chip internal
Part configuration data in configuration data and dynamic RAM DRAM includes：
Match somebody with somebody the part preserved in chip internal state, the chip internal configuration data and dynamic RAM DRAM
Data are put to one or more of the DRAM, hard disk or host computer system.
In second of possible implementation of first aspect, the DRAM carries out reset reboot operation in the system
During be in second state.
In the third possible implementation of first aspect, the peripheral control unit is specially dram controller, institute
State the configuration DRAM switches to the second state to include from first state：
Judge whether the system is in quick reforestation practices；
If it is, the DRAM is controlled to switch to second shape from the first state by the dram controller
State.
In the 4th kind of possible implementation of first aspect, the peripheral control unit is specially dram controller, institute
Stating method also includes：
Determine the current operation mode of the dram controller；The mode of operation of the dram controller includes the first work
Pattern and the second mode of operation, wherein, the dram controller is sent to the DRAM in this first operative mode to be refreshed
Order to maintain the state data memory in the DRAM constant；The dram controller is under second mode of operation to institute
State DRAM and send reset command to change the state data memory of the DRAM；
The configuration DRAM switches to the first state to include from second state：
When it is determined that the current operation mode of the dram controller is first mode of operation, controlled by the DRAM
Device controls the DRAM to switch to the first state from second state, carries out initialization operation to the DRAM, avoids
Total space self-test operations are carried out to the data in the DRAM.
With reference to the 4th kind of possible implementation of first aspect, in the 5th kind of possible implementation of first aspect
In, methods described also includes：
When it is determined that the current operation mode of the dram controller is second mode of operation, the DRAM is carried out
Initialization operation, total space self-test operations are carried out to the data in the DRAM.
Second aspect according to embodiments of the present invention, there is provided a kind of business recovery device, described device include：
Storage unit, for when receiving system reset Restart Request, preserving chip internal state, chip internal configuration
Part configuration data in data and dynamic RAM DRAM, the part configuration data in the DRAM is described
The data needed to use in DRAM initialization procedures；
First dispensing unit, the second state is switched to from first state for configuring the DRAM；Wherein, the DRAM exists
Refresh command is sent to maintain the data storage shape in the DRAM from peripheral control unit to the DRAM under the first state
State is constant；The DRAM controls the DRAM to perform refresh operation to maintain by the DRAM itself in said second condition
The state data memory stated in DRAM is constant；
Unit is restarted in reset, for carrying out reset reboot operation to system；
Second dispensing unit, the first state is switched to from second state for configuring the DRAM；
Recovery unit, for the chip internal state, the chip internal configuration data preserved using the storage unit
And the part configuration data in the DRAM carries out business recovery.
In the first possible implementation of second aspect, the storage unit is specifically used for：
Preserve the part configuration number in chip internal state, chip internal configuration data and dynamic RAM DRAM
According to extremely in one or more of the DRAM, hard disk and host computer system.
In second of possible implementation of second aspect, the DRAM carries out reset reboot operation in the system
During be in second state.
In the third possible implementation of second aspect, the peripheral control unit is specially dram controller, institute
Stating the first dispensing unit includes：
Judging unit, for judging whether the system is in quick reforestation practices；
Switch unit, for when the judging unit judged result for be when, as the dram controller control described in
DRAM switches to second state from the first state.
In the 4th kind of possible implementation of second aspect, the peripheral control unit is specially dram controller, institute
Stating device also includes：
Determining unit, for determining the current operation mode of the dram controller；The Working mould of the dram controller
Formula includes the first mode of operation and the second mode of operation, wherein, the dram controller is in this first operative mode to institute
State DRAM and send refresh command to maintain the state data memory in the DRAM constant；The dram controller is described second
Reset command is sent to change the state data memory of the DRAM to the DRAM under mode of operation；
Second dispensing unit is specifically used for：
When it is first mode of operation that the determining unit, which determines the current operation mode of the dram controller, by
The dram controller controls the DRAM to switch to the first state from second state, the DRAM is carried out initial
Change operation, avoid carrying out total space self-test operations to the data in the DRAM.
With reference to the 4th kind of possible implementation of second aspect, in the 5th kind of possible implementation of second aspect
In, described device also includes：
Initial self-test unit, the current operation mode for determining the dram controller when the determining unit are described
During the second mode of operation, initialization operation is carried out to the DRAM, total space self-test operations are carried out to the data in the DRAM.
Service restoration method and device provided in an embodiment of the present invention, before system reset is restarted, preserve chip internal shape
State, chip internal configuration data and a small amount of DRAM configuration datas, and configure the DRAM and switch to the second shape from first state
State, wherein, the data that the DRAM can maintain itself to preserve in self-refresh state in said second condition are not lost；When
After system reset is restarted, need to only a small amount of chip internal state, chip internal configuration data and a small amount of DRAM that preserve be utilized to match somebody with somebody
Put data and carry out business recovery, thus substantially reduce the recovery time of configuration data, effectively improve system service recovery speed,
Reduce business interruption time.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments described in application, for those of ordinary skill in the art, it can also be obtained according to these accompanying drawings other
Accompanying drawing.
Fig. 1 is a kind of service restoration method schematic flow sheet provided in an embodiment of the present invention；
Fig. 2 is another service restoration method schematic flow sheet provided in an embodiment of the present invention；
Fig. 3 is dram controller control flow schematic diagram provided in an embodiment of the present invention；
Fig. 4 is the service restoration method effect diagram that prior art provides；
Fig. 5 is the service restoration method effect diagram under a kind of application scenarios of the embodiment of the present invention；
Fig. 6 is a kind of business recovery schematic device provided in an embodiment of the present invention；
Fig. 7 is another business recovery schematic device provided in an embodiment of the present invention.
Embodiment
In the prior art, when facility communication system or computer system reset are restarted, can not ensure to be stored in DRAM
Legacy data is not destroyed, and either preserves the mode of DRAM configuration datas in a hard disk, or issues DRAM by master controller
The mode of configuration data, the defects of allocation data recovering time is long, business interruption time is long be present.
Based on this, the embodiments of the invention provide a kind of service restoration method and device, can effectively reduce system reboot
When the allocation data recovering time, effectively improve system service recovery speed, reduce business interruption time.The embodiment of the present invention
Service restoration method and device can apply to facility communication system or computer system.
In order that those skilled in the art more fully understand the technical scheme in the present invention, below in conjunction with of the invention real
The accompanying drawing in example is applied, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described implementation
Example only part of the embodiment of the present invention, rather than whole embodiments.It is common based on the embodiment in the present invention, this area
The every other embodiment that technical staff is obtained under the premise of creative work is not made, should all belong to protection of the present invention
Scope.
The term used in embodiments of the present invention is only merely for the purpose of description specific embodiment, and is not intended to be limiting
The present invention." one kind ", " described " and "the" of singulative used in the embodiment of the present invention and appended claims
It is also intended to including most forms, unless context clearly shows that other implications.It is also understood that term used herein
"and/or" refers to and any or all may be combined comprising the associated list items purpose of one or more.The embodiment of the present invention
" system " can include central processor CPU and DRAM all devices, such as, " system " of the embodiment of the present invention can be with
It is computer system or communication equipment.
It is a kind of service restoration method schematic flow sheet provided in an embodiment of the present invention referring to Fig. 1, shown method includes：
S101, when receiving system reset Restart Request, preserve chip internal state, chip internal configuration data and
Part configuration data in dynamic RAM DRAM.
When the present invention implements, the situation that system sends reset Restart Request includes but is not limited to：When the soft mistake of generation
When imitating (English full name be Single Event Upset, because being abbreviated as SEU) failure, when the system failure occurs or ought be
When system has upgrade request.The system reset Restart Request can be that some business board is sent, or the system reset
Restart Request can be multiple business boards or the system reset Restart Request can be that business chip is sent, the system
It can also be that the host chip where master controller is sent to reset Restart Request.When the system reset Restart Request is by industry
Plate or business chip be engaged in when sending, when restarting to device reset, often only to breaking down or having the industry of upgrade request
Business plate or business chip carry out reset and restarted, and host chip need not often carry out reset and restart.
The DRAM is chip exterior memory, the configuration data related for storage system operation, the configuration data
The including but not limited to forward table of interchanger, flow table, routing table etc., the present invention is to this without limiting.It should be noted that industry
Business chip and host chip can be configured with respective DRAM, when receive reset Restart Request when, the data of preservation be with
Send the data for resetting that chip is associated corresponding to Restart Request.The state and configuration data of chip internal can specifically be included,
And at least part configuration data in the DRAM of chip exterior.At least part configuration data of the DRAM is described
The data needed to use in DRAM initialization procedures.Usually, need to read partial data in DRAM initialization procedures
Write operation, the state of partial data thus can be destroyed, change its state.Therefore, it is necessary to needing to make in DRAM initialization procedures
Address date is preserved, and maintains its state before business recovery.So, even if system reset behind is restarted
Afterwards, these data are destroyed due to read-write operation in DRAM initialization procedures, and pre-save described can also be utilized to match somebody with somebody on a small quantity
Put data and DRAM configuration is returned into the state before system reset is restarted.Relative to a large amount of configuration datas of DRAM storages
Speech, the quantity of the part configuration data pre-saved is a considerably less part, therefore shared space and is spent
Time is seldom, when system carries out business recovery, it is necessary to which this part configuration data recovered is because quantity is few, therefore also only needs
Less recovery time is wanted, substantially reduces service recovery time, reduces business interruption time.
Wherein, preserve in chip internal state, chip internal configuration data and dynamic RAM DRAM at least
Part configuration data includes：Preserve in chip internal state, chip internal configuration data and dynamic RAM DRAM
In at least part configuration data to one or more of the DRAM, hard disk or host computer system.
Wherein, the DRAM is in the second state during the system carries out reset reboot operation.
It should be noted that due to when the present invention implements, before system reset is restarted, the DRAM being configured to
Under the second state, the DRAM controls the DRAM to perform refresh operation by the DRAM itself in said second condition
To maintain the state data memory in the DRAM constant.That is, the DRAM is configured to self-refresh (Self
Refresh) state, in this condition, the DRAM is controlled to perform refresh operation by the DRAM itself.According to DRAM
The difference of realization, refresh command can be sent regularly to perform refresh operation from dram chip itself to the DRAM, can also
By way of timer is set, refresh operation is performed by DRAM timings.The present invention is not limited concrete implementation mode.Due to
DRAM can be controlled and itself be performed refresh operation, therefore the state data memory in the DRAM can be kept constant, Yi Jibao
The data stored in the DRAM are held not lose.Therefore, can by the chip internal state, chip internal configuration data and
At least part configuration data in the DRAM is stored in the DRAM.
Further, since the part configuration data in the chip internal state preserved, chip internal configuration data and DRAM
Data volume it is very small, therefore can also save it on one or more of hard disk or host computer system.Specifically, may be used
To save the data in the internal memory of host computer system, the internal memory of host computer system can be internal memory or the master of host chip
Outside DRAM corresponding to movement piece.Due to generally, host computer system in operation system resets restarting process and without
Reset is restarted, therefore is saved the data in host computer system it is also ensured that data are not lost.When needs carry out resetting what is restarted
When system is host computer system, at this moment, the data can be stored in the DRAM of host computer system chip exterior, and described in configuration
DRAM be in the second state be self-refresh state to ensure that data are not lost, it is of course also possible to which the data are stored in into hard disk
In.The mode of specific implementation can be very flexible, and those skilled in the art can be arranged as required to.
S102, configure the DRAM and switch to the second state from first state；Wherein, the DRAM is in the first state
Under from peripheral control unit to the DRAM send refresh command to maintain the state data memory in the DRAM constant；It is described
DRAM controls the DRAM to perform refresh operation to maintain in the DRAM by the DRAM itself in said second condition
State data memory is constant.
It should be noted that the characteristics of due to DRAM itself, data can only be kept for the very short time by it, in order to keep depositing
Storage data are not lost, and DRAM is stored using electric capacity, so must refresh (refresh) once every a period of time, if storage is single
Member is not refreshed, and the information of storage will lose, such as will lose data when shutdown or device reset are restarted.Its
In, process that DRAM electric capacity is periodically refreshed can also be considered as during entering line precharge to electric capacity, to ensure electric capacity
The data of storage are kept with enough electricity.Generally, DRAM is in external refresh state, from peripheral control unit to described
DRAM sends refresh command, controls the DRAM to perform refresh operation, to maintain the state data memory in the DRAM constant,
That is, the data of DRAM storages are kept not lose.The peripheral control unit can include dram controller, or be set outside other
It is standby.In the prior art, when being restarted due to system reset, DRAM and dram controller are not initialized, and can not be protected
Demonstrate,prove to DRAM and send enough refresh commands to ensure that DRAM data is not lost, therefore, in the prior art, equipment often be present
Reset the situation that DRAM data is all lost when restarting.The present invention is exactly to be directed to this defect, and proposing will before system reset is restarted
DRAM switches to the second state from first state, that is, switches to self-refresh state from external refresh state, is controlled by DRAM itself
Make the DRAM and perform refresh operation regularly to be refreshed, therefore state data memory in the DRAM can be kept not
Become, that is, the data for keeping storing in the DRAM are not lost.
During specific implementation, when receiving system reboot request, the DRAM can be configured by dram controller from described
First state switches to second state, and during system reboot, it is self-refresh state that DRAM, which is in the second state, in it
The configuration data that portion preserves will not lose.
Further, when receiving system reboot request, it can also first judge whether system is in quick reforestation practices,
If it is, the DRAM is controlled to switch to second state from the first state by the dram controller.If not,
Handover operation is not performed then, and at this moment in follow-up reset restarting process, DRAM will carry out initial according to normal normal process
Change operation.
S103, reset reboot operation is carried out to system.
In this step, device reset is restarted, and carries out corresponding fault recovery or updating operation.At this moment, it is necessary to protect
Card system not power down.The specific implementation of this step similarly to the prior art, will not be repeated here.
S104, configure the DRAM and switch to the first state from second state.
Configuration DRAM switches to first state from the second state, i.e., switches to external refresh state from self-refresh state.This
When, the initialization operation to DRAM interface can be completed.In initialization procedure, limited address read-write behaviour is only carried out to DRAM
Make.Correspondingly, the data for entering row address read-write operation correspond to part configuration data in the DRAM in step S101, in S101
Preservation is previously obtained, so even being written and read in initial procedure so that data are destroyed, does not also interfere with follow-up business
Recovery operation.When to DRAM initialization operations, avoid carrying out total space self-test operations to the data in the DRAM.So,
It can ensure that most data is not destroyed in DRAM internal memories.
In another implementation, the peripheral control unit is specially dram controller, may be used also before S104 is performed
With including：Determine the current operation mode of the dram controller.Wherein, the mode of operation of the dram controller includes first
Mode of operation and the second mode of operation, the dram controller is sent to the DRAM in this first operative mode refreshes life
Make to maintain the state data memory in the DRAM constant；The dram controller is under second mode of operation to described
DRAM sends reset command to change the state data memory of the DRAM.That is, dram controller is in the first Working mould
Under formula, it will send refresh command to DRAM to maintain the data storage in the DRAM not lose.Dram controller is first
Under mode of operation, dram chip is operated without resetting, to ensure that dram chip content is not destroyed, while also not to DRAM
Total space self-test is carried out, to ensure data inside chips not by considerable damage.Wherein, the dram controller is in initialization procedure
Control the DRAM to exit self-refresh state, and configure the DRAM associated configuration registers, interface Training and to limited
Address carry out self-test, the dram controller needs to send enough refresh command to the DRAM during whole operation
To maintain DRAM data storages not lose.Consider from system reliability angle, behaviour only is written and read to a small amount of addresses of the DRAM
Make, to examine the reliability of DRAM interface.The dram controller in the second operation mode, i.e., conventional normal work mould
Formula, dram chip initialization flow is operated as defined in its observes standard, and reset command is sent to the DRAM, and to described
Data in DRAM carry out total space self-test.Specifically, it is initial to carry out DRAM in the second operation mode for the dram controller
The main processing changed includes：DRAM is resetted, configures related DRAM associative modes register, interface TRAining, and is carried out complete empty
Between self-test.In this operational control device, dram controller simultaneously regularly need not send refresh command to DRAM, therefore DRAM is initial
During change, it will change its state data memory.
When it is determined that the current operation mode of the dram controller is first mode of operation, controlled by the DRAM
Device controls the DRAM to switch to the first state from second state, carries out initialization operation to the DRAM, avoids
Total space self-test operations are carried out to the data in the DRAM.Also just say, when it is determined that dram controller is the first mode of operation,
Control command will be sent to the DRAM, and control the DRAM to switch to external refresh state from self-refresh state.At this moment, start
DRAM interface initialization operation, in the process, reset operation is not carried out to DRAM, and ensure to send enough refreshings to DRAM
Order, for ensureing that DRAM data are not lost.After the completion of DRAM interface initialization, only a small amount of addresses of DRAM are read
Write operation, for verifying the reliability of DRAM interface.Meanwhile total space self-test is not carried out to DRAM, thus it will greatly save
The time that DRAM data recovers, realize the fast quick-recovery of DRAM configurations.It should be noted that when system first powers on startup,
Total space self-test has been carried out to DRAM according to old process, therefore ensure that the reliability of DRAM interface and configuration data, because
This, when reset is restarted, is only written and read operation to a small amount of DRAM addresses, without carrying out total space self-test to DRAM, also can
The reliability of guarantee system.What is more important, it is possible thereby to the risk that little data is destroyed, additionally it is possible to greatly shorten system
The time of business recovery.
S105, utilize the part in the chip internal state, chip internal configuration data and the DRAM of preservation
Configuration data carries out business recovery.
Configured using the part in the chip internal state, chip internal configuration data and the DRAM preserved in S101
Data, the configuration for completing system recover, and system configuration is returned to the state resetted before restarting, and system business function is kept with multiple
State consistency before position.
When being implemented due to the present invention, DRAM is arranged to before reset is restarted to the second state i.e. self-refresh state can be with
Ensure that most of data of DRAM storages are not lost, may be by broken except the data needed to use in DRAM initialization procedures
Bad outer, the data in DRAM are consistent before restarting with system reset.At this moment, the part in the DRAM pre-saved is recycled to match somebody with somebody
This data for being partially destroyed of the data recovery DRAM for putting data that is, needing to use and may destroying in initialization procedure, therefore
Business recovery can be rapidly realized, reduces business interruption time.
It is another service restoration method schematic flow sheet provided in an embodiment of the present invention referring to Fig. 2, methods described bag
Include：
S201, when receiving system reset Restart Request, preserve chip internal state, chip internal configuration data and
At least part configuration data in dynamic RAM DRAM.
S202, after corresponding data has been preserved, system closes corresponding service interface, interrupting service.
S203, system configuration DRAM are switched to the second state i.e. self-refresh state, and DRAM in said second condition can be with
Data storage is maintained not lose.
S204, reset reboot operation is carried out to equipment, carry out fault recovery or system upgrade operation.
S205, system configuration DRAM are switched to first state from the second state, complete DRAM interface initialization.
In this realizes step, system exits data self-refresh state by DRAM is configured, into normal mode of operation, i.e.,
Into external refresh pattern, refresh command is sent to by external memory storage, and completes the initialization of DRAM memory interfaces.Initial
During change, limited address read-write operation only is carried out to DRAM internal memories, total space Scanning Detction is not carried out to DRAM internal memories, to protect
Most data in DRAM internal memories is held not to be destroyed.
S206, data recovery chip internal state, chip internal configuration data and a small amount of DRAM preserved using S201
Configuration data, the configuration for completing system recover, and business function is kept with the state consistency before reset.
S207, opens business interface, and appliance services are recovered.
It should be noted that the embodiment of the present invention implement when, can by specific dram controller operating process,
The switching for carrying out DRAM states is not lost with ensureing that DRAM restarts internal data.With reference to flow shown in Fig. 3 to of the invention real
The control flow for applying the dram controller of example offer illustrates.
It is dram controller control flow schematic diagram provided in an embodiment of the present invention referring to Fig. 3.
S301, when there is system reboot request, judge whether current system is in quick reforestation practices.If it is, into
S302；If not, into S303.
S302, control dram chip enters self-refresh state, into S303.
S303, system reset are restarted, and when it is determined that needing to initialize DRAM, whether judge the dram controller
In the first mode of operation；If it is, into S304；If not, into S306.Wherein, dram controller is in the first Working mould
It is under formula " exiting self-refresh start-up mode ", it will enough refresh commands are regularly sent to DRAM, ensure that DRAM data is not lost
Lose.
S304, control dram chip exits self-refresh state, into S305.
S305, DRAM interface initialization.In the process, reset operation is not carried out to DRAM, without total space self-test,
Ensure to send enough refresh commands to DRAM, to complete the fast quick-recovery of system configuration.Then, into S307.
S306, DRAM interface initialization, reset operation is carried out to DRAM, and carries out total space self-test, system cache configuration
Refresh.
S307, system normal operation.
It should be noted that in one implementation, when judging current system not for fast quick-recovery in S301
During pattern, S303 judges that the step of whether dram controller is in the first mode of operation is not required in that, can also be in S301
When judging current system not for quick reforestation practices, and S306 is directly performed when system there are DRAM initial reguirements.With
Upper example is merely illustrative, and is not regarded as limitation of the present invention, and those skilled in the art can enter to above-described embodiment
Row change or deformation, belong to protection scope of the present invention.
Need to restart system during present invention could apply to need during SEU failures and restart system, flogic system failure or be
System needs to upgrade application scenarios for needing to restart etc..In system without backup protection, it is necessary to which the application scenarios of system reboot, work as system
The communication equipment of substantial amounts of configuration data is cached with internal memory, the fast quick-recovery industry of equipment can be realized by the embodiment of the present invention
Business, lifting means fault recovery speed.It is the service restoration method effect diagram that prior art provides referring to Fig. 4；Fig. 5 is this
Service restoration method effect diagram under a kind of application scenarios of inventive embodiments.From fig. 4, it can be seen that in the prior art, from
System reset will be greater than 300S to system service recovery, its time.And the method for applying the present invention, from system reset to system industry
Business recovers, and the time will foreshorten to 1S.
Method provided in an embodiment of the present invention can be used for including but not limited to FPGA, NP, cpu chip uses outside DRAM
The communication equipment of cached configuration data.Use the scheme in the present invention, it is possible to reduce configuration recovery time, realize fast quick-recovery industry
Business.
It is a kind of schematic diagram of business recovery device 600 provided in an embodiment of the present invention referring to Fig. 6.Shown device can be used
In realizing the method shown in Fig. 1 to Fig. 3.Wherein, described device 600 includes：
Storage unit 601, for when receiving system reset Restart Request, preserving chip internal state, chip internal
Part configuration data in configuration data and dynamic RAM DRAM, the part configuration data in the DRAM is in institute
State the data needed to use in DRAM initialization procedures.
First dispensing unit 602, the second state is switched to from first state for configuring the DRAM；Wherein, it is described
DRAM sends refresh command to maintain the data in the DRAM from peripheral control unit to the DRAM in said first condition
Storage state is constant；The DRAM in said second condition by the DRAM itself control the DRAM perform refresh operation with
Maintain the state data memory in the DRAM constant.
Unit 603 is restarted in reset, for carrying out reset reboot operation to system.
Second dispensing unit 604, the first state is switched to from second state for configuring the DRAM.
Recovery unit 605, for the chip internal state using storage unit preservation, chip internal configuration number
At least part configuration data according to this and in the DRAM carries out business recovery.
Further, the storage unit is specifically used for：
Preserve the part configuration number in chip internal state, chip internal configuration data and dynamic RAM DRAM
According to extremely in one or more of the DRAM, hard disk or host computer system.
Wherein, the DRAM is in second state during the system carries out reset reboot operation.
Further, the peripheral control unit is specially dram controller, and first dispensing unit includes：
Judging unit, for judging whether the system is in quick reforestation practices；
Switch unit, for when the judging unit judged result for be when, as the dram controller control described in
DRAM switches to second state from the first state.
Further, the peripheral control unit is specially dram controller, and described device also includes：
Determining unit, for determining the current operation mode of the dram controller；The Working mould of the dram controller
Formula includes the first mode of operation and the second mode of operation, wherein, the dram controller is in this first operative mode to institute
State DRAM and send refresh command to maintain the state data memory in the DRAM constant；The dram controller is described second
Reset command is sent to change the state data memory of the DRAM to the DRAM under mode of operation；
Second dispensing unit is specifically used for：
When it is first mode of operation that the determining unit, which determines the current operation mode of the dram controller, by
The dram controller controls the DRAM to switch to the first state from second state, the DRAM is carried out initial
Change operation, avoid carrying out total space self-test operations to the data in the DRAM.
Further, described device also includes：
Initial self-test unit, the current operation mode for determining the dram controller when the determining unit are described
During the second mode of operation, initialization operation is carried out to the DRAM, total space self-test operations are carried out to the data in the DRAM.
It is another schematic diagram of business recovery device 700 provided in an embodiment of the present invention referring to Fig. 7.Shown device can be with
For realizing the method shown in Fig. 1 to Fig. 3.Schematic diagram shown in Figure 7, shown business recovery device 700 may include at least one
Individual processor 701, at least one network interface 702 or other communication interfaces, memory 703, and at least one communication bus
704, for realizing the connection communication between these devices.Processor 701 is used to perform the executable mould stored in memory 703
Block, such as computer program.The processor 701 can be CPU, and memory 703 may include high-speed random access memory
(Random Access Memory, RAM), it is also possible to also including non-labile memory (non-volatile memory),
A for example, at least magnetic disk storage.By at least one network interface realize the system gateway and at least one other network element it
Between communication connection, internet, wide area network, LAN, Metropolitan Area Network (MAN) etc. can be used.
The memory 703 is used to store batch processing instruction, and the processor 701 is used to call the memory 703
The programmed instruction of storage performs following operation：
When receiving system reset Restart Request, chip internal state, chip internal configuration data and dynamic are preserved
Part configuration data in random access memory DRAM, the part configuration data in the DRAM are in the DRAM initialization procedures
In the data that need to use；
Configure the DRAM and switch to the second state from first state；Wherein, the DRAM in said first condition by
Peripheral control unit sends refresh command to maintain the state data memory in the DRAM constant to the DRAM；The DRAM exists
The DRAM is controlled to perform refresh operation to maintain the data in the DRAM to deposit by the DRAM itself under second state
Storage state is constant；
Reset reboot operation is carried out to system；
Configure the DRAM and switch to the first state from second state；
Matched somebody with somebody using the part in the chip internal state, the chip internal configuration data and the DRAM of preservation
Put data and carry out business recovery.
Wherein, the processor 701 is additionally operable to：Preserve chip internal state, the chip internal configuration data and move
At least part configuration data in state random access memory DRAM is one or more of to the DRAM, hard disk or host computer system
On.Wherein, the DRAM is in second state during the system carries out reset reboot operation.
Wherein, the processor 701 is additionally operable to：Judge whether the system is in quick reforestation practices；
If it is, the DRAM is controlled to switch to second state from the first state by dram controller.
Wherein, the processor 701 is additionally operable to：Determine the current operation mode of dram controller；The dram controller
Mode of operation include the first mode of operation and the second mode of operation, wherein, the dram controller is in first Working mould
Refresh command is sent to maintain the state data memory in the DRAM constant to the DRAM under formula；The dram controller exists
Reset command is sent to change the state data memory of the DRAM to the DRAM under second mode of operation；
When it is determined that the current operation mode of the dram controller is first mode of operation, controlled by the DRAM
Device controls the DRAM to switch to the first state from second state, carries out initialization operation to the DRAM, avoids
Total space self-test operations are carried out to the data in the DRAM.
Wherein, the processor 701 is additionally operable to：When it is determined that the current operation mode of the dram controller is described second
During mode of operation, initialization operation is carried out to the DRAM, total space self-test operations are carried out to the data in the DRAM.
Device 700 provided in an embodiment of the present invention for business recovery, by before system reset is restarted, preserving chip
Internal state, chip internal configuration data and a small amount of DRAM configuration datas, and configure the DRAM and switched to from first state
Second state, wherein, the DRAM can maintain the data itself preserved not in self-refresh state in said second condition
Lose；After system reset is restarted, a small amount of chip internal state preserved, chip internal configuration data and a small amount of need to be only utilized
DRAM configuration datas carry out business recovery, thus substantially reduce the recovery time of configuration data, it is extensive to effectively improve system business
Complex velocity, reduce business interruption time.
The introduction to device embodiment is more simple above, can refer to embodiment of the method and realizes that each device of the present invention is implemented
Example.
The present invention program can described in the general context of computer executable instructions, such as
Program unit.Usually, program unit includes performing particular task or realizes the routine of particular abstract data type, be program, right
As, component, data structure etc..The present invention program can also be put into practice in a distributed computing environment, in these Distributed Calculations
In environment, by performing task by communication network and connected remote processing devices.In a distributed computing environment, program
Unit can be located in the local and remote computer-readable storage medium including storage device.
Each embodiment in this specification is described by the way of progressive, identical similar portion between each embodiment
Divide mutually referring to what each embodiment stressed is the difference with other embodiments.It is real especially for device
For applying example, because it is substantially similar to embodiment of the method, so describing fairly simple, related part is referring to embodiment of the method
Part explanation.Device embodiment described above is only schematical, wherein described be used as separating component explanation
Unit can be or may not be physically separate, can be as the part that unit is shown or may not be
Physical location, you can with positioned at a place, or can also be distributed on multiple NEs.Can be according to the actual needs
Some or all of module therein is selected to realize the purpose of this embodiment scheme.Those of ordinary skill in the art are not paying
In the case of creative work, you can to understand and implement.
The embodiment of the present invention is described in detail above, embodiment used herein is carried out to the present invention
Illustrate, the explanation of above example is only intended to help to understand method and apparatus of the invention；Meanwhile for the one of this area
As technical staff, according to the thought of the present invention, there will be changes in specific embodiments and applications, to sum up institute
State, this specification content should not be construed as limiting the invention.
Claims (12)
1. a kind of service restoration method, it is characterised in that methods described includes：
When receiving system reset Restart Request, chip internal state, chip internal configuration data and dynamic random are preserved
Part configuration data in DRAM memory, part configuration data in the DRAM is needs in the DRAM initialization procedures
The data to be used；
Configure the DRAM and switch to the second state from first state；Wherein, the DRAM is in said first condition by outside
Controller sends refresh command to maintain the state data memory in the DRAM constant to the DRAM；The DRAM is described
The DRAM is controlled to perform refresh operation to maintain the data storage shape in the DRAM by the DRAM itself under second state
State is constant；
Reset reboot operation is carried out to system；
Configure the DRAM and switch to the first state from second state, complete the initialization operation to the DRAM,
Limited address read-write operation only is carried out to DRAM in initialization procedure, data corresponding to the limited address read-write operation are with protecting
Part configuration data in the DRAM deposited has corresponding relation；
Number is configured using the part in the chip internal state, the chip internal configuration data and the DRAM of preservation
According to progress business recovery；Wherein, the part configuration data in the DRAM is sent out for recovering the DRAM in initialization operation
The raw data changed.
2. according to the method for claim 1, it is characterised in that the preservation chip internal state, chip internal configuration number
Part configuration data according to this and in dynamic RAM DRAM includes：
Part configuration data in preservation chip internal state, chip internal configuration data and dynamic RAM DRAM is extremely
In one or more of the DRAM, hard disk and host computer system.
3. according to the method for claim 2, it is characterised in that the DRAM carries out resetting reboot operation mistake in the system
Second state is in journey.
4. according to the method for claim 1, it is characterised in that the peripheral control unit is specially dram controller, described
Configure the DRAM switches to the second state to include from first state：
Judge whether the system is in quick reforestation practices；
If it is, the DRAM is controlled to switch to second state from the first state by the dram controller.
5. according to the method for claim 1, it is characterised in that the peripheral control unit is specially dram controller, described
Method also includes：
Determine the current operation mode of the dram controller；The mode of operation of the dram controller includes the first mode of operation
With the second mode of operation, wherein, the dram controller in this first operative mode to the DRAM send refresh command
To maintain the state data memory in the DRAM constant；The dram controller is under second mode of operation to described
DRAM sends reset command to change the state data memory of the DRAM；
The configuration DRAM switches to the first state to include from second state：
When it is determined that the current operation mode of the dram controller is first mode of operation, by the dram controller control
Make the DRAM and switch to the first state from second state, initialization operation is carried out to the DRAM, avoided to institute
The data stated in DRAM carry out total space self-test operations.
6. according to the method for claim 5, it is characterised in that methods described also includes：
When it is determined that the current operation mode of the dram controller is second mode of operation, the DRAM is carried out initial
Change operation, total space self-test operations are carried out to the data in the DRAM.
7. a kind of business recovery device, it is characterised in that described device includes：
Storage unit, for when receiving system reset Restart Request, preserving chip internal state, chip internal configuration data
And the part configuration data in dynamic RAM DRAM, the part configuration data in the DRAM are at the beginning of the DRAM
The data needed to use during beginningization；
First dispensing unit, the second state is switched to from first state for configuring the DRAM；Wherein, the DRAM is described
Refresh command is sent to maintain the state data memory in the DRAM not from peripheral control unit to the DRAM under first state
Become；The DRAM controls the DRAM to perform refresh operation to remain described by the DRAM itself in said second condition
State data memory in DRAM is constant；
Unit is restarted in reset, for carrying out reset reboot operation to system；
Second dispensing unit, the first state is switched to from second state for configuring the DRAM, is completed to described
DRAM initialization operation, limited address read-write operation, the limited address read-write are only carried out to DRAM in initialization procedure
Data corresponding to operation have corresponding relation with the part configuration data in the DRAM preserved；
Recovery unit, for using the storage unit preserve the chip internal state, chip internal configuration data and
Part configuration data in the DRAM carries out business recovery；Wherein, the part configuration data in the DRAM is used to recover institute
State the data that DRAM changes in initialization operation.
8. device according to claim 7, it is characterised in that the storage unit is specifically used for：
Part configuration data in preservation chip internal state, chip internal configuration data and dynamic RAM DRAM is extremely
In one or more of the DRAM, hard disk and host computer system.
9. device according to claim 8, it is characterised in that the DRAM carries out resetting reboot operation mistake in the system
Second state is in journey.
10. device according to claim 7, it is characterised in that the peripheral control unit is specially dram controller, described
First dispensing unit includes：
Judging unit, for judging whether the system is in quick reforestation practices；
Switch unit, for when the judged result of the judging unit is is, the DRAM to be controlled by the dram controller
Second state is switched to from the first state.
11. device according to claim 7, it is characterised in that the peripheral control unit is specially dram controller, described
Device also includes：
Determining unit, for determining the current operation mode of the dram controller；The mode of operation bag of the dram controller
The first mode of operation and the second mode of operation are included, wherein, the dram controller is in this first operative mode to described
DRAM sends refresh command to maintain the state data memory in the DRAM constant；The dram controller is in second work
Reset command is sent to change the state data memory of the DRAM to the DRAM under operation mode；
Second dispensing unit is specifically used for：
When it is first mode of operation that the determining unit, which determines the current operation mode of the dram controller, by described
Dram controller controls the DRAM to switch to the first state from second state, and initialization behaviour is carried out to the DRAM
Make, avoid carrying out total space self-test operations to the data in the DRAM.
12. device according to claim 11, it is characterised in that described device also includes：
Initial self-test unit, the current operation mode for determining the dram controller when the determining unit are described second
During mode of operation, initialization operation is carried out to the DRAM, total space self-test operations are carried out to the data in the DRAM.
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| CN106712997B (en) * | 2015-11-16 | 2020-04-14 | 华为技术有限公司 | Method, equipment and system for recovering table entry |
| CN107632865B (en) * | 2017-10-24 | 2021-02-26 | 新华三技术有限公司 | FPGA configuration upgrading method and device |
| CN110633166B (en) * | 2018-06-22 | 2023-03-21 | 迈普通信技术股份有限公司 | Reset device and reset method |
| US11243831B2 (en) | 2019-07-15 | 2022-02-08 | Micron Technology, Inc. | Reset and replay of memory sub-system controller in a memory sub-system |
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| CN101546281A (en) * | 2008-03-28 | 2009-09-30 | 华为技术有限公司 | Method and device for improving reliability of embedded system |
| CN102214152A (en) * | 2010-04-01 | 2011-10-12 | 英特尔公司 | Fast exit from self-refresh state of a memory device |
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| CN1945555A (en) * | 2006-11-01 | 2007-04-11 | 华为技术有限公司 | Method and device for preventing internal storage data from losing |
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