CN104536512A - Clock management method and device based on field intensity self-adaptation - Google Patents
Clock management method and device based on field intensity self-adaptation Download PDFInfo
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Abstract
The invention provides a clock management method and device based on field intensity self-adaptation. The method includes the following steps that when a chip is weakened up, if the chip works on a non-contact interface and can make a field intensity self-adaptation clock to switch parameters, an objective clock control module obtains an objective clock value and sends the objective clock value to a clock frequency switching control module according to a received value of a field intensity index signal; the clock frequency switching control module adjusts a clock frequency selection value and outputs the adjusted clock frequency selection value to a clock switching module according to the received objective clock value; the clock switching module outputs a clock frequency result value according to the received clock frequency selection value. According to the method, adopted hardware configures the clock frequency at which the chip works according to the magnitude of the external field intensity and the clock frequency is gradually switched to the corresponding objective clock frequency, so a clock management scheme based on field intensity self-adaptation is achieved.
Description
Technical field
The invention belongs to clock control field, particularly relate to a kind of based on the adaptive clock management method of field intensity and device.
Background technology
Clock management is exactly always the key of chip development design, it is the basis of whole chip stability and high efficiency work, good clock management method not only can improve whole chip travelling speed and also can the power consumption of dynamically control chip, the change of outside field intensity can be adapted to, increase the safety and stability of chip operation.
When contactless card and double-interface card only have non-contact interface to work, no matter outside field intensity height all adopt the clock of same frequency easily make chip due to outside field intensity too low and cause power-off reset abnormal, in order to meet the requirement that low field normally works, can under setting chip be operated in lower clock frequency, but this greatly can affect chip performance.
Traditional clock switching mode has two schemes, and scheme one directly switches clock frequency to target clock frequency, and such scheme is easy to cause chip, and because transient power consumption change is excessive, too fast, power-off reset that is that cause is abnormal; Scheme two progressively switches clock frequency to target clock frequency by software, but this mode makes clock frequency switch the increase of the time cost several times of institute's cost, and the operation of software is comparatively complicated.These two kinds of modes are all by software merit rating and initiate the action that clock switches, and can not regulate the frequency of operation of chip according to the change of the height of outside field intensity, easily make chip due to outside field intensity too low and cause power-off reset abnormal.
Be described in detail below in conjunction with Fig. 1:
As shown in Figure 1, clock frequency is followed successively by clk0_i from high to low, clk1_i, clk2_i ... .clkn_i.
Scheme one be operating as configuration register sel_clk_con [3:0]=4 ' b0000-->>4 ' b1000, namely be directly switched to high frequency clock from low-frequency clock, this mode makes chip change to suddenly the state of a higher power dissipation by the state of lower power consumption.
Scheme two is operating as configuration register sel_clk_con [3:0]=4 ' b0000-->>4 ' b0001-->>4 ' b0010-->>4 ' b0100-->>4 ' b1000, namely collocation in successive steps sel_clk_con [3:0] is passed through by software, reach and progressively switch clock frequency by low frequency to high frequency, this mode clock frequency switch speed is slow, and software operation is comparatively complicated.
Above two kinds of modes all need to carry out configuration register sel_clk_con [3:0] by software by CPU, just can carry out clock switching, can not carry out the frequency of operation of Automatic adjusument chip according to the height change of outside field intensity.
Summary of the invention
The invention provides a kind of based on the adaptive clock management method of field intensity and device, to solve the problem.
The present invention also provides a kind of based on the adaptive clock management method of field intensity, comprises the following steps:
When chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module is according to the value of the field strength indicating signal received, and obtains object clock value and described object clock value is sent to clock frequency to switch control module;
Described clock frequency switches control module according to the object clock value received, and adjustment clock frequency selective value also exports the described clock frequency selective value after adjustment to clock switchover module;
Described clock switchover module according to receive described clock frequency selective value, output clock frequency resultant value.
The present invention also provides a kind of based on the adaptive Clock management device of field intensity, comprises object clock control module, clock frequency switches control module, clock switchover module; Wherein, described object clock control module is connected with described clock switchover module by described clock frequency switching control module;
Described object clock control module, when being waken up for chip, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then according to the value of the field strength indicating signal received, obtain object clock value and also described object clock value is sent to clock frequency and switches control module;
Described clock frequency switches control module, for according to the object clock value received, adjusts clock frequency selective value and also exports the described clock frequency selective value after adjustment to clock switchover module;
Described clock switchover module, for the described clock frequency selective value according to reception, output clock frequency resultant value.
Compared to prior art, according to one provided by the invention based on the adaptive clock management method of field intensity and device, adopt hardware according to the clock frequency of the height configuring chip work of outside field intensity, and be progressively switched to corresponding object clock frequency, achieve the adaptive clock management scheme of a kind of field intensity, make the clock frequency of chip operation can adapt to outside field intensity better, while guarantee chip performance, make chip compatible better in the card reader of various field intensity.In addition, because the power module adopted in each chip is different, so the ability to bear of chip to transient power consumption has difference, the switching time that interface can adjust clock frequency is left in invention, to adapt to different chip application, the switching time of clock frequency can be controlled by configuration clk_sw_value [3:0] when chip design.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide a further understanding of the present invention, and form a application's part, schematic description and description of the present invention, for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Figure 1 shows that the clock switch circuit figure of prior art;
Figure 2 shows that the embodiment of the present invention 2 based on the adaptive Clock management system construction drawing of field intensity;
Figure 3 shows that the impulse-free robustness commutation circuit schematic diagram based on adaptive four clocks of field intensity of the embodiment of the present invention 3;
Figure 4 shows that the clock based on field intensity adaptive software merit rating object clock of the embodiment of the present invention 4 switches schematic diagram;
When Figure 5 shows that the dormancy adaptive based on field intensity of the embodiment of the present invention 5, clock frequency switches schematic diagram downwards;
When Figure 6 shows that the waking up based on field intensity the is adaptive of embodiment of the present invention 6, clock frequency upwards switches schematic diagram;
When Figure 7 shows that the waking up based on field intensity the is adaptive of embodiment of the present invention 7, clock frequency upwards switches schematic diagram;
Figure 8 shows that the embodiment of the present invention 8 based on the adaptive clock management method process flow diagram of field intensity;
Figure 9 shows that the embodiment of the present invention 9 based on the adaptive clock management method process flow diagram of field intensity;
Figure 10 shows that the embodiment of the present invention 10 based on the adaptive Clock management structure drawing of device of field intensity.
Embodiment
Hereinafter also describe the present invention in detail with reference to accompanying drawing in conjunction with the embodiments.It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.
Figure 2 shows that the embodiment of the present invention 2 based on the adaptive Clock management system construction drawing of field intensity, comprising: clock frequency division module clk_div, object clock control module clk_dst_ctrl, clock frequency switch control module clk_ctrl, clock switchover module clk_sw.
Object clock control module clk_dst_ctrl switches control module clk_ctrl by clock frequency and is connected with clock switchover module clk_sw; Described clock frequency division module clk_div is connected with described clock switchover module clk_sw.
The clock signal that crystal oscillator clk_osc produces, divide by clock frequency division module clk_div 7 clock signals (clk_g_1 to clk_g_7) that occur frequently, wherein, from clk_g_1 to clk_g_7, clock frequency increases progressively.
G1 is fixed as the minimum clk_g_1 of clock frequency, and software arranges the clock signal (clock frequency that G1 to G4 selects is necessary for and increases progressively successively) of each group selection of G2, G3 and G4 when chip power-up initializing.
Clk_dst_reg value is configured in advance at object clock register clk_dst_reg.
During chip dormancy, object clock control module clk_dst_ctrl Lookup protocol clk_dst value is 0, and clk_out is automatically switched to clk_g_1; When chip is waken up, if now only have non-contact interface work and enable field intensity self-adaptation clock switching autosw_fs_en=1, then object clock control module clk_dst_ctrl arranges clk_dst value according to the value of field strength indicating signal, and clk_out is switched to corresponding clock frequency; If now for two interface works or not enable field intensity self-adaptation clock switches simultaneously, then clk_dst value is set to object clock register clk_dst_reg value by object clock control module clk_dst_ctrl, once clk_dst value changes, clock will be started switch, clock frequency switches control module clk_ctrl will change clk_sel value automatically, until clk_sel value equals clk_dst value and is that clock has switched after (clk_sw_value+1) individual clk.
Under different field intensity, clock frequency used is that software configures when initialization, dst_fsl value, dst_fsm value and dst_fsh value distinguish corresponding low field, midfield and High-Field time object clock value.
The value of object clock clk_dst value and hdet1_reg and the value contrast relationship table of hdet2_reg, as shown in table 1:
| Hdet2_reg value | 0 | 0 | 1 |
| Hdet1_reg value | 0 | 1 | * |
| Clk_dst value | Dst_fsl value | Dst_fsm value | Dst_fsh value |
Table 1
As shown in Figure 3, the impulse-free robustness commutation circuit of four clocks in clk_sw modular circuit, because the power module adopted in each chip is different, so the ability to bear of chip to transient power consumption has difference, the switching time that interface can adjust clock frequency is left, to adapt to different chip application in the design.The switching time of clock frequency can be controlled by configuration clk_sw_value [3:0] when chip design.
When chip design, can minimum by the value of configuration clk_sw_value be 1, corresponding insertion waits for that clock clk number is clk_sw_value+1, and namely clk_sel often crosses (clk_sw_value+1) individual clock period change once.
Figure 4 shows that the clock based on field intensity adaptive software merit rating object clock of the embodiment of the present invention 4 switches schematic diagram, wherein, clk_sw_value [3:0]=3.
As software configuration register clk_dst_reg, clk_dst value can be updated to clk_dst_reg value, and starts to carry out clock switching.Clk_out is progressively switched to high frequency clock by low-frequency clock, and clk_sel often crosses 4 clock period changes once.
When Figure 5 shows that the dormancy adaptive based on field intensity of the embodiment of the present invention 5, clock frequency switches schematic diagram downwards, during dormancy, clk_dst value is configured to 0, clk_out and is progressively switched to low-frequency clock by high frequency clock by clk_dst_ctrl module, and clk_sel often crosses 4 clock period changes once.
When Figure 6 shows that the waking up based on field intensity the is adaptive of embodiment of the present invention 6, clock frequency upwards switches schematic diagram, when waking up, autosw_fs_en value is 1, hdet2_reg value is 0, hdet1_reg value is 1, clk_dst value is configured to dst_fsm value by clk_dst_ctrl module, and clk_out is progressively switched to high frequency clock by low-frequency clock, and clk_sel often crosses 4 clock period changes once.
When Figure 7 shows that the waking up based on field intensity the is adaptive of embodiment of the present invention 7, clock frequency upwards switches schematic diagram, when waking up, autosw_fs_en value is 0, hdet2_reg value is 0, hdet1_reg value is 1, clk_dst value is configured to clk_dst_reg value by clk_dst_ctrl module, and clk_out is progressively switched to high frequency clock by low-frequency clock, and clk_sel often crosses 4 clock period changes once.
Figure 8 shows that the embodiment of the present invention 8 based on the adaptive clock management method process flow diagram of field intensity, comprise the following steps:
Step 801: clock frequency division module clk_div carries out frequency division after obtaining the clock signal of crystal vibrator clk_osc generation;
Wherein, the clock frequency of the clock signal occured frequently is divided to increase progressively successively.
As shown in Figure 2, the clock signal that crystal oscillator clk_osc produces, divide by clock frequency division module clk_div 7 clock signals (clk_g_1 to clk_g_7) that occur frequently, wherein, from clk_g_1 to clk_g_7, clock frequency increases progressively.
Step 802: when chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module is according to the value of the field strength indicating signal received, and obtains object clock value;
Wherein, field intensity self-adaptation clock handoff parameter is autosw_fs_en, and enable field intensity self-adaptation clock handoff parameter refers to autosw_fs_en=1.
When chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module clk_dst_ctrl is according to the value of field strength indicating signal hdet1_reg received and the value of field strength indicating signal hdet2_reg, obtains object clock clk_dst value.
When chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module clk_dst_ctrl is according to the value of field strength indicating signal hdet1_reg received and the value of field strength indicating signal hdet2_reg, inquiry object clock clk_dst value and the value of hdet1_reg and the value contrast relationship table of hdet2_reg, acquisition object clock clk_dst value.
During chip dormancy, object clock control module clk_dst_ctrl Lookup protocol clk_dst value is 0, and clk_out is automatically switched to clk_g_1.
When chip is waken up, if now for two interface works or not enable field intensity self-adaptation clock switches simultaneously, then clk_dst value is set to object clock register clk_dst_reg value by object clock control module clk_dst_ctrl;
When chip is waken up, if now for two interface works or not enable field intensity self-adaptation clock switches simultaneously, before then clk_dst value is set to object clock register clk_dst_reg value by object clock control module clk_dst_ctrl, also comprise: configure clk_dst_reg value at object clock register clk_dst_reg in advance.
Once clk_dst value changes, clock will be started switch, clock frequency switches control module clk_ctrl will change clk_sel value automatically, until clk_sel value equals clk_dst value and is that clock has switched after (clk_sw_value+1) individual clk.
Step 803: the object clock value of acquisition and clk_dst value are sent to described clock frequency and switch control module clk_ctrl by object clock control module;
Step 804: described clock frequency switches control module clk_ctrl according to the object clock value received and clk_dst value, and adjustment clock frequency selective value and clk_sel value, until described clock frequency selective value is equal with described object clock value;
Step 805: described clock frequency switching control module clk_ctrl output clock He Ne laser value and clk_sel value are to clock switchover module clk_sw;
Step 806: described clock switchover module clk_sw according to receive described clock frequency selective value, output clock frequency resultant value (clk_out value).
Wherein, described clock switchover module clk_sw controls the switching time of clock frequency by configuration clk_sw_value [3:0].
Figure 9 shows that the embodiment of the present invention 9 based on the adaptive clock management method process flow diagram of field intensity, comprise the following steps:
Step 901: when chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module is according to the value of the field strength indicating signal received, and obtains object clock value and described object clock value is sent to clock frequency to switch control module;
Step 902: described clock frequency switches control module according to the object clock value received, adjustment clock frequency selective value also exports the described clock frequency selective value after adjustment to clock switchover module;
Step 903: described clock switchover module according to receive described clock frequency selective value, output clock frequency resultant value.
Figure 10 shows that the embodiment of the present invention 10 based on the adaptive Clock management structure drawing of device of field intensity, comprise object clock control module, clock frequency switch control module, clock switchover module; Wherein, described object clock control module is connected with described clock switchover module by described clock frequency switching control module;
Described object clock control module, when being waken up for chip, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then according to the value of the field strength indicating signal received, obtain object clock value and also described object clock value is sent to clock frequency and switches control module;
Described clock frequency switches control module, for according to the object clock value received, adjusts clock frequency selective value and also exports the described clock frequency selective value after adjustment to clock switchover module;
Described clock switchover module, for the described clock frequency selective value according to reception, output clock frequency resultant value.
Compared to prior art, according to one provided by the invention based on the adaptive clock management method of field intensity and device, adopt hardware according to the clock frequency of the height configuring chip work of outside field intensity, and be progressively switched to corresponding object clock frequency, achieve the adaptive clock management scheme of a kind of field intensity, make the clock frequency of chip operation can adapt to outside field intensity better, while guarantee chip performance, make chip compatible better in the card reader of various field intensity.In addition, because the power module adopted in each chip is different, so the ability to bear of chip to transient power consumption has difference, the switching time that interface can adjust clock frequency is left in invention, to adapt to different chip application, the switching time of clock frequency can be controlled by configuration clk_sw_value [3:0] when chip design.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1., based on the adaptive clock management method of field intensity, it is characterized in that, comprise the following steps:
When chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module is according to the value of the field strength indicating signal received, and obtains object clock value and described object clock value is sent to clock frequency to switch control module;
Described clock frequency switches control module according to the object clock value received, and adjustment clock frequency selective value also exports the described clock frequency selective value after adjustment to clock switchover module;
Described clock switchover module according to receive described clock frequency selective value, output clock frequency resultant value.
2. method according to claim 1, is characterized in that, the described clock frequency selective value after adjustment is equal with described object clock value.
3. method according to claim 1, it is characterized in that, described object clock control module refers to clk_dst_ctrl, described object clock value refers to clk_dst value, described clock frequency switches control module and refers to clk_ctrl, described clock frequency selective value refers to clk_sel value, and described clock switchover module refers to clk_sw, and described clock frequency end value refers to clk_out value.
4. method according to claim 3, it is characterized in that, when chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module clk_dst_ctrl is according to the value of field strength indicating signal hdet1_reg received and the value of field strength indicating signal hdet2_reg, obtains object clock clk_dst value.
5. method according to claim 4, it is characterized in that, when chip is waken up, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then object clock control module clk_dst_ctrl is according to the value of field strength indicating signal hdet1_reg received and the value of field strength indicating signal hdet2_reg, inquiry object clock clk_dst value and the value of hdet1_reg and the value contrast relationship table of hdet2_reg, acquisition object clock clk_dst value.
6. method according to claim 3, it is characterized in that, if two interface works or not enable field intensity self-adaptation clock switches simultaneously, then clk_dst value is set to object clock register clk_dst_reg value by object clock control module clk_dst_ctrl.
7. method according to claim 6, it is characterized in that, if two interface works or not enable field intensity self-adaptation clock switches simultaneously, before then clk_dst value is set to object clock register clk_dst_reg value by object clock control module clk_dst_ctrl, also comprise: configure clk_dst_reg value at object clock register clk_dst_reg in advance, field intensity self-adaptation clock handoff parameter is autosw_fs_en, and enable field intensity self-adaptation clock handoff parameter refers to autosw_fs_en=1.
8. method according to claim 1, is characterized in that, described clock switchover module controls the switching time of clock frequency by configuration clk_sw_value [3:0].
9. method according to claim 1, is characterized in that, before chip is waken up, also comprises: clock frequency division module clk_div carries out frequency division after obtaining the clock signal of crystal vibrator clk_osc generation; Wherein, the clock frequency of the clock signal occured frequently is divided to increase progressively successively.
10. based on the adaptive Clock management device of field intensity, it is characterized in that, comprise object clock control module, clock frequency switches control module, clock switchover module; Wherein, described object clock control module is connected with described clock switchover module by described clock frequency switching control module;
Described object clock control module, when being waken up for chip, if in non-contact interface work and enable field intensity self-adaptation clock handoff parameter, then according to the value of the field strength indicating signal received, obtain object clock value and also described object clock value is sent to clock frequency and switches control module;
Described clock frequency switches control module, for according to the object clock value received, adjusts clock frequency selective value and also exports the described clock frequency selective value after adjustment to clock switchover module;
Described clock switchover module, for the described clock frequency selective value according to reception, output clock frequency resultant value.
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| CN201410818440.8A CN104536512B (en) | 2014-12-24 | 2014-12-24 | A kind of clock management method and device adaptive based on field strength |
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