CN104506301A - Implementation of 0.6-order xy-containing Liu chaotic system circuit on basis of T-shaped fractional integration circuit module - Google Patents

Abstract

The present invention provides a 0.6-order xy-containing Liu chaotic system circuit based on a T-type fractional-order integral circuit module. The T-type fractional-order integral circuit module is composed of six parts. The first part is connected in series with four resistors and a potentiometer. Four capacitors are connected in parallel, and the next five parts are composed of four resistors and a potentiometer in series, and then connected in series with the parallel parts of four capacitors. The present invention adopts a T-shaped structure, designs and manufactures a PCB circuit, and a 0.6-order fractional-order integral circuit is composed of six parts. Using this method to realize a 0.6-order fractional-order chaotic system circuit has high reliability and is not easy to make mistakes.

Description

Realization of 0.6-order Liu chaotic system with xy based on T-type fractional-order integral circuit module

technical field

The invention relates to a general fractional-order integral circuit module and its 0.6-order chaotic system circuit realization, in particular to a 0.6-order xy-containing Liu chaotic system and an analog circuit realization of a general fractional-order integral circuit module based on a T-shaped structure.

Background technique

Because the resistance and capacitance of the circuit to realize the fractional order chaotic system are unconventional resistance and capacitance, the method of connecting resistance in series and capacitance in parallel is generally used to realize it. At present, the main method of realization is to use the existing resistance and capacitance to combine on the breadboard. method, the reliability and stability of this method are relatively low, and there are problems such as error-prone and difficult to find after making mistakes. In order to overcome this problem, the present invention adopts a T-shaped structure to design and manufacture a PCB circuit. The whole circuit module circuit consists of six parts Composition, the first part is composed of four resistors and a potentiometer in series, and four capacitors in parallel, the next five parts are composed of four resistors and a potentiometer in series, and four capacitors in parallel, 0.6 order fraction The first-order integral circuit is composed of six parts. Using this method to realize the 0.6-order fractional-order chaotic system circuit has high reliability and is not easy to make mistakes.

Contents of the invention

The technical problem to be solved in the present invention is to provide a kind of 0.6 order Liu chaotic system containing xy and analog circuit realization based on the fractional order integral circuit module of T-type structure, the present invention adopts following technical means to realize the object of the invention:

1. A T-type general fractional order integral circuit module, characterized in that: resistance Rx is connected in parallel with capacitance Cx to form the first part, resistance Ry is connected in series with capacitance Cy to form the second part, resistance Rz is connected in series with capacitance Cz to form the second part Three parts, the resistor Rw is connected in series with the capacitor Cw to form the fourth part, the resistor Ru is connected in series with the capacitor Cu to form the fifth part, the resistor Rv is connected in series with the capacitor Cv to form the sixth part, and the first part and the next five parts are connected in parallel.

2. A T-type universal fractional-order integral circuit module according to claim 1, wherein the resistor Rx is composed of a potentiometer Rx1 and resistors Rx2, Rx3, Rx4, and Rx5 in series, and the capacitor Cx is composed of a capacitor Cx1 . It is composed of potentiometer Rz1 and resistors Rz2, Rz3, Rz4, Rz5 in series, the capacitor Cz is composed of capacitors Cz1, Cz2, Cz3, Cz4 in parallel; the resistor Rw is composed of potentiometer Rw1 and resistors Rw2, Rw3, Rw4, Rw5 in series The capacitor Cw is composed of capacitors Cw1, Cw2, Cw3, and Cw4 connected in parallel; the resistor Ru is composed of a potentiometer Ru1 and resistors Ru2, Ru3, Ru4, and Ru5 in series, and the capacitor Cu is composed of capacitors Cu1, Cu2, Cu3, Cu4 is connected in parallel; the resistor Rv is composed of a potentiometer Rv1 and resistors Rv2, Rv3, Rv4, and Rv5 in series, and the capacitor Cv is composed of capacitors Cv1, Cv2, Cv3, and Cv4 in parallel.

3. A T-type universal fractional order integral circuit module according to claim 1, said 0.6 order integral circuit module, is characterized in that: said resistance Rx=15.85M, said potentiometer Rx1=0K, said resistance Rx2=15M, Rx3=820K, Rx4=20K, Rx5=10K, the capacitor Cx=0.09261uF, the capacitor Cx1=68nF, Cx2=22nF, Cx3=2.2nF, Cx4 floating; the resistor Ry=12.32M , the potentiometer Ry1=0K, the resistor Ry2=10M, Ry3=2M, Ry4=220K, Ry5=100K, the capacitor Cy=1.749uF, the capacitor Cy1=1.5uF, Cy2=220nF, Cy3= 22nF, Cy4=6.8nF; the resistor Rz=3.500M, the potentiometer Rz1=0K, the resistor Rz2=3.3M, Rz3=200K, Rz4=0K, Rz5=0K, the capacitor Cz=0.9036uF , the capacitor Cz1=680nF, Cz2=220nF, Cz3=3.3nF, Cz4 suspended; the resistor Rw=1.091M, the potentiometer Rw1=0K, the resistor Rw2=1M, Rw3=51K, Rw4=20K , Rw5=20K, the capacitance Cw=0.4254uF, the capacitance Cw1=220nF, Cw2=100nF, Cw3=100nF, Cw4=4.7nF; the resistance Ru=0.3486M, the potentiometer Ru1=3.5K, The resistance Ru2=330K, Ru3=10K, Ru4=5.1K, Ru5=0K, the capacitance Cu=0.1954uF, the capacitance Cu1=150nF, Cu2=33nF, Cu3=10nF, Cu4=2.2nF; Resistance Rv=0.1203M, the potentiometer Rv1=0.3K, the resistance Rv2=100K, Rv3=20K, Rv4=0K, Rv5=0K, the capacitance Cv=0.08311uF, the capacitance Cv1=47nF, Cv2 =33nF, Cv3=3.3nF, Cv4 is suspended.

4. The 0.6-order Liu chaotic system circuit containing xy based on the T-type general-purpose fractional-order integral circuit module is characterized in that:

(1) The Liu chaotic system i with xy is:

$\left\{\begin{array}{ccc}\frac{\mathrm{<span\; class="notranslate">\; dx</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& & \\ \frac{\mathrm{<span\; class="notranslate">\; dy</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}\\ \frac{\mathrm{<span\; class="notranslate">\; dz</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}& & \end{array}\right.$

(2) The 0.6 order Liu chaotic system ii with xy is:

$\left\{\begin{array}{ccc}\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; x</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& & \\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0.4</span>}\\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; z</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}& & \end{array}\right.$

(3) Construct the analog circuit according to the 0.6-order Liu chaotic system ii containing xy, and use the operational amplifier U1, operational amplifier U2 and resistors and the 0.6-order integral circuit module U5, the 0.6-order integral circuit module U6, and the 0.6-order integral circuit module U7 to form an inverse Adding adder and inverting 0.6 order integrator, utilize multiplier U3 and multiplier U4 to realize multiplication operation, described operational amplifier U1 and operational amplifier U2 adopt LF347N, described multiplier U3 and multiplier U4 adopt AD633JN;

The operational amplifier U1 is connected to the operational amplifier U2, the multiplier U3, the multiplier U4 and the 0.6-order integral circuit module U5 and the 0.6-order integral circuit module U6, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U4 and the 0.6-order integral circuit Module U7, the multiplier U3 is connected to the operational amplifier U1, and the multiplier U4 is connected to the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the sixth pin of U1 through a resistor R8, the second pin is connected to the first pin through a resistor R6, and the third, fifth, tenth and twelfth pins are grounded, The 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin is connected to the P pin of the T-type fractional-order integral circuit U7, the 7th pin is connected to the output y, and the 13th pin is connected through the resistor R1. Connect to the P2 pin of the T-type fractional-order integral circuit U8, connect the 8th pin to the output x, connect to the 9th pin through the resistor R4, connect to the 2nd pin through the resistor R5, and connect to the 1st pin of the multiplier U3 Pin, connected to the first pin of the multiplier U4, connected to the P2 pin of the T-type fractional integration circuit U6, the ninth pin connected to the P pin of the T-type fractional integration circuit U5, and the 13th pin through the resistor R2 It is connected to the 14th pin, and the 14th pin is connected to the 9th pin through the resistor R3;

The 1st, 2nd, 6th, and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 8th pin outputs z , connected to the 9th pin through the resistor R12, connected to the 3rd pin of the multiplier U3, connected to the P2 pin of the T-shaped fractional-order integral circuit U10, and connected to the P of the T-shaped fractional-order integral circuit U9 pin, the 13th pin is connected to the 14th pin through the resistor R10, and the 14th pin is connected to the 9th pin through the resistor R11;

The first pin of the multiplier U3 is connected to the eighth pin of U1, the third pin is connected to the eighth pin of U2, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin is connected to VEE. The pin is connected to the 6th pin of U1 through the resistor R7, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the eighth pin of U1, the third pin is connected to the seventh pin of U1, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin Connect the 13th pin of U2 through the resistor R9, and connect the 8th pin to VCC.

The A pin of the 0.6-order integral circuit module U5 is connected to the ninth pin of the operational amplifier U1, and the B pin is connected to the eighth pin of the operational amplifier U1;

The A pin of the 0.6-order integral circuit module U6 is connected to the sixth pin of the operational amplifier U1, and the B pin is connected to the seventh pin of the operational amplifier U1;

The A pin of the 0.6-order integral circuit module U7 is connected to the ninth pin of the operational amplifier U2, and the B pin is connected to the eighth pin of the operational amplifier U2.

The beneficial effects of the present invention are: a T-shaped structure is adopted to design and manufacture a PCB circuit. The circuit is composed of six parts. The first part is composed of four resistors and a potentiometer in series and connected in parallel with four capacitors. The latter five parts are all composed of four After a resistor and a potentiometer are connected in series, they are connected in series with four capacitors in parallel. The T-type 0.6-order general integration circuit is composed of six parts. Using this method to realize a 0.6-order fractional order chaotic system circuit has high reliability and is not easy. error.

Description of drawings

Fig. 1 is a schematic diagram of the internal structure (a) of the chain-type fractional-order integral circuit module of the present invention, an internal actual connection diagram (b) and a 0.6-order integral circuit module diagram (c).

Fig. 2 is a schematic diagram of the circuit connection structure of the preferred embodiment of the present invention.

Fig. 3 and Fig. 4 are the actual connection diagrams of the circuit of the present invention.

Detailed ways

The present invention will be described in further detail below in conjunction with the accompanying drawings and preferred embodiments, see Fig. 1-Fig. 4 .

1. A T-type general fractional order integral circuit module, characterized in that: resistance Rx is connected in parallel with capacitance Cx to form the first part, resistance Ry is connected in series with capacitance Cy to form the second part, resistance Rz is connected in series with capacitance Cz to form the second part Three parts, the resistor Rw is connected in series with the capacitor Cw to form the fourth part, the resistor Ru is connected in series with the capacitor Cu to form the fifth part, the resistor Rv is connected in series with the capacitor Cv to form the sixth part, and the first part and the next five parts are connected in parallel.

2. A T-type universal fractional-order integral circuit module according to claim 1, wherein the resistor Rx is composed of a potentiometer Rx1 and resistors Rx2, Rx3, Rx4, and Rx5 in series, and the capacitor Cx is composed of a capacitor Cx1 . It is composed of potentiometer Rz1 and resistors Rz2, Rz3, Rz4, Rz5 in series, the capacitor Cz is composed of capacitors Cz1, Cz2, Cz3, Cz4 in parallel; the resistor Rw is composed of potentiometer Rw1 and resistors Rw2, Rw3, Rw4, Rw5 in series The capacitor Cw is composed of capacitors Cw1, Cw2, Cw3, and Cw4 connected in parallel; the resistor Ru is composed of a potentiometer Ru1 and resistors Ru2, Ru3, Ru4, and Ru5 in series, and the capacitor Cu is composed of capacitors Cu1, Cu2, Cu3, Cu4 is connected in parallel; the resistor Rv is composed of a potentiometer Rv1 and resistors Rv2, Rv3, Rv4, and Rv5 in series, and the capacitor Cv is composed of capacitors Cv1, Cv2, Cv3, and Cv4 in parallel.

3. A T-type universal fractional order integral circuit module according to claim 1, said 0.6 order integral circuit module, is characterized in that: said resistance Rx=15.85M, said potentiometer Rx1=0K, said resistance Rx2=15M, Rx3=820K, Rx4=20K, Rx5=10K, the capacitor Cx=0.09261uF, the capacitor Cx1=68nF, Cx2=22nF, Cx3=2.2nF, Cx4 floating; the resistor Ry=12.32M , the potentiometer Ry1=0K, the resistor Ry2=10M, Ry3=2M, Ry4=220K, Ry5=100K, the capacitor Cy=1.749uF, the capacitor Cy1=1.5uF, Cy2=220nF, Cy3= 22nF, Cy4=6.8nF; the resistor Rz=3.500M, the potentiometer Rz1=0K, the resistor Rz2=3.3M, Rz3=200K, Rz4=0K, Rz5=0K, the capacitor Cz=0.9036uF , the capacitor Cz1=680nF, Cz2=220nF, Cz3=3.3nF, Cz4 suspended; the resistor Rw=1.091M, the potentiometer Rw1=0K, the resistor Rw2=1M, Rw3=51K, Rw4=20K , Rw5=20K, the capacitance Cw=0.4254uF, the capacitance Cw1=220nF, Cw2=100nF, Cw3=100nF, Cw4=4.7nF; the resistance Ru=0.3486M, the potentiometer Ru1=3.5K, The resistance Ru2=330K, Ru3=10K, Ru4=5.1K, Ru5=0K, the capacitance Cu=0.1954uF, the capacitance Cu1=150nF, Cu2=33nF, Cu3=10nF, Cu4=2.2nF; Resistance Rv=0.1203M, the potentiometer Rv1=0.3K, the resistance Rv2=100K, Rv3=20K, Rv4=0K, Rv5=0K, the capacitance Cv=0.08311uF, the capacitance Cv1=47nF, Cv2 =33nF, Cv3=3.3nF, Cv4 is suspended.

4. The 0.6-order Liu chaotic system circuit containing xy based on the T-type general-purpose fractional-order integral circuit module is characterized in that:

(1) The Liu chaotic system i with xy is:

$\left\{\begin{array}{ccc}\frac{\mathrm{<span\; class="notranslate">\; dx</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& & \\ \frac{\mathrm{<span\; class="notranslate">\; dy</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}\\ \frac{\mathrm{<span\; class="notranslate">\; dz</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}& & \end{array}\right.$

(2) The 0.6 order Liu chaotic system ii with xy is:

$\left\{\begin{array}{ccc}\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; x</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& & \\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}& \mathrm{<span\; class="notranslate">\; i</span>}& \mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0.4</span>}\\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; z</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}& & \end{array}\right.$

(3) Construct the analog circuit according to the 0.6-order Liu chaotic system ii containing xy, and use the operational amplifier U1, operational amplifier U2 and resistors and the 0.6-order integral circuit module U5, the 0.6-order integral circuit module U6, and the 0.6-order integral circuit module U7 to form an inverse Adding adder and inverting 0.6 order integrator, utilize multiplier U3 and multiplier U4 to realize multiplication operation, described operational amplifier U1 and operational amplifier U2 adopt LF347N, described multiplier U3 and multiplier U4 adopt AD633JN;

The operational amplifier U1 is connected to the operational amplifier U2, the multiplier U3, the multiplier U4 and the 0.6-order integral circuit module U5 and the 0.6-order integral circuit module U6, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U4 and the 0.6-order integral circuit Module U7, the multiplier U3 is connected to the operational amplifier U1, and the multiplier U4 is connected to the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the sixth pin of U1 through a resistor R8, the second pin is connected to the first pin through a resistor R6, and the third, fifth, tenth and twelfth pins are grounded, The 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin is connected to the P pin of the T-type fractional-order integral circuit U7, the 7th pin is connected to the output y, and the 13th pin is connected through the resistor R1. Connect to the P2 pin of the T-type fractional-order integral circuit U8, connect the 8th pin to the output x, connect to the 9th pin through the resistor R4, connect to the 2nd pin through the resistor R5, and connect to the 1st pin of the multiplier U3 Pin, connected to the first pin of the multiplier U4, connected to the P2 pin of the T-type fractional integration circuit U6, the ninth pin connected to the P pin of the T-type fractional integration circuit U5, and the 13th pin through the resistor R2 It is connected to the 14th pin, and the 14th pin is connected to the 9th pin through the resistor R3;

The 1st, 2nd, 6th, and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 8th pin outputs z , connected to the 9th pin through the resistor R12, connected to the 3rd pin of the multiplier U3, connected to the P2 pin of the T-shaped fractional-order integral circuit U10, and connected to the P of the T-shaped fractional-order integral circuit U9 pin, the 13th pin is connected to the 14th pin through the resistor R10, and the 14th pin is connected to the 9th pin through the resistor R11;

The first pin of the multiplier U3 is connected to the eighth pin of U1, the third pin is connected to the eighth pin of U2, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin is connected to VEE. The pin is connected to the 6th pin of U1 through the resistor R7, and the 8th pin is connected to VCC;

The first pin of the multiplier U4 is connected to the eighth pin of U1, the third pin is connected to the seventh pin of U1, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin Connect the 13th pin of U2 through the resistor R9, and connect the 8th pin to VCC.

The A pin of the 0.6-order integral circuit module U5 is connected to the ninth pin of the operational amplifier U1, and the B pin is connected to the eighth pin of the operational amplifier U1;

The A pin of the 0.6-order integral circuit module U6 is connected to the sixth pin of the operational amplifier U1, and the B pin is connected to the seventh pin of the operational amplifier U1;

The A pin of the 0.6-order integral circuit module U7 is connected to the ninth pin of the operational amplifier U2, and the B pin is connected to the eighth pin of the operational amplifier U2.

In the circuit, resistance R1=R2=R3=R4=R6=R8=R10=R11=10k, R5=5kΩ, R7=1kΩ, R9=0.25kΩ, R12=40kΩ.

Of course, the above description is not a limitation of the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions or replacements made by those skilled in the art within the scope of the present invention also belong to the scope of the present invention. protected range.

Claims (4)

1. A T-type general fractional order integral circuit module is characterized in that: resistance Rx is connected in parallel with capacitance Cx to form the first part, resistance Ry is connected in series with capacitance Cy to form the second part, resistance Rz is connected in series with capacitance Cz to form the first part Three parts, the resistor Rw is connected in series with the capacitor Cw to form the fourth part, the resistor Ru is connected in series with the capacitor Cu to form the fifth part, the resistor Rv is connected in series with the capacitor Cv to form the sixth part, and the first part and the next five parts are connected in parallel. 2. A kind of T-type universal fractional order integral circuit module according to claim 1, it is characterized in that: described resistance Rx is made up of potentiometer Rx1 and resistance Rx2, Rx3, Rx4, Rx5 in series, and described electric capacity Cx is formed by electric capacity Cx1 . It is composed of potentiometer Rz1 and resistors Rz2, Rz3, Rz4, Rz5 in series, the capacitor Cz is composed of capacitors Cz1, Cz2, Cz3, Cz4 in parallel; the resistor Rw is composed of potentiometer Rw1 and resistors Rw2, Rw3, Rw4, Rw5 in series The capacitor Cw is composed of capacitors Cw1, Cw2, Cw3, and Cw4 connected in parallel; the resistor Ru is composed of a potentiometer Ru1 and resistors Ru2, Ru3, Ru4, and Ru5 in series, and the capacitor Cu is composed of capacitors Cu1, Cu2, Cu3, Cu4 is connected in parallel; the resistor Rv is composed of a potentiometer Rv1 and resistors Rv2, Rv3, Rv4, and Rv5 in series, and the capacitor Cv is composed of capacitors Cv1, Cv2, Cv3, and Cv4 in parallel. 3. according to the said a kind of T-type universal fractional order integral circuit module of claim 1, described 0.6 order integral circuit module, it is characterized in that: described resistance Rx=15.85M, described potentiometer Rx1=0K, described resistance Rx2=15M, Rx3=820K, Rx4=20K, Rx5=10K, the capacitor Cx=0.09261uF, the capacitor Cx1=68nF, Cx2=22nF, Cx3=2.2nF, Cx4 floating; the resistor Ry=12.32M , the potentiometer Ry1=0K, the resistor Ry2=10M, Ry3=2M, Ry4=220K, Ry5=100K, the capacitor Cy=1.749uF, the capacitor Cy1=1.5uF, Cy2=220nF, Cy3= 22nF, Cy4=6.8nF; the resistor Rz=3.500M, the potentiometer Rz1=0K, the resistor Rz2=3.3M, Rz3=200K, Rz4=0K, Rz5=0K, the capacitor Cz=0.9036uF , the capacitor Cz1=680nF, Cz2=220nF, Cz3=3.3nF, Cz4 suspended; the resistor Rw=1.091M, the potentiometer Rw1=0K, the resistor Rw2=1M, Rw3=51K, Rw4=20K , Rw5=20K, the capacitance Cw=0.4254uF, the capacitance Cw1=220nF, Cw2=100nF, Cw3=100nF, Cw4=4.7nF; the resistance Ru=0.3486M, the potentiometer Ru1=3.5K, The resistance Ru2=330K, Ru3=10K, Ru4=5.1K, Ru5=0K, the capacitance Cu=0.1954uF, the capacitance Cu1=150nF, Cu2=33nF, Cu3=10nF, Cu4=2.2nF; Resistance Rv=0.1203M, the potentiometer Rv1=0.3K, the resistance Rv2=100K, Rv3=20K, Rv4=0K, Rv5=0K, the capacitance Cv=0.08311uF, the capacitance Cv1=47nF, Cv2 =33nF, Cv3=3.3nF, Cv4 is suspended. 4. The 0.6-order Liu chaotic system circuit containing xy based on the T-type general fractional order integral circuit module is characterized in that: (1) The Liu chaotic system i with xy is: $\left\{\begin{array}{c}\frac{\mathrm{<span\; class="notranslate">\; dx</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \frac{\mathrm{<span\; class="notranslate">\; dy</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}\\ \frac{\mathrm{<span\; class="notranslate">\; dz</span>}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}\end{array}\right.\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}$ (2) The 0.6 order Liu chaotic system ii with xy is: $\left\{\begin{array}{c}\frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; a</span>}}\mathrm{<span\; class="notranslate">\; x</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; the\; y</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; bx</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; cx</span>}\\ \frac{{\mathrm{<span\; class="notranslate">\; d</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; z</span>}}{{\mathrm{<span\; class="notranslate">\; dt</span>}}^{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; hxy</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; dz</span>}\end{array}\right.\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; b</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 20</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2.5</span>}$ (3) Construct the analog circuit according to the 0.6-order Liu chaotic system ii containing xy, and use the operational amplifier U1, operational amplifier U2 and resistors and the 0.6-order integral circuit module U5, the 0.6-order integral circuit module U6, and the 0.6-order integral circuit module U7 to form an inverse Adding adder and inverting 0.6 order integrator, utilize multiplier U3 and multiplier U4 to realize multiplication operation, described operational amplifier U1 and operational amplifier U2 adopt LF347N, described multiplier U3 and multiplier U4 adopt AD633JN; The operational amplifier U1 is connected to the operational amplifier U2, the multiplier U3, the multiplier U4 and the 0.6-order integral circuit module U5 and the 0.6-order integral circuit module U6, and the operational amplifier U2 is connected to the multiplier U3, the multiplier U4 and the 0.6-order integral circuit Module U7, the multiplier U3 is connected to the operational amplifier U1, and the multiplier U4 is connected to the operational amplifier U2; The first pin of the operational amplifier U1 is connected to the sixth pin of U1 through a resistor R8, the second pin is connected to the first pin through a resistor R6, and the third, fifth, tenth and twelfth pins are grounded, The 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin is connected to the P pin of the T-type fractional-order integral circuit U7, the 7th pin is connected to the output y, and the 13th pin is connected through the resistor R1. Connect to the P2 pin of the T-type fractional-order integral circuit U8, connect the 8th pin to the output x, connect to the 9th pin through the resistor R4, connect to the 2nd pin through the resistor R5, and connect to the 1st pin of the multiplier U3 Pin, connected to the first pin of the multiplier U4, connected to the P2 pin of the T-type fractional integration circuit U6, the ninth pin connected to the P pin of the T-type fractional integration circuit U5, and the 13th pin through the resistor R2 It is connected to the 14th pin, and the 14th pin is connected to the 9th pin through the resistor R3; The 1st, 2nd, 6th, and 7th pins of the operational amplifier U2 are suspended, the 3rd, 5th, 10th, and 12th pins are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 8th pin outputs z , connected to the 9th pin through the resistor R12, connected to the 3rd pin of the multiplier U3, connected to the P2 pin of the T-shaped fractional-order integral circuit U10, and connected to the P of the T-shaped fractional-order integral circuit U9 pin, the 13th pin is connected to the 14th pin through the resistor R10, and the 14th pin is connected to the 9th pin through the resistor R11; The first pin of the multiplier U3 is connected to the eighth pin of U1, the third pin is connected to the eighth pin of U2, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin is connected to VEE. The pin is connected to the 6th pin of U1 through the resistor R7, and the 8th pin is connected to VCC; The first pin of the multiplier U4 is connected to the eighth pin of U1, the third pin is connected to the seventh pin of U1, the second, fourth, and sixth pins are all grounded, the fifth pin is connected to VEE, and the seventh pin Connect the 13th pin of U2 through the resistor R9, and connect the 8th pin to VCC. The A pin of the 0.6-order integral circuit module U5 is connected to the ninth pin of the operational amplifier U1, and the B pin is connected to the eighth pin of the operational amplifier U1; The A pin of the 0.6-order integral circuit module U6 is connected to the sixth pin of the operational amplifier U1, and the B pin is connected to the seventh pin of the operational amplifier U1; The A pin of the 0.6-order integral circuit module U7 is connected to the ninth pin of the operational amplifier U2, and the B pin is connected to the eighth pin of the operational amplifier U2.