CN104506173A - High-reliability and high-accuracy time fuse ignition circuit - Google Patents
High-reliability and high-accuracy time fuse ignition circuit Download PDFInfo
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- CN104506173A CN104506173A CN201410273737.0A CN201410273737A CN104506173A CN 104506173 A CN104506173 A CN 104506173A CN 201410273737 A CN201410273737 A CN 201410273737A CN 104506173 A CN104506173 A CN 104506173A
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Abstract
The invention discloses a high-reliability and high-accuracy time fuse ignition circuit. The time fuse ignition circuit consists of an input control signal circuit, a logical combination circuit, a time delay circuit and an optical MOS (Metal Oxide Semiconductor) relay driving circuit. According to the time fuse ignition circuit, an input signal and a logical control signal are isolated through an optical coupler of the input control signal circuit. After the logical control signal is processed through the time delay circuit, a certain level is generated and enters a digital circuit of the logical combination circuit for secondary comparison. When the compared signal is at a low level, the control signal and an output are isolated through the optical MOS relay driving circuit in order that the time fuse ignition circuit starts working. When the compared signal is at a high level, the time fuse ignition circuit is in a standby state. Through adoption of the time fuse ignition circuit, the interference resistance of a product is realized, and the control ability of switching off the output when a target changes is realized.
Description
Technical field
The present invention relates to electronic time unit technical field, specifically refer to a kind of highly reliable, high-precision time faze firing circuit.
Background technology
Time faze firing technique is mainly used in aerial burst, jumps the occasion exploding, penetrate target after-explosion and go deep into the various timed detonations such as target (as fortification etc.) internal explosion, also flare, spreading chaff flare, smoke shell, electromagnetic interference bullet can be used in, FAE. bomblet, minelaying shell, during the body of Rocket Cargo Projectile etc. opens a position, therefore the precision of the electronic time fuze firing circuit time precision that will directly affect body and open the cabin, the precision of time faze firing circuit just becomes the key index that body detonates and opens the cabin.In today of information prosperity, as long as pull-in frequency just may be detected by enemy or disturb in equipment or instrument, exactly because many critical equipment are interfered and send false command cause unnecessary loss, this just needs a kind of high accuracy, this function of highly reliable circuit realiration.
Electronic time fuze is the time faze adopting electronic time unit timing.By the form adopting circuit, digital electronic time faze and analog electronic time fuze can be divided into.Digital electronic time faze Applied Digital timing circuit controls to get angry by the umber of pulse of concussion electric pulse during record etc.Analog electronic time fuze utilize curtage according to certain rules, time dependent characteristic to realize time setting, analog electronic time fuze is mainly used in the ammunitions such as aviation time bomb.Above two class circuit are all adopt printed board (pcb board) and plastic device manufacture, have that volume is large, operating temperature range is narrow, a shortcoming such as antijamming capability and poor reliability.
The action principle of time faze firing circuit is generally carry out timing according to target information to time setting mechanism to set, and bullet is when certain state (as started flight), and time set starts timing, lights a fire after reaching predetermined time.The early stage ignition of batch pan defer time control device, watch time control device, after row relax of going forward side by side being received to various target, environmental information by user, by setting ignition setting device, be sent to ignition control device, the accuracy of timekeeping of its time of ignition, depend on the machining accuracy of batch pan or clockwork completely, therefore error generally can only control about 10%.The up-to-date intelligence ignition controlling organization succeeded in developing, inherently with receives information and treatment system, can automatically experience various target and environmental information, the information received is processed, then the ignition opportunity of fuse is controlled, the error of timing can control 0.1%, thus the combination property of fuse is increased substantially.The present invention gets angry a kind of high accuracy, highly reliable controlling basis is researched and developed, jamproof time faze firing circuit in intelligence.
Summary of the invention
The invention provides a kind of highly reliable, high-precision time faze firing circuit, by isolation Time-delayed trigger, after time faze igniting triggers, if target changes or operating mistake, we can close output by the level changing input control signal.
For this reason, the technical scheme adopted is:
A kind of highly reliable, high-precision time faze firing circuit, this time faze firing circuit is made up of input control signal circuit, logic combination circuit, delay circuit, PhotoMOS relay drive circuit; Input signal and logic control signal are isolated by the optocoupler of input control signal circuit by described time faze firing circuit, this logic control signal enters logic combination circuit digital circuit by producing a kind of level determined after delay circuit process is carried out secondary and is compared, when signal after is relatively low level, carried out the isolation of control signal and output by described PhotoMOS relay drive circuit, time faze firing circuit is started working; When signal after is relatively high level, time faze firing circuit is in holding state.
Described input control signal circuit comprises: input, control signal Vin
1, CO
1, Vin
2, CO
2, Vin
3, CO
3, Vin
4, CO
4, optocoupler IC1, IC2, pull-up resistance R
1, R
2, R
3, R
4, electric capacity C1, C2, C3, C4, diode D1, D2, D3, D4 form; Concrete connection is as follows:
Input signal Vin
1with one end of electric capacity C1, diode D1 with and 4 pin of optocoupler IC1 be connected, control signal CO
1be connected with the other end of electric capacity C1, diode D1 and 3 pin of optocoupler IC1;
Input signal Vin
2be connected with 1 pin of optocoupler IC1 with one end of electric capacity C2, diode D2, control signal CO
2be connected with the other end of electric capacity C2, diode D2 and 2 pin of optocoupler IC1;
Input signal Vin
3be connected with one end of electric capacity C3, diode D3 and 4 pin of optocoupler IC2, control signal CO
3be connected with the other end of electric capacity C3, diode D3 and 3 pin of optocoupler IC2;
Input signal Vin
4be connected with one end of electric capacity C4, diode D4 and 1 pin of optocoupler IC2, control signal CO
4be connected with the other end of electric capacity C4, diode D4 and 2 pin of optocoupler IC2;
The emitting stage of the GND in analog of the equal connecting circuit of 5 pin of described optocoupler IC1 and IC2, this optocoupler IC1 and IC2 inside is connected at device inside and communicates with the GND in analog of circuit;
6 pin of described optocoupler IC1,7 pin connect pull-type resistance R respectively
1, R
2one end, this pull-up resistance R
1, R
2the other end all meet supplying digital circuits power supply V
cC;
6 pin of described optocoupler IC2,7 pin connect pull-type resistance R respectively
3, R
4one end, this pull-up resistance R
3, R
4another termination supplying digital circuits power supply V
cC;
8 pin of described optocoupler IC1, IC2 all with supplying digital circuits power supply V
cCbe connected.
Described logic combination circuit comprises: digital circuit IC3, IC8 and shunt capacitance C
5, for the logic level of the input signal that converts, ensure the correctness of output signal; Its annexation is as follows:
1 pin of described digital circuit IC3,2 pin connect 7 pin, 6 pin of described optocoupler IC1;
3 pin of this digital circuit IC3 connect 6 pin of the digital circuit IC4 of described delay circuit and are connected with 1 pin of digital circuit IC8;
12 pin of this digital circuit IC3,13 pin connect 7 pin, 6 pin of described optocoupler IC2;
7 pin of this digital circuit IC3 connect the ground GND' of digital circuit;
11 pin of this digital circuit IC3 connect 6 pin of the digital circuit IC5 of described delay circuit and are connected with 6 pin of digital circuit IC8;
14 pin of this digital circuit IC3 connect supplying digital circuits power supply V
cC, this power supply V
cCone end connects shunt capacitance C
5, this C
5the other end connect the ground GND' of digital circuit;
4 pin of IC3,5 pin, 6 pin, 8 pin, 9 pin, 10 pin are unsettled;
2 pin of described digital circuit IC8 are connected with 8 pin of the digital circuit IC4 of described delay circuit;
3 pin, 13 pin of this digital circuit IC8 are connected, and 4 pin, 12 pin are connected;
5 pin of this digital circuit IC8 are connected with 8 pin of the IC5 of the digital circuit of described delay circuit;
7 pin of this digital circuit IC8 are connected with the ground GND' of digital circuit;
8 pin of this digital circuit IC8 are connected with 10 pin of the digital circuit IC9 of described PhotoMOS relay drive circuit;
9 pin of this digital circuit IC8 are connected with 8 pin of the digital circuit IC7 of described delay circuit;
10 pin of this digital circuit IC8 are connected with 3 pin of the digital circuit IC9 of described PhotoMOS relay drive circuit;
11 pin of this digital circuit IC8 are connected with 6 pin of IC6 with 6 pin of the digital circuit IC7 of described delay circuit;
14 pin of this digital circuit IC8 are connected with supplying digital circuits power supply VCC.
Described delay circuit comprises: digital circuit IC4, IC5, IC6, IC7, shunt capacitance C10, this delay circuit is used for occurring when preventing time faze firing circuit from working that misoperation or target turn off output after changing in time, the reliability worked when guaranteeing to occur exception; Its annexation is as follows:
1 pin of described digital circuit IC4,2 pin, 3 pin connect one end of resonant resistance R5, resonant capacitance C6, compensating resistance R6 respectively, and the other end of this resonant resistance R5, resonant capacitance C6, compensating resistance R6 is interconnected;
6 pin of this digital circuit IC4 are connected with 1 pin of digital circuit IC8 with 3 pin of the digital circuit IC3 in described logic combination circuit;
8 pin of this digital circuit IC4 are connected with 2 pin of described digital circuit IC8;
4 pin and 11 pin of this digital circuit IC4 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
1 pin of described digital circuit IC5,2 pin, 3 pin connect resonant resistance R7, resonant capacitance C7, compensating resistance R8 one end respectively, and the other end of this resonant resistance R7, resonant capacitance C7, compensating resistance R8 is interconnected;
6 pin of this digital circuit IC5 are connected with 6 pin of 11 pin of the digital circuit IC3 in described logic combination circuit and digital circuit IC8;
8 pin of the IC5 of this digital circuit are connected with 5 pin of the digital circuit IC8 in described logic combination circuit;
4 pin and 11 pin of this digital circuit IC5 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
1 pin of described digital circuit IC6,2 pin, 3 pin connect resonant resistance R9, resonant capacitance C8 respectively, compensating resistance R10 one end is connected, and the other end of this resonant resistance R9, resonant capacitance C8, compensating resistance R10 is interconnected;
4 pin and 11 pin of this digital circuit IC6 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
6 pin of this digital circuit IC6 are connected with 11 pin of the digital circuit IC8 in described logic combination circuit;
1 pin of described digital circuit IC7,2 pin, 3 pin connect resonant resistance R11, resonant capacitance C9 respectively, compensating resistance R12 one end is connected, and the other end of this resonant resistance R11, resonant capacitance C9, compensating resistance R12 is interconnected;
6 pin of this digital circuit IC7 are connected with 11 pin of the digital circuit IC8 in described logic combination circuit;
8 pin of this digital circuit IC7 are connected with 9 pin of the digital circuit IC8 in described logic combination circuit;
4 pin and 11 pin of this digital circuit IC7 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
One end of described supplying digital circuits power supply VCC connects described shunt capacitance C10, and this shunt capacitance C10 other end connects the ground GND' of digital circuit.
Described PhotoMOS relay drive circuit comprises: digital circuit IC9, current-limiting resistance R13, R14, R15, driving triode Q1 and PhotoMOS relay IC10; Drive triode Q1 to improve the driving force of the output of digital circuit IC9 at circuit, for PhotoMOS relay IC10 provides discharge loop, PhotoMOS relay IC10 secondary isolation logical signal and output, improve antijamming capability and the reliability of product; Its annexation is as follows:
3 pin of described digital circuit IC9 are connected with 10 pin of the digital circuit IC8 in described logic combination circuit;
11 pin of this digital circuit IC9 are connected with 8 pin of the digital circuit IC6 of described delay circuit;
10 pin of this digital circuit IC9 are connected with 8 pin of the digital circuit IC8 in described logic combination circuit;
4 pin of this digital circuit IC9 are connected with one end of current-limiting resistance R15, the other end of current-limiting resistance R15 is connected with driving the base stage of triode Q1, the emitter of triode Q1 is driven to be connected with the ground GND' of digital circuit, the collector electrode of triode Q1 is driven to be connected with the common cathode of light-emitting diode D5, D6 in PhotoMOS relay IC10, the anode of the light-emitting diode D5 in PhotoMOS relay IC10 is connected with one end of current-limiting resistance R14, the other end of resistance R14 and supplying digital circuits power supply V
cCbe connected, the anode of the light-emitting diode D6 in PhotoMOS relay IC10 is connected with one end of current-limiting resistance R13, the other end of this current-limiting resistance R13 and supplying digital circuits power supply V
cCbe connected.
1 pin of this digital circuit IC9,2 pin, 5 pin, 6 pin, 8 pin, 9 pin, 12 pin, 13 pin are unsettled;
7 pin of this digital circuit IC9 are connected with the ground GND' of digital circuit;
14 pin of this digital circuit IC9 are connected with supplying digital circuits power supply VCC.
Beneficial effect of the present invention is as follows:
1. the present invention improves the reliability of time faze firing circuit: the concept introducing isolation delay and running, guarantees that product is because to be disturbed or misoperation causes fuse false triggering to light a fire.
2. improve the antijamming capability of time faze firing circuit: introduce optocoupler, the conversion of Isolation input signal and logic level, improve input impedance.Introduce PhotoMOS relay, isolation delay and running signal and output, reduce the interference of triggering signal to input.
3. optimize input signal, control signal can be become DC level, reduce the impact of external interference source on input.
4.adopt thick film hybrid integrated circuit manufacture technics, volume is little, and reliability is high, and operating temperature range wide (-55 DEG C ~ 125 DEG C), product can be operated in rugged environment.
Accompanying drawing explanation
Fig. 1 is circuit block diagram of the present invention;
Fig. 2 is input control signal circuit theory diagrams of the present invention;
Fig. 3 is circuit working sequential chart of the present invention;
Fig. 4 is logic combination circuit schematic diagram of the present invention;
Fig. 5 is delay circuit schematic diagram of the present invention;
Fig. 6 is PhotoMOS relay driving circuit principle figure of the present invention;
In above-mentioned accompanying drawing, device IC1, IC2 model is HCPL0630, IC3 model is CD4081B, IC4, IC5, IC6, IC7 model be CD4541B, IC8 model be CD4071B, IC9 model be CD4069UB, Q1 model is 3DG130B.
Embodiment
Below in conjunction with accompanying drawing, the present invention and beneficial effect thereof are described in further detail.
With reference to Fig. 1,3, a kind of highly reliable, high-precision time faze firing circuit, this time faze firing circuit is made up of input control signal circuit, logic combination circuit, delay circuit, PhotoMOS relay drive circuit; Input signal and logic control signal are isolated by the optocoupler of input control signal circuit by described time faze firing circuit, this logic control signal enters logic combination circuit digital circuit by producing a kind of level determined after delay circuit process is carried out secondary and is compared, when signal after is relatively low level, carried out the isolation of control signal and output by described PhotoMOS relay drive circuit, time faze firing circuit is started working; When signal after is relatively high level, time faze firing circuit is in holding state.Four road input signals of described input control signal circuit can control respectively by pulse or low and high level, also can by input signal Vin
1, Vin
2, Vin
3, Vin
4be connected as a benchmark, control signal CO
1, CO
2, CO
3, CO
4compare with benchmark respectively, be used for control time fuse firing circuit work or standby.
When circuit is standby, four tunnel control signal CO
1, CO
2, CO
3, CO
4be all high level, close output channel.When circuit is started working, input control signal is pulse or high potential, powered on moment control signal CO
1, CO
2, CO
3, CO
4be all high level, two groups of control signals adopt optocoupler to carry out front stage isolation, as control signal CO
1or CO
2be arbitrarily low (the two with), control signal CO
3or CO
4be arbitrarily low (the two with), mutually or after obtain A point signal, A point trailing edge obtains B point signal after postponing 1.8S, A point trailing edge obtains C point signal after postponing 2S, after determining time of delay (time of delay can determine the different time by the value changing oscillation resistance or oscillating capacitance), by C point signal inversion, again with B point signal phase or obtain D point signal, D point signal is negative pulse, pulse duration is the difference of B point trailing edge and C point trailing edge, this undersuing Direct driver PhotoMOS relay
Circuit is started working.In order to prevent occurring during circuit working that misoperation or target turn off output after changing in time, we add one group of delay circuit in circuit, after circuit working after time delay 7mS, logic combination circuit is just started working, the reliability worked when guaranteeing to occur exception.Circuit working sequential chart as shown in Figure 3.
By input signal Vin
1, Vin
2, Vin
3, Vin
4be connected to reference signal, CO
1, CO
2, CO
3, CO
4accept the command signal of single-chip microcomputer or command centre respectively.
Existing time faze firing circuit is all adopt printed board (pcb board) and plastic device manufacture, there is the shortcomings such as volume is large, operating temperature range is narrow, poor reliability, the present invention adopts thick film hybrid integrated circuit manufacture technics to produce, employing bare chip assembles, the full level Hermetic Package of metal dual-in-line, has that volume is little, operating temperature range is wide, high reliability.
Claims (5)
1. highly reliable, a high-precision time faze firing circuit, is characterized in that: this time faze firing circuit is made up of input control signal circuit, logic combination circuit, delay circuit, PhotoMOS relay drive circuit; Input signal and logic control signal are isolated by the optocoupler of input control signal circuit by described time faze firing circuit, this logic control signal enters logic combination circuit digital circuit by producing a kind of level determined after delay circuit process is carried out secondary and is compared, when signal after is relatively low level, carried out the isolation of control signal and output by described PhotoMOS relay drive circuit, time faze firing circuit is started working; When signal after is relatively high level, time faze firing circuit is in holding state.
2. highly reliable, the high-precision time faze firing circuit of one according to claim 1, is characterized in that: described input control signal circuit comprises: input, control signal Vin
1, CO
1, Vin
2, CO
2, Vin
3, CO
3, Vin
4, CO
4, optocoupler IC1, IC2, pull-up resistance R
1, R
2, R
3, R
4, electric capacity C1, C2, C3, C4, diode D1, D2, D3, D4 form; Concrete connection is as follows:
Input signal Vin
1with one end of electric capacity C1, diode D1 with and 4 pin of optocoupler IC1 be connected, control signal CO
1be connected with the other end of electric capacity C1, diode D1 and 3 pin of optocoupler IC1;
Input signal Vin
2be connected with 1 pin of optocoupler IC1 with one end of electric capacity C2, diode D2, control signal CO
2be connected with the other end of electric capacity C2, diode D2 and 2 pin of optocoupler IC1;
Input signal Vin
3be connected with one end of electric capacity C3, diode D3 and 4 pin of optocoupler IC2, control signal CO
3be connected with the other end of electric capacity C3, diode D3 and 3 pin of optocoupler IC2;
Input signal Vin
4be connected with one end of electric capacity C4, diode D4 and 1 pin of optocoupler IC2, control signal CO
4be connected with the other end of electric capacity C4, diode D4 and 2 pin of optocoupler IC2;
The emitting stage of the GND in analog of the equal connecting circuit of 5 pin of described optocoupler IC1 and IC2, this optocoupler IC1 and IC2 inside is connected at device inside and communicates with the GND in analog of circuit;
6 pin of described optocoupler IC1,7 pin connect pull-type resistance R respectively
1, R
2one end, this pull-up resistance R
1, R
2the other end all meet supplying digital circuits power supply V
cC;
6 pin of described optocoupler IC2,7 pin connect pull-type resistance R respectively
3, R
4one end, this pull-up resistance R
3, R
4another termination supplying digital circuits power supply V
cC;
8 pin of described optocoupler IC1, IC2 all with supplying digital circuits power supply V
cCbe connected.
3. highly reliable, the high-precision time faze firing circuit of one according to claim 1, is characterized in that: described logic combination circuit comprises: digital circuit IC3, IC8 and shunt capacitance C
5, for the logic level of the input signal that converts, ensure the correctness of output signal; Its annexation is as follows:
1 pin of described digital circuit IC3,2 pin connect 7 pin, 6 pin of described optocoupler IC1;
3 pin of this digital circuit IC3 connect 6 pin of the digital circuit IC4 of described delay circuit and are connected with 1 pin of digital circuit IC8;
12 pin of this digital circuit IC3,13 pin connect 7 pin, 6 pin of described optocoupler IC2;
7 pin of this digital circuit IC3 connect the ground GND' of digital circuit;
11 pin of this digital circuit IC3 connect 6 pin of the digital circuit IC5 of described delay circuit and are connected with 6 pin of digital circuit IC8;
14 pin of this digital circuit IC3 connect supplying digital circuits power supply V
cC, this power supply V
cCone end connects shunt capacitance C
5, this C
5the other end connect the ground GND' of digital circuit;
4 pin of IC3,5 pin, 6 pin, 8 pin, 9 pin, 10 pin are unsettled;
2 pin of described digital circuit IC8 are connected with 8 pin of the digital circuit IC4 of described delay circuit;
3 pin, 13 pin of this digital circuit IC8 are connected, and 4 pin, 12 pin are connected;
5 pin of this digital circuit IC8 are connected with 8 pin of the IC5 of the digital circuit of described delay circuit;
7 pin of this digital circuit IC8 are connected with the ground GND' of digital circuit;
8 pin of this digital circuit IC8 are connected with 10 pin of the digital circuit IC9 of described PhotoMOS relay drive circuit;
9 pin of this digital circuit IC8 are connected with 8 pin of the digital circuit IC7 of described delay circuit;
10 pin of this digital circuit IC8 are connected with 3 pin of the digital circuit IC9 of described PhotoMOS relay drive circuit;
11 pin of this digital circuit IC8 are connected with 6 pin of IC6 with 6 pin of the digital circuit IC7 of described delay circuit;
14 pin of this digital circuit IC8 are connected with supplying digital circuits power supply VCC.
4. highly reliable, the high-precision time faze firing circuit of one according to claim 1, it is characterized in that: described delay circuit comprises: digital circuit IC4, IC5, IC6, IC7, shunt capacitance C10, this delay circuit is used for occurring when preventing time faze firing circuit from working that misoperation or target turn off output after changing in time, the reliability worked when guaranteeing to occur exception; Its annexation is as follows:
1 pin of described digital circuit IC4,2 pin, 3 pin connect one end of resonant resistance R5, resonant capacitance C6, compensating resistance R6 respectively, and the other end of this resonant resistance R5, resonant capacitance C6, compensating resistance R6 is interconnected;
6 pin of this digital circuit IC4 are connected with 1 pin of digital circuit IC8 with 3 pin of the digital circuit IC3 in described logic combination circuit;
8 pin of this digital circuit IC4 are connected with 2 pin of described digital circuit IC8;
4 pin and 11 pin of this digital circuit IC4 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
1 pin of described digital circuit IC5,2 pin, 3 pin connect resonant resistance R7, resonant capacitance C7, compensating resistance R8 one end respectively, and the other end of this resonant resistance R7, resonant capacitance C7, compensating resistance R8 is interconnected;
6 pin of this digital circuit IC5 are connected with 6 pin of 11 pin of the digital circuit IC3 in described logic combination circuit and digital circuit IC8;
8 pin of the IC5 of this digital circuit are connected with 5 pin of the digital circuit IC8 in described logic combination circuit;
4 pin and 11 pin of this digital circuit IC5 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
1 pin of described digital circuit IC6,2 pin, 3 pin connect resonant resistance R9, resonant capacitance C8 respectively, compensating resistance R10 one end is connected, and the other end of this resonant resistance R9, resonant capacitance C8, compensating resistance R10 is interconnected;
4 pin and 11 pin of this digital circuit IC6 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
6 pin of this digital circuit IC6 are connected with 11 pin of the digital circuit IC8 in described logic combination circuit;
1 pin of described digital circuit IC7,2 pin, 3 pin connect resonant resistance R11, resonant capacitance C9 respectively, compensating resistance R12 one end is connected, and the other end of this resonant resistance R11, resonant capacitance C9, compensating resistance R12 is interconnected;
6 pin of this digital circuit IC7 are connected with 11 pin of the digital circuit IC8 in described logic combination circuit;
8 pin of this digital circuit IC7 are connected with 9 pin of the digital circuit IC8 in described logic combination circuit;
4 pin and 11 pin of this digital circuit IC7 are unsettled, and its 5 pin, 7 pin, 10 pin, 13 pin connect the ground GND' of digital circuit, and its 9 pin, 12 pin, 14 pin are connected with supplying digital circuits power supply VCC;
One end of described supplying digital circuits power supply VCC connects described shunt capacitance C10, and this shunt capacitance C10 other end connects the ground GND' of digital circuit.
5. highly reliable, the high-precision time faze firing circuit of one according to claim 1, is characterized in that: described PhotoMOS relay drive circuit comprises: digital circuit IC9, current-limiting resistance R13, R14, R15, driving triode Q1 and PhotoMOS relay IC10; Drive triode Q1 to improve the driving force of the output of digital circuit IC9 at circuit, for PhotoMOS relay IC10 provides discharge loop, PhotoMOS relay IC10 secondary isolation logical signal and output, improve antijamming capability and the reliability of product; Its annexation is as follows:
3 pin of described digital circuit IC9 are connected with 10 pin of the digital circuit IC8 in described logic combination circuit;
11 pin of this digital circuit IC9 are connected with 8 pin of the digital circuit IC6 of described delay circuit;
10 pin of this digital circuit IC9 are connected with 8 pin of the digital circuit IC8 in described logic combination circuit;
4 pin of this digital circuit IC9 are connected with one end of current-limiting resistance R15, the other end of current-limiting resistance R15 is connected with driving the base stage of triode Q1, the emitter of triode Q1 is driven to be connected with the ground GND' of digital circuit, the collector electrode of triode Q1 is driven to be connected with the common cathode of light-emitting diode D5, D6 in PhotoMOS relay IC10, the anode of the light-emitting diode D5 in PhotoMOS relay IC10 is connected with one end of current-limiting resistance R14, the other end of resistance R14 and supplying digital circuits power supply V
cCbe connected, the anode of the light-emitting diode D6 in PhotoMOS relay IC10 is connected with one end of current-limiting resistance R13, the other end of this current-limiting resistance R13 and supplying digital circuits power supply V
cCbe connected;
1 pin of this digital circuit IC9,2 pin, 5 pin, 6 pin, 8 pin, 9 pin, 12 pin, 13 pin are unsettled;
7 pin of this digital circuit IC9 are connected with the ground GND' of digital circuit;
14 pin of this digital circuit IC9 are connected with supplying digital circuits power supply VCC.
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|---|---|---|---|
| CN201410273737.0A CN104506173B (en) | 2014-06-19 | 2014-06-19 | A kind of highly reliable, high-precision time fuse firing circuit |
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|---|---|---|---|
| CN201410273737.0A CN104506173B (en) | 2014-06-19 | 2014-06-19 | A kind of highly reliable, high-precision time fuse firing circuit |
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| CN104506173B CN104506173B (en) | 2017-10-03 |
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| CN112130505A (en) * | 2020-09-27 | 2020-12-25 | 山东航天电子技术研究所 | Initiating explosive device ignition control circuit and method thereof |
| CN112576412A (en) * | 2019-09-29 | 2021-03-30 | 北京信息科技大学 | Secondary ignition control device for small-size shoulder-resistance multistage propulsion aircraft |
| CN114923381A (en) * | 2022-05-23 | 2022-08-19 | 中国人民解放军63856部队 | Test method for testing action reliability of grenade fuse |
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| CN109141116A (en) * | 2018-07-11 | 2019-01-04 | 新疆宏开电子系统集成有限公司 | Machine of smoke-screen extends control device |
| CN110145978A (en) * | 2019-06-07 | 2019-08-20 | 华夏世昌(北京)科技有限公司 | A kind of number fire extinguisher bomb and control method |
| CN112576412A (en) * | 2019-09-29 | 2021-03-30 | 北京信息科技大学 | Secondary ignition control device for small-size shoulder-resistance multistage propulsion aircraft |
| CN112130505A (en) * | 2020-09-27 | 2020-12-25 | 山东航天电子技术研究所 | Initiating explosive device ignition control circuit and method thereof |
| CN114923381A (en) * | 2022-05-23 | 2022-08-19 | 中国人民解放军63856部队 | Test method for testing action reliability of grenade fuse |
| CN114923381B (en) * | 2022-05-23 | 2024-02-20 | 中国人民解放军63856部队 | Test method for checking action reliability of grenade fuze |
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