CN104469405A - FC-AV communication control method - Google Patents
FC-AV communication control method Download PDFInfo
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- CN104469405A CN104469405A CN201410753066.8A CN201410753066A CN104469405A CN 104469405 A CN104469405 A CN 104469405A CN 201410753066 A CN201410753066 A CN 201410753066A CN 104469405 A CN104469405 A CN 104469405A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/231—Content storage operation, e.g. caching movies for short term storage, replicating data over plural servers, prioritizing data for deletion
- H04N21/23106—Content storage operation, e.g. caching movies for short term storage, replicating data over plural servers, prioritizing data for deletion involving caching operations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/433—Content storage operation, e.g. storage operation in response to a pause request, caching operations
- H04N21/4331—Caching operations, e.g. of an advertisement for later insertion during playback
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/60—Network structure or processes for video distribution between server and client or between remote clients; Control signalling between clients, server and network components; Transmission of management data between server and client, e.g. sending from server to client commands for recording incoming content stream; Communication details between server and client
- H04N21/61—Network physical structure; Signal processing
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- Communication Control (AREA)
Abstract
The invention belongs to the technical field of computer application, and particularly relates to an FC-AV communication control method. The FC-AV communication control method is composed of a sending control processing procedure and a receiving control processing procedure; the sending control processing procedure is used for sending video frames according to an FC sequence; the receiving control processing procedure is used for organizing the FC sequence into an image information frame, and placing the image information frame into a cache for video display. The FC frame sending processing procedure and the FC frame receiving processing procedure are put forward according to an FC-AV protocol, and FC-AV communication control in reality can be completed.
Description
Technical field
The invention belongs to computer hardware technology, relate to a kind of FC-AV communication control method.
Background technology
The FC-AV protocol definition mapping way of audio, video data to FC (optical-fibre channel), the audio frequency and video meeting VESA standard be mapped to FC network and export from FC network restore audio, video data, but in prior art, not yet having FC-AV communication control method to occur.
Summary of the invention
The invention provides and a kind of video data is converted to serial FC-AV frame, and from serial FC-AV frame, extract video data and write the FC-AV communication control method of buffer memory.
Technical solution of the present invention:
A kind of FC-AV communication control method, its special character is, comprises the following steps:
One, circuit is built: comprise transmission DDR2 controller, the outside DDR2 of transmission memory, DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, asynchronous FIFO C, asynchronous FIFO D, transmission control 0 module, send control 1 module, reception control module, FC core 0, FC core 1, receive DDR2 controller and external reception DDR2 memory; Described FC core 0 forms the first transmission path 0 together with DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, transmission control 0 module; Described FC core 1 forms the second transmission path 1 together with DDR2 read control module, asynchronous FIFO C, asynchronous FIFO D, transmission control 1 module; Asynchronous FIFO A and asynchronous FIFO B alternation in first transmission path 0, asynchronous FIFO C and asynchronous FIFO D alternation in the second transmission path 1;
The work of this circuit is divided into transmission and receives two kinds:
Two, send:
1] DDR2 read control module judges whether the outside DDR2 memory that sends has video data;
If no, then exit, otherwise forward step 3 to; Described video data comprises video content and line number;
2] DDR2 read control module reading video data by row, and write replaces in asynchronous FIFO A and asynchronous FIFO B, alternately writes asynchronous FIFO C and asynchronous FIFO D simultaneously;
3] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 4];
If under being operated in non-remaining pattern, perform step 5];
4] under remaining pattern, framing sends:
4.1] send the state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B, send the state of control 1 module monitors asynchronous FIFO C and asynchronous FIFO D:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number, when the module monitors of transmission control 1 simultaneously has a line video data to asynchronous FIFO C or asynchronous FIFO D, read this row video data, and determine whether the first row according to line number:
If so, then step 4.2 is performed];
Otherwise determine whether last column:
If not, perform step 4.3]
Otherwise, perform step 4.4]
4.2] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.3] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.4] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 4.5];
4.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, send control 1 module simultaneously and the FC-AV frame organized is sent to FC core 1, while performing next step, get back to step 4.1];
4.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network, and FC core 1 converts the FC-AV frame received to serial data and sends to outside FC network simultaneously;
5] under non-remaining pattern, framing sends:
5.1] state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B is sent:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number:
If so, then step 5.2 is performed];
Otherwise determine whether last column:
If not, perform step 5.3]
Otherwise, perform step 5.4]
5.2] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.3] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.4] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 5.5];
5.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, while performing next step, get back to step 5.1];
5.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network;
Three, receive:
1] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 2];
If under being operated in non-remaining pattern, perform step 3];
2] receive under remaining pattern:
2.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
2.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 rolls off the production line; Then judge whether FC core 1 rolls off the production line, if FC core 0 is online, then perform step 2.4];
If FC core 1 is online, then receives control module and receive FC-AV frame from FC core 1, perform step 2.4]
If FC core 1 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
2.3] FC core 0 gets back to step 2.2 after reaching the standard grade]
2.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 2.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 2.6];
Otherwise, perform step 2.7];
2.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 2.2 simultaneously];
2.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 2.2 simultaneously];
2.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 2.2];
3] receive under non-remaining pattern:
3.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
3.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 is online, then perform step 3.4];
If FC core 0 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
3.3] FC core 0 gets back to step 3.2 after reaching the standard grade]
3.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 3.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 3.6];
Otherwise, perform step 3.7];
3.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 3.2 simultaneously];
3.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 3.2 simultaneously];
3.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 3.2].
Advantage of the present invention is:
A kind of FC-AV communication control method provided by the invention, its communication control method achieves and according to FC-AV agreement, video data is formed a series of FC-AV frame by sending control treatment flow process and receiving control treatment flow process and be sent to FC network, with from FC network reception to a series of FC-AV frames according to FC-AV agreement extract reduction video data, have simultaneously and send two remaining and receive two remaining function, the good stability of whole process, reliability is high, has milestone significance.
Accompanying drawing illustrates:
Fig. 1 is the example structure schematic diagram of FC-AV communication control method.
Embodiment
Below in conjunction with drawings and Examples, the present invention will be further described:
Refer to Fig. 1, a kind of FC-AV communication control method of the present invention, video data is formed a series of FC-AV frame according to FC-AV agreement and is sent to FC network by its Control on Communication, or from FC network reception to a series of FC-AV frames extract reduction video data according to FC-AV agreement, and write frame buffer zone.
A kind of FC-AV communication control method, comprises the following steps:
One, circuit is built as shown in Figure 1: comprise transmission DDR2 controller, the outside DDR2 of transmission memory, DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, asynchronous FIFO C, asynchronous FIFO D, transmission control 0 module, send control 1 module, reception control module, FC core 0, FC core 1, receive DDR2 controller and external reception DDR2 memory; Described FC core 0 forms the first transmission path 0 together with DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, transmission control 0 module; Described FC core 1 forms the second transmission path 1 together with DDR2 read control module, asynchronous FIFO C, asynchronous FIFO D, transmission control 1 module; Asynchronous FIFO A and asynchronous FIFO B alternation in first transmission path 0, asynchronous FIFO C and asynchronous FIFO D alternation in the second transmission path 1;
The work of this circuit is divided into transmission and receives two kinds:
Two, send:
1] DDR2 read control module judges whether the outside DDR2 memory that sends has video data;
If no, then exit, otherwise forward step 3 to; Described video data comprises video content and line number;
2] DDR2 read control module reading video data by row, and write replaces in asynchronous FIFO A and asynchronous FIFO B, alternately writes asynchronous FIFO C and asynchronous FIFO D simultaneously;
3] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 4];
If under being operated in non-remaining pattern, perform step 5];
4] under remaining pattern, framing sends:
4.1] send the state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B, send the state of control 1 module monitors asynchronous FIFO C and asynchronous FIFO D:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number, when the module monitors of transmission control 1 simultaneously has a line video data to asynchronous FIFO C or asynchronous FIFO D, read this row video data, and determine whether the first row according to line number:
If so, then step 4.2 is performed];
Otherwise determine whether last column:
If not, perform step 4.3]
Otherwise, perform step 4.4]
4.2] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.3] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.4] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 4.5];
4.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, send control 1 module simultaneously and the FC-AV frame organized is sent to FC core 1, while performing next step, get back to step 4.1];
4.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network, and FC core 1 converts the FC-AV frame received to serial data and sends to outside FC network simultaneously;
5] under non-remaining pattern, framing sends:
5.1] state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B is sent:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number:
If so, then step 5.2 is performed];
Otherwise determine whether last column:
If not, perform step 5.3]
Otherwise, perform step 5.4]
5.2] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.3] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.4] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 5.5];
5.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, while performing next step, get back to step 5.1];
5.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network;
Three, receive:
1] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 2];
If under being operated in non-remaining pattern, perform step 3];
2] receive under remaining pattern:
2.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
2.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 rolls off the production line; Then judge whether FC core 1 rolls off the production line, if FC core 0 is online, then perform step 2.4];
If FC core 1 is online, then receives control module and receive FC-AV frame from FC core 1, perform step 2.4]
If FC core 1 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
2.3] FC core 0 gets back to step 2.2 after reaching the standard grade]
2.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 2.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 2.6];
Otherwise, perform step 2.7];
2.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 2.2 simultaneously];
2.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 2.2 simultaneously];
2.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 2.2];
3] receive under non-remaining pattern:
3.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
3.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 is online, then perform step 3.4];
If FC core 0 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
3.3] FC core 0 gets back to step 3.2 after reaching the standard grade]
3.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 3.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 3.6];
Otherwise, perform step 3.7];
3.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 3.2 simultaneously];
3.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 3.2 simultaneously];
3.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 3.2].
Embodiment:
FC-AV Control on Communication is divided into transmission control treatment flow process and receives control treatment flow process;
Send control treatment flow process to comprise the following steps:
Step 1: judge to send in buffering area, control access whether have new image line, if do not had, then exit, otherwise forward step 2 to;
Step 2: read video row data, determine whether the first row by line number, if be the first row, forwards step 3 to; Otherwise forward step 4 to;
Step 3: organize FC frame information according to FC frame format, wherein frame head defines symbol is SOFi3, and it is 0x300008 that postamble defines the value accorded with as EOFn, F_CTL, and the value of SEQ_CNT is 0, SEQ_ID is image frame number, forwards step 5 to;
Step 4: judge whether this row is last column, if it is forwards step 6 to; Otherwise forward step 5 to;
Step 5: send a line image data information, wherein frame head frame defines symbol is SOFn3, and it is 0x300008 that postamble defines the value accorded with as EOFn, F_CTL, SEQ_CNT often sends a FC Frame and adds 1, forwards step 1 to;
Step 6: send last column data message, wherein frame head frame defines symbol is SOFn3, and it is 0x380008 that postamble defines the value accorded with as EOFt, F_CTL, and SEQ_CNT often sends a FC Frame and adds 1, forwards step 1 to.
Receive control treatment flow process to comprise the following steps:
Step 1: whether be SOFi3, be if it is first FC frame of frame of video, forward step 2 to, otherwise forward step 3 to if judging that the frame head of the FC frame newly received defines symbol;
Step 2: control buffering area write pointer information according to reception, determine the buffering area at frame of video place, write this FC frame data from 0 address of this buffering area, forward step 1 to;
Step 3: judge whether the BIT_19 in the FC frame frame head FC_CTL that receives is 1 is 1 this FC frame is last FC frame of frame of video, forwards step 5 to; Otherwise not last FC frame, forward step 4 to;
Step 4: the address of then going up a FC frame write writes the data of this FC frame continuously, forwards step 1 to;
Step 5: the address of then going up a FC frame write writes the data of this FC frame continuously, and after writing, write pointer adds one, is switched to the next initial address receiving control buffering area, forwards step 1 to.
In described transmission control treatment process step 1, send buffering area, control access to be made up of the data buffer zone of multiple equal sizes, a line image data information can be deposited in each buffering area, and increase a line number field before adopting the video row data of the way to manage of queue in each buffering area, ensure that FC-AV port sends the beginning and the end that control to judge video on the one hand, ensure that the video information of FC_AV port transmission can not wrong row phenomenon on the other hand.
In described transmission control treatment process step 5 and step 6, the load of FC frame is unfixed, can not more than 2112 bytes but maximum, when the data of a line video are less than 2112 byte, data line information can send at a FC frame, when the data of a line video are more than 2112 byte, data line information is divided into multiple FC frame to send.
Described reception control treatment process step 2, receive control buffering area to be made up of the data buffer zone of multiple equal sizes, the data message of a picture frame can be deposited in each buffering area, receive the position controlling buffering area and represent current read-write buffering area with read-write pointer, circulate to reception buffer zone write video requency frame data successively by buffering area numbering, after often writing frame data, write pointer adds one, is switched to next buffering area; When last buffering area of write pointers point, write pointer adds first buffering area of rebound first.
Last it is noted that above embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although explain invention has been with reference to previous embodiment, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (1)
1. a FC-AV communication control method, is characterized in that, comprises the following steps:
One, circuit is built: comprise transmission DDR2 controller, the outside DDR2 of transmission memory, DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, asynchronous FIFO C, asynchronous FIFO D, transmission control 0 module, send control 1 module, reception control module, FC core 0, FC core 1, receive DDR2 controller and external reception DDR2 memory; Described FC core 0 forms the first transmission path 0 together with DDR2 read control module, asynchronous FIFO A, asynchronous FIFO B, transmission control 0 module; Described FC core 1 forms the second transmission path 1 together with DDR2 read control module, asynchronous FIFO C, asynchronous FIFO D, transmission control 1 module; Asynchronous FIFO A and asynchronous FIFO B alternation in first transmission path 0, asynchronous FIFO C and asynchronous FIFO D alternation in the second transmission path 1;
The work of this circuit is divided into transmission and receives two kinds:
Two, send:
1] DDR2 read control module judges whether the outside DDR2 memory that sends has video data;
If no, then exit, otherwise forward step 3 to; Described video data comprises video content and line number;
2] DDR2 read control module reading video data by row, and write replaces in asynchronous FIFO A and asynchronous FIFO B, alternately writes asynchronous FIFO C and asynchronous FIFO D simultaneously;
3] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 4];
If under being operated in non-remaining pattern, perform step 5];
4] under remaining pattern, framing sends:
4.1] send the state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B, send the state of control 1 module monitors asynchronous FIFO C and asynchronous FIFO D:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number, when the module monitors of transmission control 1 simultaneously has a line video data to asynchronous FIFO C or asynchronous FIFO D, read this row video data, and determine whether the first row according to line number:
If so, then step 4.2 is performed];
Otherwise determine whether last column:
If not, perform step 4.3]
Otherwise, perform step 4.4]
4.2] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.3] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 4.5];
4.4] send control 0 module and send control 1 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 4.5];
4.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, send control 1 module simultaneously and the FC-AV frame organized is sent to FC core 1, while performing next step, get back to step 4.1];
4.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network, and FC core 1 converts the FC-AV frame received to serial data and sends to outside FC network simultaneously;
5] under non-remaining pattern, framing sends:
5.1] state of control 0 module monitors asynchronous FIFO A and asynchronous FIFO B is sent:
When sending control 0 module monitors and having a line video data to asynchronous FIFO A or asynchronous FIFO B, read this row video data, and determine whether the first row according to line number:
If so, then step 5.2 is performed];
Otherwise determine whether last column:
If not, perform step 5.3]
Otherwise, perform step 5.4]
5.2] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFi3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.3] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFn, performs step 5.5];
5.4] send control 0 module and organize FC-AV frame according to FC-AV frame format, and by the frame head imparting value SOFn3 of this FC-AV frame, and using this row video data as this FC-AV frame load, its postamble imparting value EOFt, performs step 5.5];
5.5] send control 0 module and the FC-AV frame organized is sent to FC core 0, while performing next step, get back to step 5.1];
5.6] FC core 0 converts the FC-AV frame received to serial data and sends to outside FC network;
Three, receive:
1] this circuit operating pattern of exterior arrangement is judged:
If under being operated in remaining pattern, perform step 2];
If under being operated in non-remaining pattern, perform step 3];
2] receive under remaining pattern:
2.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
2.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 rolls off the production line; Then judge whether FC core 1 rolls off the production line, if FC core 0 is online, then perform step 2.4];
If FC core 1 is online, then receives control module and receive FC-AV frame from FC core 1, perform step 2.4]
If FC core 1 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
2.3] FC core 0 gets back to step 2.2 after reaching the standard grade]
2.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 2.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 2.6];
Otherwise, perform step 2.7];
2.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 2.2 simultaneously];
2.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 2.2 simultaneously];
2.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 2.2];
3] receive under non-remaining pattern:
3.1] FC core 0 and FC core 1 are from outside FC network reception FC-AV frame serial data, convert FC-AV frame to;
3.2] receive control module and receive FC-AV frame from FC core 0, if FC core 0 is online, then perform step 3.4];
If FC core 0 rolls off the production line, then wait for that FC core 0 is reached the standard grade;
3.3] FC core 0 gets back to step 3.2 after reaching the standard grade]
3.4] receive control module judge receive this FC-AV frame frame head value whether be SOFi3:
If it is be first FC-AV frame of frame of video, perform step 3.5];
Otherwise whether the postamble value judging this FC-AV frame is EOFn:
If not, then perform step 3.6];
Otherwise, perform step 3.7];
3.5] receiving control module the load video data of this frame are write by receiving DDR2 controller from 0 address of the buffering area of external reception DDR2 memory, getting back to step 3.2 simultaneously];
3.6] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, get back to step 3.2 simultaneously];
3.7] receive control module by the load video data of this frame by receive DDR2 controller from the buffering area of external reception DDR2 memory take the next address of address write, after writing, switch to next buffering area, get back to step 3.2].
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| CN113645509A (en) * | 2021-06-25 | 2021-11-12 | 天津津航计算技术研究所 | Display control and display control calculation dynamic coupling system and method |
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| CN113645509A (en) * | 2021-06-25 | 2021-11-12 | 天津津航计算技术研究所 | Display control and display control calculation dynamic coupling system and method |
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