CN104464598A - Gate driver, display device and drive method of gate driver - Google Patents
Gate driver, display device and drive method of gate driver Download PDFInfo
- Publication number
- CN104464598A CN104464598A CN201410813968.6A CN201410813968A CN104464598A CN 104464598 A CN104464598 A CN 104464598A CN 201410813968 A CN201410813968 A CN 201410813968A CN 104464598 A CN104464598 A CN 104464598A
- Authority
- CN
- China
- Prior art keywords
- strobe unit
- output channel
- row
- gate drivers
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention discloses a gate driver, a display device and a drive method of the gate driver. The gate driver comprises multiple buffer amplification output channels. Each buffer amplification output channel is connected with a first strobe unit which is used for controlling that gate signals are output to a scanning line. A second strobe unit is connected between every two adjacent output channels. The invention further discloses the display device and the drive method of the gate driver. First strobe switches and second strobe switches are arranged on gate drive output channels, the consumed power of the display device can be reduced to a great extent, the display flickering degree is decreased, the pulse currents of the output end of a gate are reduced, and therefore the harmful effect caused by overcurrents on the display device is avoided.
Description
Technical field
The present invention relates to display driver technical field, particularly relate to a kind of gate drivers, display device and driving method thereof.
Background technology
Fig. 1 is gate drivers configuration diagram in prior art, comprise: shift register, level shift circuit, buffer amplifier, the function of shift register is that the pulse STV of input is sequentially passed to each output according to fixing cycle T CPV, level shift circuit is to other voltage quasi position by front end logic signal voltage level modulation, such as, supply voltage VCC 3.3V is moved to on-state voltage VGG 30V, standoff voltage VEE-6V is put in ground voltage GND 0V translation, the function of buffer amplifier improves circuit to export driving force, reduce output waveform by the degree of load effect.
Fig. 2 is each signal output voltage waveform of gate drivers in prior art, STV is the trigger pulse of shift register, CPV is the frequency of operation of gate drivers, when STV is high level, trigger pulse sequentially can be passed to next output every a work period (TCPV) by shift register, OE signal is used to cover grid and exports, when OE is high level, all output voltages can be pulled to VEE voltage, Xon signal is used to open grid and exports, and when Xon is low level, all output can be pulled to VGG voltage.
Fig. 3 is a buffer amplifier schematic diagram in gate drivers in prior art, and Hyblid Buffer Amplifier district has multiple buffer amplifier, and buffer amplifier described in each independently accepts input signal VI, and individual output signals VO is to every scan line of display panel.This kind of driving circuit and driving method can make the charging voltage of display panel comparatively large, increase power consumption.
Summary of the invention
In view of this, in order to solve the problem, fundamental purpose of the present invention is to provide a kind of gate drivers, can significantly reduce panel consumed power, improve the flicker degree of panel, and reduce the pulse current of grid power supply cabling, to avoid burning of excess current grid power supply cabling.
For realizing above-mentioned object, one aspect of the present invention proposes a kind of gate drivers, signal is provided for the multi-strip scanning line for display device, comprise: multiple Hyblid Buffer Amplifier output channel, Hyblid Buffer Amplifier output channel described in one connects one first strobe unit, exporting sweep trace described in described signal to for controlling, between two adjacent described output channels, connecting one second strobe unit.
Further, the described output channel of the capable and N-th row of described first strobe unit gating N-1, during described second strobe unit non-gated, the described output channel that N-1 is capable is charged to the first voltage, and the described output channel of N-th row is charged to the second voltage;
The described output channel of the capable and N-th row of described first strobe unit non-gated N-1, during described second strobe unit gating, described N-th row is charged to required row voltage from medium voltage.
Further, described medium voltage is the half of first and second row voltage sum described.
Selectively, described first strobe unit or described second strobe unit are a switchgear.
Selectively, also comprise a Three-State amplifier, the input end of described Three-State amplifier connects the first strobe unit group, and its output terminal connects one the 3rd switchgear and controls described second strobe unit group.
Further, described Three-State amp.in connects enable signal, the input signal of described 3rd switchgear one end incoming level shift circuit, and one end connects the output terminal of described tri-state amplifiers, and the other end connects described second strobe unit.
Further, described switchgear is MOS transistor.
For realizing above-mentioned object, another aspect of the invention proposes a kind of display device, comprising: display panel, and connects the above-mentioned gate drivers of described display panel.
For realizing above-mentioned object, the present invention is a kind of display-apparatus driving method on the other hand, comprising: provide a gate drivers, provides signal for the multi-strip scanning line for display device;
Wherein, provide multiple Hyblid Buffer Amplifier output channel, Hyblid Buffer Amplifier output channel described in connects one first strobe unit, exports sweep trace described in described signal to for controlling, and connects one second strobe unit between two adjacent described output channels.
Further, the described output channel of the capable and N-th row of described first strobe unit gating N-1, during described second strobe unit non-gated, the described output channel that N-1 is capable is charged to the first voltage, and the described output channel of N-th row is charged to the second voltage;
The described output channel of the capable and N-th row of described first strobe unit non-gated N-1, during described second strobe unit gating, described N-th row is charged to required row voltage from medium voltage.
The present invention compared with prior art, its advantage is: the present invention is by arranging first and second strobe unit at the output terminal of gate drivers, can while guarantee can not produce pulse current, precharge is carried out to next line sweep trace, can realize, while reduction power consumption, saving the duration of charging of thin film transistor (TFT).
For making above-mentioned purpose of the present invention, feature and advantage become apparent, multiple preferred embodiment cited below particularly, and coordinate accompanying drawing, be described in detail as follows.
Accompanying drawing explanation
Fig. 1 is gate drivers configuration diagram in prior art;
In Fig. 2 prior art, gate drivers respectively outputs signal sequential chart;
Fig. 3 is local output channel circuit diagram in gate drivers in prior art;
Fig. 4 is for schematically showing local output channel circuit diagram in one embodiment of the invention gate drivers;
Fig. 5 A is for schematically showing gate drivers first driving condition schematic diagram of the present invention;
Fig. 5 B is for schematically showing gate drivers second driving condition schematic diagram of the present invention;
Fig. 6 is for schematically showing another embodiment of the present invention gate drivers configuration diagram;
Fig. 7 respectively outputs signal sequential chart for schematically showing gate drivers of the present invention.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the present invention is further illustrated.
Fig. 4 is for schematically showing local output channel circuit diagram in gate drivers of the present invention.Gate drivers framework provided by the invention is identical with the framework major part in background technology, and its difference is the textural difference of gate drivers output channel circuit.As shown in Figure 4, the wantonly two adjacent output channels of gate drivers of the present invention add one first switch module SW1, second switch assembly SW3 after each buffer amplifier, this first and second switch module SW1, SW3 are used for the output of switch buffer amplifier, and between every adjacent output terminal, adding one the 3rd switch module SW2, this switch module is used for adjacent two gate output terminal of conducting to be shared to carry out electric charge.
One aspect of the present invention proposes a kind of gate drivers, signal is provided for the multi-strip scanning line for display device, comprise: multiple Hyblid Buffer Amplifier output channel, Hyblid Buffer Amplifier output channel described in one connects one first strobe unit, exporting sweep trace described in described signal to for controlling, between two adjacent described output channels, connecting one second strobe unit.
Fig. 5 A is for schematically showing gate drivers first driving condition schematic diagram of the present invention, and Fig. 5 B is for schematically showing gate drivers second driving condition schematic diagram of the present invention.The driving of display device of the present invention is divided into two benches and carries out: with reference to figure 5A, interrupteur SW b short circuit, interrupteur SW 1 are opened a way, one buffer amplifier exports pulse on-state voltage VGG and exports Gate N-1 to grid, open the thin film transistor (TFT) of panel pixel and pixel charged, the adjacent buffer amplifier of one export pulse standoff voltage VEE to grid export Gate N-1 (N be greater than 2 natural number); With reference to figure 5B, interrupteur SW b opens a way by panel pixel charging complete, interrupteur SW 1 short circuit, grid being exported Gate N-1 voltage quasi position is that the switch short that VGG and next grid export between Gate N grid voltage VEE makes its electric charge share, electric charge shares rear two grid output voltages can be changed to (VGG+VEE)/2 gradually, following described N-th row is charged to required row voltage from medium voltage, and grid exports GateN and grid and exports GateN+1 and repeat above-mentioned two driving conditions and repeatedly go on.
Selectively, described first strobe unit or described second strobe unit are a switchgear, and described switchgear is MOS transistor.
Electric charge provided by the invention is shared rear buffer amplifier and is charged to VGG to grid output by (VGG+VEE)/2, and except reducing the power consumption of charging, charging current pulses now also can reduce by half, and the cabling that in face, cabling excess current causes can be avoided to burn.
Fig. 6 is for schematically showing gate drivers configuration diagram of the present invention, and gate drivers framework provided by the invention is identical with the framework major part in background technology, and its difference is the textural difference of gate drivers output channel circuit.As shown in Figure 6, interrupteur SW a function be used for interrupteur SW N (N be greater than 1 natural number), interrupteur SW b function is used for the output open circuit of buffer amplifier, this two switch is all controlled by enable (Enable) signal, interrupteur SW 1 function is used for two grid output charges to share, Sn (n=1 ~ N) is the output signal after shift registor collocation OE and Xon, LSn (n=1 ~ N) is the signal of Sn signal after level shift circuit and buffer amplifier amplify, and Gn (n=1 ~ N) is for inputing to the signal of panel grid channel.
Fig. 7 respectively outputs signal sequential chart for schematically showing gate drivers of the present invention.As shown in Figure 7, first by shift register output pulse wave to S1, voltage quasi position to amplify through level shift circuit and exports LS1 to via buffer amplifier by the signal of S1, Enable signal is now high level, interrupteur SW b exports buffer amplifier signal to panel gate channels G1, after panel pixel charging complete, Enable signal switching is low level, interrupteur SW b open circuit buffer amplifier stops exporting panel gate channels G1 to, interrupteur SW a short circuit now S1 signal is high level control SW1 short circuit, between grid channel G1 and gate pole channel G2 short circuit carry out electric charge share, grid channel G1 voltage is changed to (VDDG+VEEG)/2 by VDDG, grid channel G2 voltage is changed to (VDDG+VEEG)/2 by VEEG.
Wherein, in driving circuit provided by the invention, strobe unit may be selected to be switchgear, also may be selected to be Three-State amplifier and replaces, can be reached the effect of identical reduction drive circuit power consumption by flexible design.
Those of ordinary skill in the art is to be understood that, although specific embodiments of the invention are exemplarily illustrated with liquid crystal indicator, but have more than and be confined to this, such as, display device can also be applicable to flat panel TV, vehicle-mounted flat display, desk-top screen, Tablet PC etc.
The undeclared part related in the present invention is same as the prior art or adopt prior art to be realized.Be noted that for those skilled in the art; under the premise without departing from the principles of the invention; every above embodiment is done according to the technology of the present invention essence any simple modification, change and equivalent structure change, all belong in the protection domain of technical solution of the present invention.
Claims (10)
1. a gate drivers, signal is provided for the multi-strip scanning line for display device, comprise: multiple Hyblid Buffer Amplifier output channel, Hyblid Buffer Amplifier output channel described in one connects one first strobe unit, exporting sweep trace described in described signal to for controlling, between every two adjacent described output channels, connecting one second strobe unit.
2. gate drivers according to claim 1, is characterized in that:
The described output channel of the capable and N-th row of described first strobe unit gating N-1, during described second strobe unit non-gated, the described output channel that N-1 is capable is charged to the first voltage, and the described output channel of N-th row is charged to the second voltage;
The described output channel of the capable and N-th row of described first strobe unit non-gated N-1, during described second strobe unit gating, described N-th row is charged to required row voltage from medium voltage.
3. gate drivers according to claim 2, is characterized in that: described medium voltage is the half of first and second row voltage sum described.
4. according to the gate drivers one of claims 1 to 3 Suo Shu, it is characterized in that: described first strobe unit or described second strobe unit are a switchgear.
5. according to the gate drivers one of claims 1 to 3 Suo Shu, it is characterized in that: also comprise a Three-State amplifier, the input end of described Three-State amplifier connects the first strobe unit group, and its output terminal connects one the 3rd switchgear and controls described second strobe unit group.
6. gate drivers according to claim 6, it is characterized in that: described Three-State amp.in connects enable signal, the input signal of described 3rd switchgear one end incoming level shift circuit, one end connects the output terminal of described tri-state amplifiers, and the other end connects described second strobe unit.
7. according to the gate drivers one of claim 4 to 6 Suo Shu, it is characterized in that: described switchgear is MOS transistor.
8. a display device, comprising: display panel, and connects the gate drivers as described in any one of claim 1-7 of described display panel.
9. a display-apparatus driving method, comprising: provide a gate drivers, provides signal for the multi-strip scanning line for display device; Wherein, provide multiple Hyblid Buffer Amplifier output channel, Hyblid Buffer Amplifier output channel described in connects one first strobe unit, exports sweep trace described in described signal to for controlling, and connects one second strobe unit between two adjacent described output channels.
10. display-apparatus driving method according to claim 9, is characterized in that:
The described output channel of the capable and N-th row of described first strobe unit gating N-1, during described second strobe unit non-gated, the described output channel that N-1 is capable is charged to the first voltage, and the described output channel of N-th row is charged to the second voltage;
The described output channel of the capable and N-th row of described first strobe unit non-gated N-1, during described second strobe unit gating, described N-th row is charged to required row voltage from medium voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410813968.6A CN104464598A (en) | 2014-12-24 | 2014-12-24 | Gate driver, display device and drive method of gate driver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410813968.6A CN104464598A (en) | 2014-12-24 | 2014-12-24 | Gate driver, display device and drive method of gate driver |
Publications (1)
Publication Number | Publication Date |
---|---|
CN104464598A true CN104464598A (en) | 2015-03-25 |
Family
ID=52910560
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410813968.6A Pending CN104464598A (en) | 2014-12-24 | 2014-12-24 | Gate driver, display device and drive method of gate driver |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104464598A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109410879A (en) * | 2018-12-19 | 2019-03-01 | 武汉华星光电技术有限公司 | Liquid crystal display panel and its driving method |
CN109859711A (en) * | 2019-03-06 | 2019-06-07 | 深圳市华星光电半导体显示技术有限公司 | A kind of grid chip |
CN111261125A (en) * | 2020-03-19 | 2020-06-09 | 合肥京东方显示技术有限公司 | Data driver, control method thereof and display device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101944333A (en) * | 2009-07-07 | 2011-01-12 | 华映视讯(吴江)有限公司 | Gate driving device for liquid crystal display device |
CN102184700A (en) * | 2010-12-17 | 2011-09-14 | 友达光电股份有限公司 | Source electrode driving circuit, display and operation method thereof |
CN102568409A (en) * | 2010-12-15 | 2012-07-11 | 联咏科技股份有限公司 | Gate driving method and device of liquid crystal display |
US20120280961A1 (en) * | 2011-05-03 | 2012-11-08 | Silicon Works Co., Ltd | Liquid crystal panel driving circuit for display stabilization |
-
2014
- 2014-12-24 CN CN201410813968.6A patent/CN104464598A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101944333A (en) * | 2009-07-07 | 2011-01-12 | 华映视讯(吴江)有限公司 | Gate driving device for liquid crystal display device |
CN102568409A (en) * | 2010-12-15 | 2012-07-11 | 联咏科技股份有限公司 | Gate driving method and device of liquid crystal display |
CN102184700A (en) * | 2010-12-17 | 2011-09-14 | 友达光电股份有限公司 | Source electrode driving circuit, display and operation method thereof |
US20120280961A1 (en) * | 2011-05-03 | 2012-11-08 | Silicon Works Co., Ltd | Liquid crystal panel driving circuit for display stabilization |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109410879A (en) * | 2018-12-19 | 2019-03-01 | 武汉华星光电技术有限公司 | Liquid crystal display panel and its driving method |
WO2020124772A1 (en) * | 2018-12-19 | 2020-06-25 | 武汉华星光电技术有限公司 | Liquid crystal display panel and driving method therefor |
CN109859711A (en) * | 2019-03-06 | 2019-06-07 | 深圳市华星光电半导体显示技术有限公司 | A kind of grid chip |
CN109859711B (en) * | 2019-03-06 | 2020-08-04 | 深圳市华星光电半导体显示技术有限公司 | Grid chip |
WO2020177222A1 (en) * | 2019-03-06 | 2020-09-10 | 深圳市华星光电半导体显示技术有限公司 | Gate chip |
CN111261125A (en) * | 2020-03-19 | 2020-06-09 | 合肥京东方显示技术有限公司 | Data driver, control method thereof and display device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11081061B2 (en) | Shift register, gate driving circuit, display device and gate driving method | |
CN108573673B (en) | Shift register, drive circuit and display device | |
CN101320171B (en) | LCD and method for improving power-off ghost | |
KR100857479B1 (en) | Shift register circuit and image display device provided with the same | |
CN104766586B (en) | Shift register cell, its driving method, gate driving circuit and display device | |
CN102831867B (en) | Grid driving unit circuit, grid driving circuit of grid driving unit circuit, and display | |
CN103761952B (en) | A kind of scan drive circuit of liquid crystal panel, liquid crystal panel and a kind of driving method | |
CN103021359B (en) | A kind of array base palte and drived control method thereof and display device | |
US10593278B2 (en) | Display device subpixel activation patterns | |
TWI404036B (en) | Shift register | |
JP3791452B2 (en) | Display device, driving method thereof, and portable terminal device | |
WO2018145347A1 (en) | Display drive circuit and liquid crystal display panel | |
CN105405406A (en) | Gate drive circuit and display using same | |
KR20170096023A (en) | Goa circuit for liquid crystal display device | |
CN103761954B (en) | Display floater and gate drivers | |
CN110880304B (en) | Shift register unit, grid driving circuit, display device and driving method | |
CN107016971A (en) | A kind of scanning circuit unit, gate driving circuit and scanning signal control method | |
CN105390086A (en) | GOA (gate driver on array) circuit and displayer using same | |
CN103854587B (en) | Gate driver circuit and its unit and a kind of display | |
CN108766377B (en) | Display panel and display device | |
CN113035111B (en) | Gate drive circuit, drive device and display device | |
WO2022062415A1 (en) | Charge sharing circuit and method, display driving module and display apparatus | |
CN101593561B (en) | Liquid crystal display | |
CN101916540A (en) | Clock pulse signal generation method | |
CN103578402A (en) | Display panel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150325 |