CN104425447B - Semiconductor device - Google Patents
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- CN104425447B CN104425447B CN201310398727.5A CN201310398727A CN104425447B CN 104425447 B CN104425447 B CN 104425447B CN 201310398727 A CN201310398727 A CN 201310398727A CN 104425447 B CN104425447 B CN 104425447B
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Abstract
The invention provides a semiconductor device which comprises an electric fuse positioned on the surface of a semiconductor substrate, and a first conductive plug and a second conductive plug which are respectively positioned on a positive electrode and a negative electrode of the electric fuse, wherein each of the first conductive plug and the second conductive plug comprises an end part and a neck part; the end parts are arranged in a manner of being close to a middle section, and the neck parts are arranged in a manner of being far away from the middle section; the widths of the first conductive plug and the second conductive plug in the direction perpendicular to the middle section of the electric fuse are greater than the widths of the neck parts. After voltage is applied to the first conductive plug and the second conductive plug, current is concentrated to the end parts, and heat generated on the first conductive plug and the second conductive plug is concentrated to the end parts, so that the fusing rate of the middle section of the electric fuse is increased.
Description
Technical field
The present invention relates to quasiconductor preparation field, more particularly, to a kind of semiconductor device.
Background technology
In integrated circuit fields, electric fuse（Fuse）Refer to that in integrated circuits resistance can be significantly alterred（By
Low resistance state to high-impedance state changes）Or the connecting line that can be fused.
Electric fuse main usess include：（1）The defective circuit on same chip is substituted for starting redundant circuit, from
And effectively improve process rate.Redundant circuit in integrated circuit is connected with electric fuse, once detection finds that integrated circuit has
Defect, so that it may using electric fuse reparation or the defective circuit of replacement；（2）For integrated circuit programmed functions.By electric smelting
Silk be arranged on programmed circuit, in integrated circuit programmed process, by high voltage fuse electric fuse produce open circuit with
The write of information 1 is completed, and the electric fuse not disconnected keeps connection status, as state 0.
As shown in figure 1, electric fuse is made using metal or metal silicide, including negative electrode 11 and anode 12, and be located at
The interlude 13 of the fine strip shape between negative electrode 11 and anode 12.The negative electrode 11 and the surface of anode 12 arrange multiple conductive plungers
15。
Existing electric fuse is to produce open circuit using electromigration (Electron Migration, abbreviation EM) effect
's.EM effects are via movement that is temperature and electronic impact (Electron Wind) plus taking advantage of metal ion caused by effect.
With continued reference to shown in Fig. 1, applied after enough pulse voltages, in negative electrode 11 and anode to electric fuse by the conductive plunger 15
Electric current is transmitted between 12, and heat energy is produced by the electric current, electric fuse is brought rapidly up so that electric fuse produces EM phenomenons, causes electricity
Fuse 12 fuses at short notice.
In integrated circuit actual production technique, metal or metal silicide are simultaneous with integrated circuit other assemblies material
Capacitive is poor, thus in order to improve the compatibility of electric fuse and IC manufacturing, electric fuse is included using metal or metallic silicon
Conductive layer 21 made by compound and in conductive layer 21, and the polycrystalline doped with ion being arranged between Semiconductor substrate 10
Silicon layer 22.Wherein, multiple conductive plungers 15 are provided with the conductive layer 21.
During use, from conductive plunger to electric fuse pulse voltage is applied, electric current is transferred to into conduction by conductive plunger
Layer 21, makes conductive layer 21 fuse to produce enough thermics；Meanwhile, the heat transfer on conductive layer 21 is to polysilicon layer 22 so that
There is EM phenomenons in the dopant ion in polysilicon layer 22, another section is shifted to by one end of electric fuse, until polysilicon based on high temperature
The ion adulterated in layer 22 exhausts, to improve the resistance of polysilicon layer 22.
But in actual use, the fusing of electric fuse is often difficult to thoroughly fusing, the fusing yield of electric fuse compared with
Connector 15 occurs damage often after difference, and electric fuse fusing, and thus reduces the performance that integrated circuit is subsequently used.
The content of the invention
The problem that the present invention is solved is to provide a kind of semiconductor device, to overcome existing electric fuse to be difficult to thoroughly fusing,
Electric fuse fusing yield is low, and the problem of damage easily occurs in the conductive plunger on electric fuse.
To solve the above problems, described semiconductor device, including：
Positioned at the electric fuse of semiconductor substrate surface, the electric fuse includes being located at the anode and negative electrode at two ends respectively, with
And the interlude positioned between anode and negative electrode；
The first conductive plunger and the second conductive plunger being located at respectively on the anode and negative electrode；
First conductive plunger and the second conductive plunger include end and cervical region, and the end is near the electric fuse
Interlude, cervical region is away from the electric fuse interlude；
Wherein width of the end of the first conductive plunger on the direction vertical with the electric fuse interlude is more than first
The cervical region of conductive plunger, or width of the end of the second conductive plunger on the direction vertical with the electric fuse interlude be more than
The cervical region of the second conductive plunger.
Alternatively, width of the end of first conductive plunger on the direction vertical with the electric fuse interlude is big
In the anode width；
Or width of the end of second conductive plunger on the direction vertical with the electric fuse interlude is more than institute
State the width of negative electrode.
Alternatively, the end of first conductive plunger extends in the both sides in the direction vertical with the electric fuse interlude
To outside the both sides of the anode；
The end of second conductive plunger extends to described in the both sides in the direction vertical with the electric fuse interlude
Outside the both sides of negative electrode.
Alternatively, width of the cervical region of first conductive plunger on the direction vertical with the electric fuse interlude is little
In the width equal to the anode；
Width of the cervical region of second conductive plunger on the direction vertical with the electric fuse interlude is less than or equal to
The width of the negative electrode.
Alternatively, the end of first conductive plunger is in the length and cervical region along the electric fuse interlude bearing of trend
Length ratio be 0.3 to 0.6；
The end of second conductive plunger is in the length along the electric fuse interlude bearing of trend and the length of cervical region
Than for 0.3 to 0.6.
Alternatively, the anode with the vertical direction of the interlude on width and first conductive plunger end
The ratio of width is 1:2 to 1:5；
The negative electrode with the vertical direction of the interlude on width and second conductive plunger end width
Than for 1:2 to 1:5.
Alternatively, the conductive plunger is shaped as "T"-shaped.
Alternatively, first conductive plunger is provided only with the anode；An institute is provided only with the cathode
State the second conductive plunger.
Alternatively, the interlude width is less than the anode and the width of negative electrode.
Alternatively, first conductive plunger and the second conductive plunger are tungsten plug.
Compared with prior art, technical scheme has advantages below：
First conductive plunger and the second conductive plunger include end and cervical region, and the end is near the centre
Section, cervical region is arranged away from the interlude；Wherein, the end of the first conductive plunger is in the side vertical with the electric fuse interlude
Width upwards is more than the cervical region of the first conductive plunger, or the end of the second conductive plunger is vertical with the electric fuse interlude
Direction on width more than the second conductive plunger cervical region.After to the conductive plunger applied voltage, based on said structure,
The magnitude of current of the end of first conductive plunger and the second conductive plunger more than cervical region the magnitude of current, it is thus described first conductive
The heat of connector and the second conductive plunger concentrates on the end, i.e. the heat of first conductive plunger and the second conductive plunger
Amount concentrates on the side of the interlude near electric fuse, so as to electric fuse can be accelerated to fuse, and causes electric fuse fusing more thoroughly,
Improve the yield of electric fuse fusing.
Further, the end of first conductive plunger is prolonged in the both sides in the direction vertical with the electric fuse interlude
Extend outside the both sides of the anode；The end of second conductive plunger in the direction vertical with the electric fuse interlude two
Side is extended to outside the both sides of the negative electrode.Above-mentioned technical proposal increased the contact area of end and electric fuse, improve electric fuse
On homogeneous current distribution degree, conductive plunger to electric current on electric fuse and conductive plunger, and the heat that produces of electric current is steady
It is qualitative, it is to avoid damaging occurs in conductive plunger.
Description of the drawings
Fig. 1 is the schematic diagram of existing electric fuse；
Fig. 2 to Figure 12 is the schematic diagram of the structure of the semiconductor device that one embodiment of the invention is provided；
Figure 13 is equipped with the electric fuse of existing conductive plunger and is passed through the substep figure of the isothermal line after electric current；
Figure 14 is that the semiconductor device that one embodiment of the invention is provided is passed through the substep figure of the isothermal line after electric current；
The schematic diagram of the structure of the semiconductor device that Figure 15 another embodiment of the present invention is provided.
Specific embodiment
As described in background, the fusing yield of existing electric fuse is poor, and during use, conductive plunger occurs
Damage phenomenon.With reference to its reason with reference to shown in Fig. 1, is analyzed, existing electric fuse is provided with multiple conductions on anode and negative electrode
Connector, during use, after to conductive plunger applied voltage, based on be via each conductive plunger to electric fuse conveying electricity
Stream, produces heat energy, thus the heat energy substep on electric fuse relatively dissipates, and centralized heat energy degree is poor, and heat energy cannot rapidly be transferred to electricity
The interlude of fuse with the electric fuse that fuses, so as to cause electric fuse fusing yield poor.
And, in electric fuse conveying current course, electric current is more concentratedly delivered to each conductive plunger, thus
Larger heat energy can be produced based on electric current on conductive plunger, cause conductive plunger to be damaged, destroy conductive plunger and electric fuse
Bonding strength, and then affect the electric current subsequently to the electric fuse time unimpeded and heat transfer, so as to affect the fusing of electric fuse good
Rate.
For this purpose, the invention provides a kind of semiconductor device, including the electric fuse being arranged in Semiconductor substrate, the electricity
Fuse includes the interlude being respectively arranged between the anode at two ends and negative electrode, and negative electrode and anode.The anode of the electric fuse
The first conductive plunger is provided with, negative electrode is provided with the second conductive plunger, and first conductive plunger and the second conductive plunger connect
The metal interconnecting wires of semiconductor device, for conveying electric current to electric fuse.
First conductive plunger and the second conductive plunger include end and cervical region, and the end is near the centre
Section, cervical region is arranged away from the interlude.On the direction vertical with the interlude, first conductive plunger（With it is described
Second conductive plunger）End width more than the cervical region width, via the conductive plunger of said structure to electric fuse
During conveying electric current, electric current can concentrate on the end, that is, concentrate on the conductive plunger near the interlude side, and thus
So that heat also focuses on the end, the heat of concentration can accelerate electric fuse fusing speed, and the fusing yield of electric fuse.
And based on above-mentioned first conductive plunger and the structure of the second conductive plunger so that electric current conveying is evenly stablized, it is to avoid heat
Excessively concentrate and cause the first conductive plunger and the second conductive plunger impaired in local.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent from, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Accompanying drawing 2 is to the structural representation that accompanying drawing 10 is semiconductor device of the present invention.
With reference to shown in Fig. 2, the semiconductor device that the present embodiment is provided includes Semiconductor substrate 100, positioned at the quasiconductor
Insulating barrier 110 on substrate 100, and the electric fuse on the insulating barrier 110.
In the present embodiment, the electric fuse includes the polysilicon layer 130 being located on insulating barrier 110 and positioned at polysilicon layer
Conductive layer 140 on 130.
With reference to reference to shown in Fig. 3, Fig. 3 is the top view of semiconductor device in Fig. 2.In the present embodiment, the conductive layer 140
Including negative electrode 141 and anode 142 positioned at two ends, and the interlude 143 between the negative electrode 141 and anode 142.For
It is easy to subsequent descriptions, using double-head arrow BB ' to the bearing of trend as interlude 143, double-head arrow CC ' is to for perpendicular to interlude
143 direction.
Width along CC ' directions, the negative electrode 141 and anode 142 is more than the width of the interlude 143 so that described
Electric fuse is roomy in two, middle tiny structure.
The Semiconductor substrate 100 can be silicon substrate, or germanium, germanium silicon, gallium arsenide substrate or silicon-on-insulator lining
Bottom, common Semiconductor substrate can be used as the Semiconductor substrate in the present embodiment.
In the present embodiment, the material of the Semiconductor substrate 100 is silicon.
The insulating barrier 110 can be the dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride.Forming method is chosen as CVD
（Chemical vapor deposition）、ALD（Atomic layer deposition method）Or the technique such as thermal oxidation method.
In the present embodiment, the insulating barrier 110 is silicon oxide, and its forming method is thermal oxidation method.
The conductive layer 140 can be, such as Cu, Al metal level, or the metal silication doped with metal ion
Nitride layer.
In the present embodiment, the conductive layer 140 is metal silicide layer.
The forming process of the electric fuse includes：
With reference to shown in Fig. 4, first provide Semiconductor substrate 100, and using thermal oxidation method in the Semiconductor substrate 100 shape
Into silicon oxide layer using as insulating barrier 110.Form polysilicon layer 120 on the insulating barrier 110 afterwards.
In the present embodiment, the forming method of the polysilicon layer 120 is CVD.
With reference to Fig. 5 and Fig. 6, wherein, Fig. 6 is the top view of the semiconductor device in Fig. 5.The polysilicon layer 120 is etched,
Formed along BB ' to two ends 131 and 132 are roomy, middle 133 tiny structures, i.e. polysilicon layer 130.It is described in the present embodiment
The structure of polysilicon layer 130 is corresponding with the conductive coating structure subsequently to be formed.
Etching the concrete technology of the polysilicon layer 120 may include：
First form photoresist layer on the polysilicon layer 120（Do not show in figure）, afterwards using photoetching technique, patterning
The photoresist layer, forms patterns of openings；Polycrystal layer 120 is with shape described in the photoresist layer after the patterning as mask etching
It is roomy into two, the polysilicon layer 130 of middle small structure.Above-mentioned technique is existing maturation process, is no longer gone to live in the household of one's in-laws on getting married secondary
State.
In alternative, after the polysilicon layer 130 is formed, can also be to the polysilicon in doped p-type or N in 130
Type ion, to increase the polysilicon in 130 electric conductivity, it is also existing maturation process, be will not be described here.
Referring next to shown in Fig. 7, after forming the polysilicon layer 130, using PVD（Physical vapour deposition (PVD)）, to described many
The metal ions such as Ni, Co, Pt are deposited on crystal silicon layer 130, metal ion is formed, afterwards at 205 DEG C~500 DEG C, is annealed
Technique so that the metal ion such as described Ni, Co, Pt and polysilicon layer 130 react, on the top layer of the polysilicon layer 130 gold is formed
Category silicide layer, using as the conductive layer 140.
The conductive layer 140 matches with the structure of the polysilicon layer 130, is to two ends 141 and 142 are wide along BB '
Greatly, the tiny structure of interlude 143.The roomy two ends 141 and 142 of the conductive layer 140 respectively as electric fuse negative electrode and
Anode.When using, the negative pole and positive pole of external power source are connected by the negative electrode and anode of electric fuse.From external power source to the electric smelting
Silk applies after electric current, and electric current produces heat, with the interlude 143 that fuses.
With reference to shown in Fig. 8 and Fig. 9, wherein, the top view of the semiconductor device that Fig. 8 is provided for the present embodiment, Fig. 9 is Fig. 8
In semiconductor device along A-A ' to cross-sectional view.
The semiconductor device that the present embodiment is provided also includes that be located on the negative electrode 141 and anode 142 first is conductive slotting
The conductive plunger 152 of plug 151 and second.Power supply outside the connection of first and second conductive plunger 151 and 152, with to described
Electric fuse conveys electric current.
With reference to shown in Fig. 8, first and second conductive plunger 151 and 152 includes cervical region and end, and along figure
BB ' is to the end of first and second conductive plunger 151 and 152 is arranged near the interlude 143 of the conductive layer.
As a example by positioned at the first conductive plunger 151 on the negative electrode 141, first conductive plunger 151 includes end
1511 and cervical region 1512, the end 1511 is fixedly connected with cervical region 1512 along the BB ' directions, and the end 1511 is near institute
State interlude 143 to arrange.Along CC ' directions, the width h2 of the end 1511 is more than the width h1 of the cervical region 1512, and edge
The both sides of the CC ' ends 1511 are extended to outside the both sides of the cervical region 1512, and the conductive plunger 1511 is in T-shape shape.
In use, the second conductive plungers of external power source anode Jing 152 convey electric current to electric fuse.Wherein,
In one conductive plunger 151, based on along CC ' directions, the width of the end 1511 is more than the width of the cervical region 1512, and described first
The magnitude of current on the end 1511 of conductive plunger 151 is more than the magnitude of current on cervical region 1512, thus first conductive plunger 151
On heat concentrate on the end 1511, i.e. the heat on first conductive plunger 151 is concentrated near the centre
The side of section 143, so as to be conducive to accelerating the fusing speed of interlude 143 of electric fuse, improves the fusing yield of electric fuse.
In the present embodiment, a conductive plunger is only set on the negative electrode 141 and anode 142.Or with the
As a example by one conductive plunger 151, along CC ' directions, the width of the negative electrode 141 is h5, the end of first conductive plunger 151
1511 width h2 is more than the width h5 of the negative electrode 141, and the both sides of the end 1511 extend to the outside of the negative electrode 141.
In said structure, to after first conductive plunger 151 conveying electric current, the magnitude of current of the concentration of end 1511 can be effectively increased, with
The heat produced based on electric current in end 1511 and the contact site of negative electrode 141 is improved, so that the negative electrode of the electric fuse
On 141, the position near the interlude 143 is fully heated, and to accelerate the fusing speed of the interlude 143, and makes described
Interlude 143 fuses more thorough.
In the present embodiment, the ratio of the width h2 of the end 1511 and width h5 of the negative electrode 141, h2：H5=2~
5.Width h5 such as the negative electrode 141 is 35~40nm, and the width of the end 1511 is 70~200nm.Its concrete numerical value root
Determine according to practical situations such as current intensity when such as using.
It should be noted that in other embodiments of the invention, the width h2 of the end 1511 can also be equal to institute
The width h5 of negative electrode 141 is stated, heat localization effects do not have said structure effect good.
Compare with multiple conductive plungers of setting on anode relative to the existing negative electrode in electric fuse, the present embodiment only exists
One the first conductive plunger and the second conductive plunger are set on the negative electrode and anode of the electric fuse, so as to increased first and the
Two conductive plungers and the anode and the contact area of negative electrode of electric fuse, improve on electric smelting wire cathode and anode, are passed through after electric current
The heat substep uniformity produced on electric smelting wire cathode and anode, it is to avoid the heat produced based on electric current excessively concentrates on each conduction
On connector, and conductive plunger is caused to damage, so as to cause to reduce the defect of electric fuse and conductive plunger bond strength, effectively to carry
High electric fuse job stability；And first and second conductive plunger is near the part of electric fuse interlude（That is end）Edge
The width in CC ' directions is more than remainder（That is, cervical region）Width, first conductive plunger, the second conductive plunger can be caused,
And negative electrode or the heat on anode are concentrated on rapidly, on the part of the interlude of electric fuse, so as to improve electric fuse
Fusing speed.
In the present embodiment, still by taking first conductive plunger 151 as an example, along BB ' to length h3 of the end 1511
With the ratio of length h4 of the cervical region 1512, h3：H4=0.3~0.6.As the end 1511 length h3 be 60~
100nm, length h4 of the cervical region 1512 is 100~333nm.
The preparation process of above-mentioned conductive plunger may include：
With reference to shown in Figure 10, after the conductive layer 140 is formed, formed in the insulating barrier 110 and the top of conductive layer 140
Dielectric layer 160, the dielectric layer 160 is chosen as the dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride.
In the present embodiment, the material of the dielectric layer 160 is silicon oxide, and its formation process is CVD（Chemical vapour deposition technique）.
With reference to shown in Figure 11, in dielectric layer 160, open above the negative electrode 141 and anode 142 of the conductive layer 140
If first through hole 161 and with the second through hole 162, until exposing the negative electrode 141 and anode 142.
Opening up the detailed process of the through hole 162 of the first through hole 161 and second includes, can be in the top of the dielectric layer 160
Cover hard mask layer（Do not show in figure）And photoresist layer（Do not show in figure）；And it is described using exposure, developing technique patterning
After photoresist layer, patterned mask layer is carved by mask of photoresist layer, and with the hard mask layer after patterning as mask etching institute
Dielectric layer 160 is stated, the through hole 162 of first through hole 161 and second is formed.The etching technics of above-mentioned dielectric layer 160 is this area
Maturation process, will not be described here.
With reference to reference to shown in Figure 12, Figure 12 is the top view of the semiconductor device in Figure 11.First and second through hole
161st, 162 structure and follow-up the first conductive plunger 151 to be formed and the second conductive plunger 152（Shown in Fig. 8）Structure phase
Seemingly.By taking the first through hole 161 as an example, it includes end 1611 and cervical region 1612, along CC ' directions, the width of the end 1611
Degree is more than the cervical region 1612, and the end 1611 is arranged near the interlude 143 of the electric fuse structure.Its concrete structure
With reference to above-mentioned first conductive plunger 151（Shown in Fig. 8）, will not be described here.
Afterwards, the metal materials such as Cu, Al, Wu can be filled in first and second through hole 161,162 using CVD techniques
Material, to form the first and second conductive plungers 151 and 152 as shown in Figure 8 and Figure 9.
In the present embodiment, the conductive plunger is tungsten plug.
With the present embodiment provide semiconductor device as embodiment, be provided with conventional conductive connector electric fuse as a comparison
Example.
Comparative example and embodiment include identical electric fuse, and anode and Cathode width are 40nm, interlude width 26nm, in
Between segment length 62nm.
Comparative example：Each width that arranges is 10nm on the anode and negative electrode, and length is 6 conductive plungers of 10nm；
Embodiment：1 above-mentioned conductive plunger in T-shape structure is respectively set on the anode and negative electrode, wherein, end
Width is 160nm, and length is 80nm；Neck width 30nm, length 80nm.
Test process：Apply 30mA, the pulse current of 2 microseconds to embodiment respectively.
And as a result refer to shown in Figure 13 and Figure 14.
Wherein, Figure 13 is the Isothermal Line Distribution figure in comparative example, and Figure 14 is the Isothermal Line Distribution figure of embodiment.Figure 13 and 14
In, 300 signs are metal interconnecting wires, 200 be conductive plunger, 141 for electric fuse negative electrode, 143 for electric fuse interlude.
In Figure 13,1,2,3,4 are different heat step regions, wherein, the temperature in 1,2,3, No. 4 areas is successively decreased according to this, No. 1 area
Temperature be 8.0e+02K, the temperature in No. 2 areas is 7.2e+02K, and the temperature in No. 3 areas is 6.3e+02K, and the temperature in No. 4 areas is
5.5e+02K。
As shown in Figure 13, in comparative example, on interconnection line at conductive plunger 200（I.e. No. 1 area）Temperature with respect to highest,
Afterwards, No. 1 area of distance is more remote, and temperature is lower.Analyzing its reason is probably：First, the substep of heat and interconnection line, conductive plunger
And the material of electric fuse is related；Secondly, in comparative example, electronics is moved as indicated by the arrow, in interconnection line 300 and conduction
There is jam in the linking corner of connector 200, electronics（crowding）, thus the electric field intensity highest of the corner, because
And by maximum from thermogenetic heat.
In Figure 14, a, b, c, d, e are different heat step regions, wherein, the temperature in a, b, c, d, e area is successively decreased according to this, a
The temperature in number area is 1.1e+03K, and the temperature in b areas is 9.8e+02K, and the temperature in c areas is 8.4e+02K, the temperature in d areas
For 7.1e+02K, the temperature in e areas is 5.7e+02K.
As shown in Figure 14, in embodiment, the upper end of the end 1511 of the first conductive plunger 151（That is a areas）Temperature phase
It is afterwards the cervical region 1512 of the first conductive plunger 151 to highest（That is, followed by, more remote apart from b areas, heat is less in b areas.
Analyzing its reason is probably：Width of the end 1511 along CC ' directions is more than the width of cervical region 1512（As shown in Figure 8）, the
The heat of one conductive plunger 151 focuses mostly in end 1511, and, the moving direction based on electronics as shown by arrows, is being interconnected
There is jam in the corner that is connected of line 300 and conductive plunger 200, and end 1511 and the junction of cervical region 1512, electronics
（crowding）, thus the corner that is connected of interconnection line 300 and conductive plunger 200, and end 1511 and cervical region 1512 connect
Place's electric field intensity highest, thus by maximum from thermogenetic heat.
Thus, under the same conditions, compared to existing electric fuse, when using, the semiconductor device that the present embodiment is provided
More conducively heat is in conductive plunger and the negative electrode of electric fuse（Or anode）Contact site concentrate, so as to can effectively improve electric fuse melt
Disconnected speed and yield.
With reference to shown in Figure 15, in the other embodiment in addition to the present embodiment, first conductive plunger 171 or the second is conductive
Connector 172 can also be " L-type ".
By taking first conductive plunger 171 as an example, end 1711 along CC ' to width more than cervical region 1712 width, institute
State structure still beneficial in the heat of first conductive plunger 171 in end, so as to improve electric fuse fusing speed and
Yield.These simple changes are within the scope of the present invention.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, without departing from this
In the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (10)
1. a kind of semiconductor device, including：
Positioned at the electric fuse of semiconductor substrate surface, the electric fuse is included respectively positioned at the anode and negative electrode at two ends, Yi Jiwei
Interlude between anode and negative electrode；
The first conductive plunger and the second conductive plunger being located at respectively on the anode and negative electrode, it is characterised in that described first
Conductive plunger and the second conductive plunger include end and cervical region, the end near the electric fuse interlude, cervical region away from
The electric fuse interlude；
Wherein width of the end of the first conductive plunger on the direction vertical with the electric fuse interlude is conductive more than first
The cervical region of connector, or width of the end of the second conductive plunger on the direction vertical with the electric fuse interlude is more than second
The cervical region of conductive plunger.
2. semiconductor device as claimed in claim 1, it is characterised in that the end of first conductive plunger with the electricity
Width on the vertical direction of fuse interlude is more than the anode width；
Or width of the end of second conductive plunger on the direction vertical with the electric fuse interlude is more than described the moon
The width of pole.
3. semiconductor device as claimed in claim 2, it is characterised in that the end of first conductive plunger with the electricity
The both sides in the vertical direction of fuse interlude are extended to outside the both sides of the anode；
The end of second conductive plunger extends to the negative electrode in the both sides in the direction vertical with the electric fuse interlude
Both sides outside.
4. semiconductor device as claimed in claim 1, it is characterised in that the cervical region of first conductive plunger with the electricity
Width of the width on the vertical direction of fuse interlude less than or equal to the anode；
Width of the cervical region of second conductive plunger on the direction vertical with the electric fuse interlude is less than or equal to described
The width of negative electrode.
5. semiconductor device as claimed in claim 1, it is characterised in that the end of first conductive plunger is along the electricity
The ratio of the length of fuse interlude bearing of trend and the length of cervical region is 0.3 to 0.6；
The end of second conductive plunger is in the length ratio of the length along the electric fuse interlude bearing of trend and cervical region
0.3 to 0.6.
6. semiconductor device as claimed in claim 1, it is characterised in that the anode is in the vertical direction with the interlude
On width and the first conductive plunger end width ratio be 1:2 to 1:5；
The negative electrode is being with the ratio of the width of the end of the second conductive plunger with the width in the vertical direction of the interlude
1:2 to 1:5.
7. semiconductor device as claimed in claim 1, it is characterised in that the conductive plunger is shaped as "T"-shaped.
8. semiconductor device as claimed in claim 1, it is characterised in that be provided only with the anode one it is described first conductive
Connector；Second conductive plunger is provided only with the cathode.
9. semiconductor device as claimed in claim 1, it is characterised in that the interlude width is less than the anode and negative electrode
Width.
10. semiconductor device as claimed in claim 1, it is characterised in that first conductive plunger and the second conductive plunger
For tungsten plug.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310398727.5A CN104425447B (en) | 2013-09-04 | 2013-09-04 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310398727.5A CN104425447B (en) | 2013-09-04 | 2013-09-04 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104425447A CN104425447A (en) | 2015-03-18 |
| CN104425447B true CN104425447B (en) | 2017-05-17 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5882998A (en) * | 1996-12-27 | 1999-03-16 | Vlsi Technology, Inc. | Low power programmable fuse structures and methods for making the same |
| CN1424763A (en) * | 2001-12-04 | 2003-06-18 | 株式会社东芝 | Programmable element for programming utilizing resistance value change by phase change |
| CN1716591A (en) * | 2004-06-29 | 2006-01-04 | 松下电器产业株式会社 | Semiconductor device and manufacturing method thereof |
| CN102655136A (en) * | 2011-02-11 | 2012-09-05 | 海力士半导体有限公司 | Semiconductor chip and method for manufacturing the same |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5882998A (en) * | 1996-12-27 | 1999-03-16 | Vlsi Technology, Inc. | Low power programmable fuse structures and methods for making the same |
| CN1424763A (en) * | 2001-12-04 | 2003-06-18 | 株式会社东芝 | Programmable element for programming utilizing resistance value change by phase change |
| CN1716591A (en) * | 2004-06-29 | 2006-01-04 | 松下电器产业株式会社 | Semiconductor device and manufacturing method thereof |
| CN102655136A (en) * | 2011-02-11 | 2012-09-05 | 海力士半导体有限公司 | Semiconductor chip and method for manufacturing the same |
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