CN104422903A - Debugging system and method for sensor using superconducting quantum interference device - Google Patents
Debugging system and method for sensor using superconducting quantum interference device Download PDFInfo
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Abstract
The invention provides a debugging system and method for a sensor using a superconducting quantum interference device. The debugging system at least comprises a digital voltage converter which is connected with a readout circuit and the superconducting quantum interference device and is used for converting an externally-connected power source into bias voltage of the superconducting quantum interference device and bias voltage of the readout circuit respectively, and an adjusting and control device which is connected with a test signal input end and an output end of the readout circuit and the digital voltage converter, and is used for detecting induction signals which are of a certain period and outputted by the output end based on the period of signals inputted by the test signal input end, and determining voltage peak values and DC bias voltage in the period from the induction signals, and gradually adjusting bias voltage outputted by the digital voltage converter based on a comparison result of two detected adjacent voltage peak values, and controlling the digital voltage converter to adjust the outputted bias voltage to bias voltage which can offset determined bias voltage; and therefore, automatic debugging setting of working parameters of the superconducting quantum interference device and the readout circuit thereof can be realized.
Description
Technical field
The present invention relates to a kind of for adopting debug system and the method for the sensor of superconducting quantum interference device.
Background technology
The sensor adopting superconducting quantum interference device (Superconducting Quantum Interference Device, hereinafter referred to as SQUID) is the sensitiveest known at present Magnetic Sensor.Due to its nonlinear characteristic and the reason of output voltage extremely faint (within tens microvolts), sensor directly can not judge the size in magnetic field by detecting institute's output voltage.This make the consistance of sensor and repeatability poor.In addition due to problems such as technology stabilities, in different sensors, the running parameter of device is also different.Therefore independent tuning parameter wanted by each device.
Wherein, comprising in described sensor: superconducting quantum interference device (SQUID) and sensing circuit.
SQUID is a superconducting quantum interference device be made up of two Josephson junctions (PN junction of similar semiconductor), when adding certain bias current to SQUID two ends, when bias current arrives greatly certain value (10uA magnitude), just show magnetic sensitive chatacteristic, namely the voltage at SQUID two ends can change along with the magnetic flux be carried in above it, be called magnetic flux voltage conversion characteristic, when magnetic flux voltage conversion characteristic reaches the strongest, now the most responsive, this bias current is now called recommended current, is also the key parameter that this debug system will regulate.In actual applications, this working current of SQUID drives a large resistance of connecting with SQUID to produce by the voltage source of an external load, therefore, outside need loads this voltage source and is called bias voltage, and bias voltage correspondence produces bias current.
The function of sensing circuit part is detected by the voltage signal at SQUID two ends and amplifies, and delivers to integrator realizes magnetic flux voltage linear transformation by the mode (magnetic flux locking principle) of integral feedback.This circuit theory requires that the voltage sending into integrator at working point place is zero.And with DC offset in SQUID output voltage, therefore when sending into integrator input, contain DC offset voltage, therefore need by a subtraction zeroing circuit, namely an offset voltage is inputted from the outside, two voltages subtract each other, and are eliminated by this DC offset voltage, meet the requirement of sensing circuit work.Therefore this of external load, for eliminating the zeroing voltage of SQUID devices function point place DC quantity, is called offset voltage.This normally to work required parameter in order to circuit.
At present, the sensor of superconducting quantum interference device is adopted to need the professional being familiar with sensor characteristic manually to complete the debugging of parameter before use, artificial parameter debugs described sensor, and not only precision is low, and will expend time in device parameters debugging before putting into operation, make system effectiveness limited.Particularly, professional's mainly bias voltage and offset voltage described in manual debugging under the debugging mode of described sensor.
The application of the multi-channel system be made up of multiple superconductive quantum interference sensor is more and more wider, as 64 passage heart magnetic systems, and the brain magnetic system of 200 passages, and the SQUID detection array system of astronomical sight application.In multi-channel system, need the sensor on each passage of manual debugging.The professional and technical personnel that manual debugging needs to be familiar with SQUID characteristic at external instrument as oscillograph, signal generator etc. auxiliary under, debug circuit parameters one by one, realizes the debugging of sensor optimum working parameter by artificial cognition.As can be seen here, increase along with port number increases by time spent by manual debugging greatly, becomes an obstacle in system use procedure, simultaneously manual debugging, require high to the professional technique in SQUID device of commissioning staff, be unfavorable for that SQUID systematic difference is promoted.
Therefore, need to improve sensor debugging efficiency before use and precision, shorten the time that sensor puts into operation, eliminate the dependence to SQUID professional, eliminate the barrier of the popularization of SQUID application.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of for adopting debug system and the method for the sensor of superconducting quantum interference device, for solving the problem that in prior art, the dependency degree of sensor debugging before use to professional is too high.
For achieving the above object and other relevant objects, the invention provides a kind of for adopting the debug system of the sensor of superconducting quantum interference device, described sensor comprises: superconducting quantum interference device and the sensing circuit be connected with described superconducting quantum interference device, described debug system at least comprises: the digital voltage converter be connected with described sensing circuit and superconducting quantum interference device, for external power supply being converted respectively to the bias voltage of described superconducting quantum interference device and the offset voltage of described sensing circuit, with the test signal input end of described sensing circuit, the regulation device that output terminal and digital voltage converter are connected, for the cycle of signal inputted based on described test signal input end, detect the induced signal with the described cycle that described output terminal exports, and therefrom determine the Voltage Peak peak value in the described cycle and offset voltage, comparative result based on two described Voltage Peak peak values of adjacent detection progressively adjusts the bias voltage that described digital voltage converter exports, and control described digital voltage converter and exported offset voltage is adjusted to the offset voltage of offsetting determined offset voltage.
Preferably, described regulation device comprises: the test signal generator be connected with the test signal input end of described sensing circuit, for generating the test signal of alternation according to the magnetic flux cycle of described Superconducting Quantum, and exports described test signal input end to; The sampling module be connected with the output terminal of described sensing circuit, for the magnitude of voltage of the induced signal that output terminal described in the cycle over-sampling based on described test signal exports; The regulation and control unit be connected with sampling module with described test signal generator, comprising:
The computing module be connected with described sampling module, for extracting maximum voltage value and minimum amount of voltage that from each magnitude of voltage of sampled one-period, and the difference of described maximum voltage value and minimum amount of voltage that is defined as described Voltage Peak peak value, the half of maximum voltage value and minimum amount of voltage that sum is defined as described offset voltage; Be connected with described computing module first regulates and controls module, for two described Voltage Peak peak values of more determined adjacent detection, when a rear described Voltage Peak peak value is greater than previous described Voltage Peak peak value, control described digital voltage converter and export the bias voltage after increasing default step-length, until when a described rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter.
Preferably, described first regulation and control module is also for when a rear described Voltage Peak peak value is less than previous described Voltage Peak peak value, with described default step-length for benchmark, the basis of last step-length is reduced by half, and control described digital voltage converter export reduce by half after step-length after bias voltage, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter.
Preferably, described first regulation and control module is also for when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, the basis of last step-length is reduced by half, and control described digital voltage converter increase on current bias voltage basis this reduce by half after step-length and exported, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, control described digital voltage converter reduce on current bias voltage basis this reduce by half after step-length and exported, so repeatedly, until this reduce by half after step-length be less than or equal to default step-length threshold value, then determine the bias voltage no longer adjusting the output of described digital voltage converter.
Preferably, described debug system also comprises: the controlled source switch be connected with extraneous power supply, for closing when described regulation and control unit starts to debug, determines that the bias voltage no longer adjusting the output of described digital voltage converter disconnects at described regulation and control unit.
Preferably, described regulation and control unit also comprises: be connected with described computing module second regulates and controls module, if be greater than default smallest offset voltage for determined offset voltage, then the offset voltage that described digital voltage converter exports is adjusted to the offset voltage of offsetting determined offset voltage, otherwise, then will not adjust.
Based on above-mentioned purpose, the present invention also provides a kind of for adopting the adjustment method of the sensor of superconducting quantum interference device, wherein, the external bias voltage of described sensor and offset voltage, at least comprise: based on the cycle of the signal of the described sensor of input, detect the induced signal with the described cycle that described sensor exports, and therefrom determine the Voltage Peak peak value in the described cycle and offset voltage; Comparative result based on two described Voltage Peak peak values of adjacent detection progressively adjusts external bias voltage; External offset voltage is adjusted to the inverse value of determined offset voltage or determined offset voltage.
Preferably, from detected induced signal, determine that the step of Voltage Peak peak value in the described cycle and offset voltage comprises: based on the cycle of the signal of the described sensor of input, the magnitude of voltage of the induced signal that sensor described in over-sampling exports; Maximum voltage value and minimum amount of voltage that is extracted from each magnitude of voltage of sampled one-period, and the difference of described maximum voltage value and minimum amount of voltage that is defined as described Voltage Peak peak value, the half of maximum voltage value and minimum amount of voltage that sum is defined as described offset voltage.
Preferably, the mode of the described progressively bias voltage that adjustment is external comprises: two described Voltage Peak peak values of more adjacent detection, when a rear described Voltage Peak peak value is greater than previous described Voltage Peak peak value, external bias voltage is increased and presets step-length, until when a described rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, determine no longer to adjust external bias voltage.
Preferably, the described mode progressively adjusting external bias voltage also comprises: when a rear described Voltage Peak peak value is less than previous described Voltage Peak peak value, with described default step-length for benchmark, the basis of last step-length is reduced by half, and transport to described sensor after step-length after being reduced by half by external bias voltage, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine no longer to adjust described bias voltage.
Preferably, the mode of the described progressively bias voltage that adjustment is external also comprises: when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, the basis of last step-length is reduced by half, external bias voltage is increased this reduce by half after step-length and transport to described sensor, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, external bias voltage is reduced this reduce by half after step-length and exported; So repeatedly, until this reduce by half after step-length be less than or equal to default step-length threshold value, then determine no longer to adjust the bias voltage that described digital voltage converter exports.
Preferably, the mode of the described progressively offset voltage that adjustment is external comprises: if determined offset voltage is greater than default smallest offset voltage, then external offset voltage being adjusted to the offset voltage of offsetting determined offset voltage, otherwise, then will not adjust.
Preferably, described adjustment method also comprises: control described sensor based on extraneous Start-up and Adjustment signal and transfer current state to debugging mode; And when determining no longer to adjust described bias voltage, controlling described sensor and transferring duty to by debugging mode.
As mentioned above, of the present invention for adopting debug system and the method for the sensor of superconducting quantum interference device, there is following beneficial effect: access adjustable digital voltage converter in the outside of sensor, and by regulation and control unit according to the comparison of the Voltage Peak peak value of adjacent detection, adopt the mode progressively adjusted to adjust the bias voltage of superconducting quantum interference device, the problem such as inaccurate, time-consuming that effectively can solve that manual debugging brings, can also improve Adjustment precision, particularly suitable is at multichannel sensor.
Accompanying drawing explanation
Fig. 1 is shown as of the present invention for adopting the structural representation of the debug system of the sensor of superconducting quantum interference device.
Fig. 2 be shown as of the present invention for adopt a kind of optimal way of the debug system of the sensor of superconducting quantum interference device structural representation.
Fig. 3 is shown as of the present invention for adopting the structural representation of a kind of optimal way of the debug system of the sensor of superconducting quantum interference device.
Fig. 4 is shown as of the present invention for adopting the process flow diagram of the adjustment method of the sensor of superconducting quantum interference device.
Fig. 5 is shown as of the present invention for adopting the process flow diagram of a kind of optimal way of the adjustment method of the sensor of superconducting quantum interference device.
Fig. 6 is shown as of the present invention for adopting the process flow diagram of another optimal way of the adjustment method of the sensor of superconducting quantum interference device.
Element numbers explanation
1 debug system
11 digital voltage converters
12 regulation devices
121 sampling modules
122 computing modules
123 first regulation and control modules
124 second regulation and control modules
125 test signal generators
126 regulation and control unit
13 controlled source switches
14 control modules
2 sensors
21 superconducting quantum interference device
22 sensing circuits
The controlled switch that 221 hilted broadswords are put more
222 reset controlled switchs
S1 ~ S3, S4, S5 step
Embodiment
By particular specific embodiment, embodiments of the present invention are described below, person skilled in the art scholar the content disclosed by this instructions can understand other advantages of the present invention and effect easily.
Refer to Fig. 1 to Fig. 3.Notice, structure, ratio, size etc. that this instructions institute accompanying drawings illustrates, content all only in order to coordinate instructions to disclose, understand for person skilled in the art scholar and read, and be not used to limit the enforceable qualifications of the present invention, therefore the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the present invention can produce and the object that can reach, still all should drop on disclosed technology contents and obtain in the scope that can contain.
As shown in Figure 1, the invention provides a kind of for adopting the debug system of the sensor of superconducting quantum interference device.Wherein, described sensor 2 comprises: superconducting quantum interference device 21 and the sensing circuit 22 be connected with described superconducting quantum interference device 21.
Wherein, described sensing circuit 22 has debug function, as shown in Figure 2, integrating circuit in described sensing circuit 22 comprises: the controlled switch 221 that the hilted broadsword of open/close is put more, the controlled switch 221 put when described hilted broadsword in open loop side more, then described sensor 2 enters debugging mode, and the controlled switch 221 put when described hilted broadsword in closed loop side more, then described sensor 2 enters duty.Integrating circuit in described sensing circuit 22 also comprises reset controlled switch 222, and when described reset controlled switch is closed by 222 controls, described integrating circuit is in reset mode, otherwise described integrating circuit is in feedback states.Wherein, the controlled switch 221 put of described hilted broadsword and reset controlled switch 222 can be controlled by the computer equipment of outside more.Preferably, described debug system 1 comprises control module 14.
Described control module 14 is connected with the control end of described sensing circuit 22, for based on control end output switching signal described in received Start-up and Adjustment direction of signal, enters debugging mode to make described sensing circuit 22.
Particularly, described control end is the control interface of the controlled switch 221 put of described hilted broadsword and reset controlled switch 222 more.When described control module 14 receives the Start-up and Adjustment signal sent from external computer device, in described control end, the interface of the controlled switch 221 that hilted broadsword is put more exports the controlled switch 221 put by the described hilted broadsword switching signal closed to open loop feedback direction more, interface simultaneously to the reset controlled switch 222 in described control end exports the switching signal disconnected by described reset controlled switch 222, thus, described sensing circuit enters debugging mode.
Described debug system 1, when described sensor 2 is in debugging mode, is debugged described sensor 2 automatically, so that described sensor 2 can normally work.
Described debug system 1 comprises: digital voltage converter 11, regulation device 12.
Described digital voltage converter 11 is connected with described sensing circuit 22 and superconducting quantum interference device 21, for external power supply being converted respectively to the bias voltage of described superconducting quantum interference device 21 and the offset voltage of described sensing circuit 22.Wherein, bias voltage during described debugging and offset voltage empirically can set initial value, and described initial value can be zero, also can empirically preset with required relevant voltage during work normal far below described sensor 2.Described digital voltage converter 11 is also connected with the power supply in the external world, is also connected with described regulation and control unit 12 simultaneously.
The test signal input end of described regulation device 12 and described sensing circuit 22, output terminal and digital voltage converter 11 are connected, for the cycle of signal inputted based on described test signal input end, detect the induced signal with the described cycle that described output terminal exports, and therefrom determine the Voltage Peak peak value in the described cycle and offset voltage, comparative result based on two described Voltage Peak peak values of adjacent detection progressively adjusts the bias voltage that described digital voltage converter 11 exports, and control described digital voltage converter 11 and exported offset voltage is adjusted to the offset voltage of offsetting determined offset voltage.Wherein, described regulation device 12 is for comprising analog device, analog to digital converter and having the circuit of chip of processing power.
Particularly, described regulation device 12 is to the triangular signal of the test signal input end input predetermined period of described sensing circuit 22, described superconducting quantum interference device 21 exports the induced signal identical with the cycle of described triangular signal by described sensing circuit 22 under the induction of described triangular signal, described regulation device 12 receives described induced signal from the output terminal of described sensing circuit 22, and utilize the mimic channel comprised to detect the Voltage Peak peak value of described induced signal and the offset voltage of described sensing circuit 22 in one-period, from detected second period, a Voltage Peak peak value after determined last Voltage Peak peak value is less than or equal to, then control to be exported again after bias voltage is increased default step-length by described digital voltage converter 11, until when after described, described in one, Voltage Peak peak value is less than or equal to last described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter 11, simultaneously, control the inverse value that exported offset voltage is changed into current determined offset voltage or determined offset voltage by described digital voltage converter 11, offset voltage after adjustment is transported in the zeroing circuit in described sensing circuit 22 by described digital voltage converter 11, offset the offset voltage produced in described sensing circuit 22 thus.Wherein, described zeroing circuit can be totalizer or subtracter.
Such as, the bias voltage that described digital voltage converter 11 exports is 0, offset voltage is 0, then described regulation device 12 is through the induced signal in two cycles of detection, determine that Voltage Peak peak value and the offset voltage of the induced signal in described two cycles are also 0, then control described digital voltage converter 11 and bias voltage is adjusted to (0+L), wherein, L is default step-length, still makes described digital voltage converter 11 export 0v offset voltage simultaneously, then, when described digital voltage converter 11 output offset voltage L and offset voltage 0, described regulation device 12 detects the induced signal of one-period again, and determine that the Voltage Peak peak value of current period is a1, offset voltage a2, wherein, a1>0, by more known, the Voltage Peak peak value a0<(in the last cycle detected is less than) the Voltage Peak peak value a1 in cycle afterwards, then control described digital voltage converter 11 bias voltage is adjusted to (a1+L), and control described digital voltage converter 11 offset voltage is adjusted to-a2, by that analogy, until Voltage Peak peak value described in detect rear is less than or equal to last described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter 11, simultaneously, control the inverse value that exported offset voltage is changed into current determined offset voltage by described digital voltage converter 11.
Preferably, as shown in Figure 3, described regulation device 12 comprises: test signal generator 125, sampling module 121, regulation and control unit 126.Wherein, described regulation and control unit 126 comprises: computing module 122, first regulates and controls module 123 and the second regulation and control module 124.Wherein, described debugging unit be a kind of can according to the program stored in advance, automatically the modernization intelligent electronic device of massive values computation and various information processing, is carried out at high speed, and data transmission can be carried out with test signal generator 125, sampling module 121, its hardware includes but not limited to microprocessor, FPGA, DSP, embedded device etc.
Described test signal generator 125 is connected with the test signal input end of described sensing circuit 22, for generating the test signal of alternation according to the magnetic flux cycle of described Superconducting Quantum, and exports described test signal input end to.
Particularly, described test signal generator 125 produces and on SQUID, to load fluxon meet: Φ
0the cycle magnetic flux of=2.07*10-15Wb as test signal, to detect the induced signal of SQUID.Wherein, described test signal is preferably triangular signal.
Described sampling module 121 is connected with the output terminal of described sensing circuit 22, for the magnitude of voltage of the induced signal that output terminal described in the cycle over-sampling that inputs based on described test signal input end exports.
Particularly, described sampling module 121 is sample circuit, more than 8 times (or 16 times, 24 times etc.) in cycle of the triangular signal inputted according to the test signal input end of described sensing circuit 22, the induced signal that described sensing circuit 22 exports is carried out over-sampling, and preserves each magnitude of voltage of sampling in one-period.
Described computing module 122 is connected with described sampling module 121, for extracting maximum voltage value and minimum amount of voltage that from each magnitude of voltage of sampled one-period, and the difference of described maximum voltage value and minimum amount of voltage that is defined as described Voltage Peak peak value, the half of maximum voltage value and minimum amount of voltage that sum is defined as described offset voltage.Wherein, described computing module 122 can be MCU(micro-control unit), also can be the computing circuit comprising arithmetical organ.
Described first regulation and control module 123 is connected with described computing module 122, for two described Voltage Peak peak values of more determined adjacent detection, when a rear described Voltage Peak peak value is greater than previous described Voltage Peak peak value, control described digital voltage converter 11 and export the bias voltage after increasing default step-length, until when a described rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter 11.
Described second regulation and control module 124 is connected with described computing module 122, if be greater than default smallest offset voltage for determined offset voltage, then the offset voltage that described digital voltage converter 11 exports is adjusted to the offset voltage of offsetting determined offset voltage, otherwise, then will not adjust.
Wherein, described first regulation and control module 123 and described second regulation and control module 124 can be arranged in a MCU, also can be realized by multiple MCU.
Such as, described sampling module 121 is the magnitude of voltage of the induced signal that sampling 12 described sensing circuits 22 export in individual and the n-th cycle at (n-1), and sampled 12 magnitudes of voltage are transported to described computing module 122, described computing module 122 therefrom extracts maximum voltage value and minimum amount of voltage that, and substitute into formula respectively: Vpp=(Vmax – Vmin) and Vdc=(Vmax+Vmin)/2, to obtain Voltage Peak peak value Vpp (n-1) and the offset voltage Vdc (n-1) of induced signal in described (n-1) the individual cycle, and Voltage Peak peak value Vpp (n) of induced signal and offset voltage Vdc (n) in described n-th cycle, wherein, Vpp is the Voltage Peak peak value in the sampled cycle, Vmax is the maximum voltage value in the sampled cycle, Vmin is the minimum amount of voltage that in the sampled cycle, Vdc is the offset voltage in the sampled cycle,
Then, Vpp (n), Vpp (n-1) compare by described first regulation and control module 123, if Vpp (n) is >Vpp (n-1), then control described digital voltage converter 11 current bias voltage is increased to (a3+L), to transport to described superconducting quantum interference device 21, wherein, a3 is the bias voltage before adjustment, and L is default step-length;
Meanwhile, described second regulation and control module 124 judges whether Vdc (n) is greater than default smallest offset voltage, if be greater than described smallest offset voltage, then current offset voltage is adjusted to-Vdc (n), and transport to and comprise in the zeroing circuit of totalizer in described sensing circuit 22, otherwise, then will not adjust.
It should be noted that, those skilled in the art should understand that, described first regulation and control module 123 and the second regulation and control module 124 can be perform simultaneously, also can first perform described second regulation and control module 124 perform the first regulation and control module 123 again, or first perform described first regulation and control module 123 perform the second regulation and control module 124 again.
Preferably, described first regulation and control module 123 is also for when a rear described Voltage Peak peak value is less than previous described Voltage Peak peak value, with described default step-length for benchmark, reduce by half on the basis of last step-length, and control described digital voltage converter 11 export deduct described in reduce by half after step-length after bias voltage, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter 11.
Particularly, when after determining, a described Voltage Peak peak value is less than previous described Voltage Peak peak value to described first regulation and control module 123, mean and the bias voltage of superconducting quantum interference device 21 had been adjusted, therefore, based on described default step-length, reduce by half on the basis of last step-length, and control described digital voltage converter 11 export deduct described in reduce by half after step-length after bias voltage, with the anti-bias voltage adjusting described superconducting quantum interference device 21, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter 11.
Such as, the bias voltage that described digital voltage converter 11 exports is a4, described first regulation and control module 123 is when determining that current described Voltage Peak peak value Vpp (n) is less than previous described Voltage Peak peak value Vpp (n-1), step-length is adjusted to L/2, wherein, L is for presetting step-length, then the bias voltage that described digital voltage converter 11 exports is adjusted to (a4 – L/2) by described first regulation and control module 123, then, the Voltage Peak peak value Vpp (n+1) in a new cycle is obtained again by sampling module 121 and computing module 122, as Vpp (n+1) <Vpp (n), then step-length is adjusted to L/4, then the bias voltage that described digital voltage converter 11 exports is adjusted to (a4 – L/2 – L/4) by described first regulation and control module 123, by that analogy, until Voltage Peak peak value Vpp (n+i) >=Vpp (n+i-1), then no longer adjust the bias voltage that described digital voltage converter 11 exports.
More preferably, described first regulation and control module 123 also for a rear described Voltage Peak peak value by be less than or equal to previous described Voltage Peak peak value transfer to after a described Voltage Peak peak value be more than or equal to previous described Voltage Peak peak value time, the basis of last step-length is reduced by half, and control described digital voltage converter increase on current bias voltage basis this reduce by half after step-length and exported, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, control described digital voltage converter reduce on current bias voltage basis this reduce by half after step-length and exported, so repeatedly, until this reduce by half after step-length be less than or equal to default step-length threshold value, then determine the bias voltage no longer adjusting the output of described digital voltage converter.
Such as, described first regulation and control module 123 is in the initial debug phase, when being greater than last Voltage Peak peak value based on a rear Voltage Peak peak value, the bias voltage of described digital voltage converter is progressively increased according to the step-length L preset, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, obtain bias voltage M, and with described default step-length for benchmark, control described digital voltage converter the bias voltage of output is changed into (M-L/2), and judge that obtaining the step-length after reducing by half is greater than default step-length threshold value, and continue judgement and obtain a rear described Voltage Peak peak value by when being less than or equal to previous described Voltage Peak peak value, then control described digital voltage converter the bias voltage of output is changed into (M-L/2-L/4).。。By that analogy;
Until judge that a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, and the step-length L/ (2 after reducing by half
(n+1)) when being greater than default step-length threshold value, controlling described digital voltage converter and change the bias voltage of output into (M-L/2-L/4-...-L/ (2
n))+L/ (2
(n+1)), and continue to judge that a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, and the step-length L/ (2 after reducing by half
(n+2)) when being greater than default step-length threshold value, controlling described digital voltage converter and change the bias voltage of output into (M-L/2-L/4-...-L/ (2
n))+L/ (2
(n+1))+L/ (2
(n+2)).。。By that analogy;
Until judge that a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, and the step-length L/ (2 after reducing by half
(n+m+1)) when being greater than default step-length threshold value, then controlling described digital voltage converter and change the bias voltage of output into (M-L/2-L/4-...-L/ (2
n))+L/ (2
(n+1))+L/ (2
(n+2))+... + L/ (2
(n+m))-L/ (2
(n+m+1)), now, judge to obtain L/ (2
(n+m+2)) be less than or equal to default step-length threshold value, then determine the bias voltage no longer adjusting the output of described digital voltage converter, then the bias voltage that described digital voltage converter exports is (M-L/2-L/4-...-L/ (2
n))+L/ (2
(n+1))+L/ (2
(n+2))+... + L/ (2
(n+m))-L/ (2
(n+m+1)).Wherein, n is the number of times reducing bias voltage, and m is the number of times increasing bias voltage.
As a kind of preferred version, as shown in Figure 3, described debug system 1 also comprises: the controlled source switch 13 be connected with described regulation device 12.
Described controlled source switch 13 is connected with extraneous power supply, for closing when described regulation device 12 starts to debug, determines that the bias voltage no longer adjusting the output of described digital voltage converter 11 disconnects at described regulation device 12.Wherein, the switch that described controlled source switch 13 can comprise d type flip flop and control by described d type flip flop, the switch that also can comprise Sheffer stroke gate and control by described Sheffer stroke gate.
Particularly, described regulation device 12 controls by external computer device, when described external computer device control described regulation device 12 start to debug time, high level is exported to described controlled source switch 13, d type flip flop (inclusive NAND door) then in described controlled source switch controls corresponding switch and closes, to power to the active device in described regulation device 12, otherwise, described external computer device is when receiving described regulation device 12 and no longer continuing the signal debugged, to described controlled source switch 13 output low level, d type flip flop (inclusive NAND door) then in described controlled source switch controls corresponding switch and disconnects, described regulation device 12 is made to exit debugging to described sensor 2 thus.
The course of work of described regulator control system debugging sensor 2 is exemplified below:
When described control module 14 receives the Start-up and Adjustment signal sent from external computer device, in described control end, the interface of the controlled switch 221 that hilted broadsword is put more exports the controlled switch 221 put by the described hilted broadsword switching signal closed to open loop feedback direction more, interface simultaneously to the reset controlled switch 222 in described control end exports the switching signal disconnected by described reset controlled switch 222, thus, described sensing circuit 22 enters debugging mode;
Described controlled source switch 13 is closed under the control of external computer device, now described regulation and control unit 12 powers on, and the bias voltage exported by described digital voltage converter 11 and offset voltage are all initialized as 0, and the sensing circuit 22 in debugged sensor 2 is adjusted to open loop feedback;
Then, test signal generator 125 in described regulation and control unit 126 starts the triangular signal inputting predetermined period to described sensing circuit 22, simultaneously, sampling module 121 in described regulation and control unit 12 carries out 12 samplings according to the described cycle to the induced signal that described sensing circuit 22 exports, and utilize formula by computing module 122: Vpp=(Vmax – Vmin) and Vdc=(Vmax+Vmin)/2 determine the Voltage Peak peak value Vpp (0) that exported induced signal is respective within two cycles, Vpp (1) and Vdc (0), Vdc (1), because initialized bias voltage and offset voltage are 0, then described first regulation and control module 123 compares Vpp (0)=Vpp (1)=0, then control described digital voltage converter 11 bias voltage is adjusted to (0+L), simultaneously, the offset voltage that described digital voltage converter 11 exports is adjusted to 0 by described second regulation and control module 124,
After first time adjustment, described sampling module 121 continues to carry out 12 samplings according to the described cycle to the induced signal that described sensing circuit 22 exports, and utilize above-mentioned formula to determine the Voltage Peak peak value Vpp (2) of exported induced signal in the sampled cycle and offset voltage Vdc (2) by computing module 122, Vpp (1) <Vpp (2) is compared again by described first regulation and control module 123, then control described digital voltage converter 11 bias voltage is adjusted to (L+L), simultaneously, the offset voltage that described digital voltage converter 11 exports is adjusted to-Vdc (2) by described second regulation and control module 124,
After second time adjustment, described sampling module 121 continues to carry out 12 samplings according to the described cycle to the induced signal that described sensing circuit 22 exports, and utilize above-mentioned formula to determine the Voltage Peak peak value Vpp (3) of exported induced signal in the sampled cycle and offset voltage Vdc (3) by computing module 122, Vpp (2) >Vpp (3) is compared again by described first regulation and control module 123, then step-length is reduced by half, and the step-length after reducing by half and default step-length threshold value L ' are compared, now, step-length L/2>L ' after reducing by half, then described first regulation and control module 123 controls described digital voltage converter 11 and is adjusted to (2L-L/2) by bias voltage, simultaneously, the offset voltage that described digital voltage converter 11 exports is adjusted to-Vdc (3) by described second regulation and control module 124,
After third time adjustment, described sampling module 121 continues to carry out 12 samplings according to the described cycle to the induced signal that described sensing circuit 22 exports, and utilize above-mentioned formula to determine the Voltage Peak peak value Vpp (4) of exported induced signal in the sampled cycle and offset voltage Vdc (4) by computing module 122, Vpp (3) <Vpp (4) is compared again by described first regulation and control module 123, and L/4>L ', then described first regulation and control module 123 controls described digital voltage converter 11 and is adjusted to (2L-L/2+L/4) by bias voltage, simultaneously, the offset voltage that described digital voltage converter 11 exports is adjusted to-Vdc (4) by described second regulation and control module 124,
After the 4th adjustment, described sampling module 121 continues to carry out 12 samplings according to the described cycle to the induced signal that described sensing circuit 22 exports, and utilize above-mentioned formula to determine the Voltage Peak peak value Vpp (5) of exported induced signal in the sampled cycle and offset voltage Vdc (5) by computing module 122, Vpp (4) <Vpp (5) is compared again by described first regulation and control module 123, and L/8<L ', then determine no longer to adjust bias voltage, simultaneously, described first regulation and control module 123 controls described digital voltage converter 11 and is adjusted to (2L-L/2+L/4) by bias voltage, the offset voltage that described digital voltage converter 11 exports is adjusted to-Vdc (5) by described second regulation and control module 124, described first regulation and control module 123 notifies that described controlled source switch disconnects and described control module 14 transfers described sensor to duty by debugging mode,
After the controlled disconnection of described controlled source switch 13, described regulation and control unit 12 non-transformer is powered and automatically exits debugging; The controlled switch output low level that described control module 14 is put to described hilted broadsword more, the controlled switch that then described hilted broadsword is put more turns to the closed-loop connecting integrating circuit, thus, formation close-loop feedback in the sensing circuit 22 of described sensor 2, described digital voltage converter 11 is powered respectively to the zeroising road in described superconducting quantum interference device 21 and sensing circuit 22 according to the bias voltage (2L-L/2+L/4) adjusted for the last time and offset voltage-Vdc (5).
As shown in Figure 4, the present invention also provides a kind of for adopting the adjustment method of the sensor of superconducting quantum interference device.Wherein, sensor provides bias voltage and offset voltage by digital voltage converter.Described adjustment method performs primarily of regulation and control unit, and described regulation and control unit is the application software being arranged on MCU.
In step sl, described regulation and control unit, based on the cycle of the signal of the described sensor of input, detects the induced signal with the described cycle that described sensor exports, and therefrom determines the Voltage Peak peak value in the described cycle and offset voltage.
Particularly, described regulation and control unit is to the triangular signal of the test signal input end input predetermined period of described sensing circuit, described superconducting quantum interference device exports the induced signal identical with the cycle of described triangular signal by described sensing circuit under the induction of described triangular signal, described regulation and control unit receives described induced signal from the output terminal of described sensing circuit, and utilizes the mimic channel comprised to detect the Voltage Peak peak value of described induced signal and the offset voltage of described sensing circuit in one-period.
Preferably, described step S1 comprises step S11, S12(does not all give diagram).
In step s 11, described regulation and control unit based on cycle of signal of the described sensor of input, the magnitude of voltage of the induced signal that sensor described in over-sampling exports.
Particularly, 12 times (or 16 times, 24 times etc.) in cycle of the triangular signal that described regulation and control unit inputs according to the test signal input end of described sensing circuit, the induced signal exported by described sensing circuit carries out over-sampling, and preserves each magnitude of voltage of sampling in one-period.
In step s 12, described regulation and control unit extracts maximum voltage value and minimum amount of voltage that from each magnitude of voltage of sampled one-period, and the difference of described maximum voltage value and minimum amount of voltage that is defined as described Voltage Peak peak value, the half of maximum voltage value and minimum amount of voltage that sum is defined as described offset voltage.Wherein, can also be the circuit comprising arithmetical organ and MCU in described regulation and control unit.
In step s 2, described regulation and control unit progressively adjusts external bias voltage based on the comparative result of two described Voltage Peak peak values of adjacent detection.
Particularly, described regulation and control unit is from detected second period, a Voltage Peak peak value after determined last Voltage Peak peak value is less than or equal to, then control to be exported again after bias voltage is increased default step-length by described digital voltage converter, until when Voltage Peak peak value is less than or equal to last described Voltage Peak peak value described in one after described, determine the bias voltage no longer adjusting the output of described digital voltage converter.
Such as, the bias voltage that described digital voltage converter exports is 0, offset voltage is 0, then described regulation and control unit is through the induced signal in two cycles of detection, determine that Voltage Peak peak value and the offset voltage of the induced signal in described two cycles are also 0, then control described digital voltage converter and bias voltage is adjusted to (0+L), wherein, L is default step-length, still makes described digital voltage converter export 0v offset voltage simultaneously, then, when described digital voltage converter output offset voltage L and offset voltage 0, described regulation and control unit detects the induced signal of one-period again, and determine that the Voltage Peak peak value of current period is a1, offset voltage a2, wherein, a1>0, by more known, the Voltage Peak peak value a1 in a cycle after the Voltage Peak peak value 0< in the last cycle detected, then control described digital voltage converter bias voltage is adjusted to (a1+L), and control described digital voltage converter offset voltage is adjusted to-a2, by that analogy, until Voltage Peak peak value described in detect rear is less than or equal to last described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter.
Preferably, the mode that described regulation and control unit progressively adjusts external bias voltage comprises: two described Voltage Peak peak values of more adjacent detection, when a rear described Voltage Peak peak value is greater than previous described Voltage Peak peak value, external bias voltage is increased and presets step-length, until when a described rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, determine no longer to adjust external bias voltage.
Such as, described regulation and control unit is the magnitude of voltage of the induced signal that sampling 12 described sensing circuits export in individual and the n-th cycle at (n-1), and sampled 12 magnitudes of voltage are transported to described regulation and control unit, described regulation and control unit therefrom extracts maximum voltage value and minimum amount of voltage that, and substitute into formula respectively: Vpp=(Vmax – Vmin) and Vdc=(Vmax+Vmin)/2, to obtain Voltage Peak peak value Vpp (n-1) and the offset voltage Vdc (n-1) of induced signal in described (n-1) the individual cycle, and Voltage Peak peak value Vpp (n) of induced signal and offset voltage Vdc (n) in described n-th cycle, wherein, Vpp is the Voltage Peak peak value in the sampled cycle, Vmax is the maximum voltage value in the sampled cycle, Vmin is the minimum amount of voltage that in the sampled cycle, Vdc is the offset voltage in the sampled cycle, then, Vpp (n), Vpp (n-1) compare by described regulation and control unit, if Vpp (n) is >Vpp (n-1), then control described digital voltage converter current bias voltage is increased to (a3+L), and transport to described superconducting quantum interference device, wherein, a3 is the bias voltage before adjustment, and L is default step-length.
More preferably, the mode that described regulation and control unit progressively adjusts external bias voltage also comprises: when a rear described Voltage Peak peak value is less than previous described Voltage Peak peak value, with described default step-length for benchmark, the basis of last step-length reduces by half, and transport to described sensor after step-length after being reduced by half by external bias voltage, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine no longer to adjust described bias voltage.
Particularly, when after determining, a described Voltage Peak peak value is less than previous described Voltage Peak peak value to described regulation and control unit, mean and the bias voltage of superconducting quantum interference device had been adjusted, therefore, based on described default step-length, reduce by half on the basis of last step-length, and control described digital voltage converter export deduct described in reduce by half after step-length after bias voltage, with the anti-bias voltage adjusting described superconducting quantum interference device, until when a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, determine the bias voltage no longer adjusting the output of described digital voltage converter.
Such as, the bias voltage that described digital voltage converter exports is a4, described regulation and control unit is when determining that current described Voltage Peak peak value Vpp (n) is less than previous described Voltage Peak peak value Vpp (n-1), step-length is adjusted to L/2, wherein, L is for presetting step-length, then the bias voltage that described digital voltage converter exports is adjusted to (a4 – L/2) by described regulation and control unit, then, the Voltage Peak peak value Vpp (n+1) in a new cycle is obtained again by regulation and control unit and regulation and control unit, as Vpp (n+1) <Vpp (n), then step-length is adjusted to L/4, then the bias voltage that described digital voltage converter exports is adjusted to (a4 – L/2 – L/4) by described regulation and control unit, by that analogy, until Voltage Peak peak value Vpp (n+i) >=Vpp (n+i-1), then no longer adjust the bias voltage that described digital voltage converter exports.
More preferably, the mode that described regulation and control unit progressively adjusts external bias voltage also comprises: a rear described Voltage Peak peak value by be less than or equal to previous described Voltage Peak peak value transfer to after a described Voltage Peak peak value be more than or equal to previous described Voltage Peak peak value time, the basis of last step-length is reduced by half, external bias voltage is increased this reduce by half after step-length and transport to described sensor, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, external bias voltage is reduced this reduce by half after step-length and exported,
So repeatedly, until this reduce by half after step-length be less than or equal to default step-length threshold value, then determine no longer to adjust external bias voltage.
Such as, with reference to shown in Fig. 5, described regulation and control unit is in the initial debug phase, during based on rear Voltage Peak peak value Vpp (2) > last Voltage Peak peak value Vpp (1), external bias voltage is progressively increased according to the step-length L preset, until when a rear described Voltage Peak peak value is less than or equal to previous described Voltage Peak peak value, obtain bias voltage M, and with described default step-length for benchmark, external bias voltage is changed into (M-L/2), and judge that obtaining the step-length after reducing by half is greater than default step-length threshold value, and continue judgement and obtain a rear described Voltage Peak peak value by when being less than or equal to previous described Voltage Peak peak value, then external bias voltage is changed into (M-L/2-L/4).。。By that analogy;
Until judge that rear described Voltage Peak peak value Vpp (n) is more than or equal to previous described Voltage Peak peak value Vpp (n-1), and the step-length L/ (2 after reducing by half
(n+1)) when being greater than default step-length threshold value, change external bias voltage into (M-L/2-L/4-...-L/ (2
n))+L/ (2
(n+1)), and continue to judge that a rear described Voltage Peak peak value is more than or equal to previous described Voltage Peak peak value, and the step-length L/ (2 after reducing by half
(n+2)) when being greater than default step-length threshold value, change external bias voltage into (M-L/2-L/4-...-L/ (2
n)+L/ (2
(n+1))+L/ (2
(n+2))).。。By that analogy;
Until judge that a rear described Voltage Peak peak value Vpp (n+m) is less than or equal to previous described Voltage Peak peak value Vpp (n+m-1), and the step-length L/ (2 after reducing by half
(n+m+1)) when being greater than default step-length threshold value, then change external bias voltage into (M-L/2-L/4-...-L/ (2
n)+L/ (2
(n+1))+L/ (2
(n+2))+... + L/ (2
(n+m))-L/ (2
(n+m+1))), now, judge to obtain L/ (2
(n+m+2)) be less than or equal to default step-length threshold value, then determine no longer to adjust external bias voltage, then external bias voltage is (M-L/2-L/4-...-L/ (2
n)+L/ (2
(n+1))+L/ (2
(n+2))+... + L/ (2
(n+m))-L/ (2
(n+m+1))).Wherein, n is the number of times reducing bias voltage, and m is the number of times increasing bias voltage.
In step s3, external offset voltage is adjusted to the offset voltage of offsetting determined offset voltage by described regulation and control unit.
Particularly, exported offset voltage is changed into the inverse value of current determined offset voltage or determined offset voltage by digital voltage converter described in described regulation and control unit controls, offset voltage after adjustment is transported in the zeroing circuit in described sensing circuit by described digital voltage converter, offsets the offset voltage produced in described sensing circuit thus.Wherein, described zeroing circuit can be totalizer or subtracter.
Preferably, if described regulation and control unit is greater than default smallest offset voltage according to offset voltage determined in step S1, then external offset voltage being adjusted to the offset voltage of offsetting determined offset voltage, otherwise, then will not adjust.
Such as, whether described regulation and control unit judges Vdc (n) are greater than default smallest offset voltage, if be greater than described smallest offset voltage, then external offset voltage is adjusted to-Vdc (n), and transport to and comprise in the zeroing circuit of totalizer in described sensing circuit, otherwise, then will not adjust.
It should be noted that, it should be appreciated by those skilled in the art that described step S2 and S3 performs simultaneously, also first can perform described step S2 and perform step S3 again, or first perform described S3 and perform step S2 again.
Preferably, as shown in Figure 6, described adjustment method also comprises: step S4, S5.
Before step S1 performs, described debug system first performs step S4.
In step s 4 which, described debug system controls described sensor based on extraneous Start-up and Adjustment signal and transfers current state to debugging mode.
Particularly, the Start-up and Adjustment signal that the computer equipment of outside sends by described debug system converts the controlled switch that the hilted broadsword for controlling in described sensor puts more to and turns to open loop to feed back, and the reset controlled switch controlled in described sensor disconnects, to transfer the state of described sensor to debugging mode, then perform step S1.
When described debug system is determined no longer to adjust described bias voltage according to step S3, described debug system performs step S5.
In step s 5, described debug system controls described sensor and transfers duty to by debugging mode.
Particularly, described debug system controls on the one hand the controlled switch that described hilted broadsword puts more and turns to close-loop feedback when determining no longer to adjust described bias voltage, continue to make described reset controlled switch disconnect simultaneously, so that described sensor transfers duty to, cut off own power source on the other hand.
In sum, of the present invention for adopting debug system and the method for the sensor of superconducting quantum interference device, adjustable digital voltage converter is accessed in the outside of sensor, and by regulation and control unit according to the comparison of the Voltage Peak peak value of adjacent detection, adopt the mode progressively adjusted to adjust the bias voltage of superconducting quantum interference device, the problem such as inaccurate, time-consuming that effectively can solve that manual debugging brings, can also improve Adjustment precision, particularly suitable is at multichannel sensor; Especially, according to the principle of work of superconducting quantum interference device, the stage is increased along with the increase of bias voltage at Voltage Peak peak value, the bias voltage of described superconducting quantum interference device can be adjusted near the maximal value of Voltage Peak peak value by bias voltage rapidly that increase described superconducting quantum interference device according to default step-length, simultaneously, the stage is reduced along with the increase of bias voltage at Voltage Peak peak value, half bias voltage being reduced previous step-length progressively, can high-precisionly be positioned at bias voltage near Voltage Peak peak maximum; In addition, after debugging, disconnect the power supply to regulation and control unit by controlled source switch, make described sensor directly enter duty, thoroughly avoid manual intervention; Further, described regulation and control unit controls controlled source switch and disconnects when debugging completes, make described sensor enter duty with timely power-off, and the full automatic treatment of time limit debugging thus, stopping artificial participation.So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (14)
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