CN104410638B - A kind of multi service transmission protocol based on SONET understands device and method - Google Patents
A kind of multi service transmission protocol based on SONET understands device and method Download PDFInfo
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- 230000005540 biological transmission Effects 0.000 title claims abstract description 14
- RGNPBRKPHBKNKX-UHFFFAOYSA-N hexaflumuron Chemical compound C1=C(Cl)C(OC(F)(F)C(F)F)=C(Cl)C=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F RGNPBRKPHBKNKX-UHFFFAOYSA-N 0.000 title claims abstract 4
- 238000000034 method Methods 0.000 title claims description 29
- 238000012545 processing Methods 0.000 claims abstract description 48
- 239000013307 optical fiber Substances 0.000 claims abstract description 14
- 230000003287 optical effect Effects 0.000 claims description 84
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- 230000003139 buffering effect Effects 0.000 claims description 14
- 238000013461 design Methods 0.000 abstract description 4
- 230000005693 optoelectronics Effects 0.000 abstract 1
- 230000032258 transport Effects 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 7
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- 238000005538 encapsulation Methods 0.000 description 5
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- 238000004891 communication Methods 0.000 description 4
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- DWSYCUKCNSVBRA-UHFFFAOYSA-N 4-(5-methylsulfonyltetrazol-1-yl)phenol Chemical compound CS(=O)(=O)C1=NN=NN1C1=CC=C(C=C1)O DWSYCUKCNSVBRA-UHFFFAOYSA-N 0.000 description 2
- 101710167643 Serine/threonine protein phosphatase PstP Proteins 0.000 description 2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/18—Protocol analysers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/03—Protocol definition or specification
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Abstract
The multi service transmission protocol solution read apparatus based on SONET of the present invention includes the agreement deciphering equipment that light input end, light output end, opto-electronic receiver unit, optical fiber splitter, clock data synchronization unit, serioparallel exchange unit, PLD units, internal storage location, central processing unit and operation agreement understand software, the hardware design of agreement solution read apparatus is simplified, the deciphering requirement of the multi service transmission protocol based on SONET can be met comprehensively.
Description
Technical Field
The invention relates to the technical field of digital communication, in particular to a SONET-based multi-service transmission protocol interpretation device and method.
Background
To meet market demand, synchronous digital optical network architecture (SONET) transported services extend from traditional voice services to the field of data and video services, and many types of services can be transported over SONET networks, such as: fast Ethernet (FE), Gigabit Ethernet (GE), Fibre Channel (FC) protocol, Fibre Interconnect (FICON) protocol, enterprise system interconnect (ESCON) protocol, Digital Video Broadcasting (DVB), etc., which are so-called multi-service transports.
SONET, which is a data transmission technology widely used today, is a rectangular block frame structure based on a byte structure, and the structure is composed of 270 × N columns and 9 rows of 8-bit bytes. From the physical layer, the SONET signal is a serial data stream and bytes in a frame structure are transmitted from left to right and from top to bottom in sequence. N is related to the rate class of SONET.
With the addition of new services, traditional SONET encapsulation technology has been unable to meet the requirements, emerging as a number of encapsulation related technologies, standards, protocols, etc., such as: virtual Concatenation (VC), Link Capacity Adjustment Scheme (LCAS), Link Access Procedure (LAPS), high level data link control (HDLC), Generic Framing Procedure (GFP). Therefore, an instrument is needed to complete the interpretation of the relevant protocol, assist the development and test processes, and can be used for researching the realization difference of different manufacturers and different devices to meet the requirement of interconnection and intercommunication of communication devices.
In STM-N there is not only the payload that is transmitted, but also a large number of overhead bytes. These overhead bytes contain framing information, information for maintenance and performance monitoring, and other operational information. The virtual concatenation VC and link capacity adjustment scheme LCAS protocol are used for transmitting information by H4 bytes in high-order channel overhead and K4 bytes in low-order overhead. The protocols such as LAPS, generic Framing procedure GFP, etc. are directly in the payload area to complete the encapsulation of the client data. To interpret these protocols, both the overhead and payload in SONET frames must be addressed.
In view of the current situation of SONET (synchronous optical network) readers, hardware is basically adopted to realize the reading processing of a frame structure, and services are processed by a test code stream reading module in logic to judge whether error codes exist in the receiving and transmitting processes; the frame processor, the mapping and demapping parts extract the cost and display the current cost value to the user; and an overhead processing module in the programmable device extracts overhead data in some continuous frames and stores the overhead data in an overhead RAM for query and display. In addition to the overhead storage function, basically, only the frame data of the current time is read at each time, and the information related to the frame data is displayed.
The prior art has the following disadvantages:
1. the existing SONET interpreter only displays the number of bit errors in the payload and does not display the concrete content of the payload. The user cannot observe the payload data, and the protocol such as LAPS and GFP which completes encapsulation in the payload area cannot be interpreted at all.
2. The user can only observe the current overhead situation, and the human eye cannot keep up with this speed because the SONET frame data is 8000 frames per second, i.e., the minimum time for data change is 125 mus. This technique can only be used to accommodate situations where the frequency of data changes in the frame is low, or to observe only a steady state of the device. The overhead bytes associated with the MSTP protocol change substantially every frame, so this technique misses a lot of detailed information. Even if the overhead storage function is adopted, the information stored by the commercial instrument is very limited, the change situation of only 256 overhead values can be stored at most, and the support for the technology of realizing the control protocol by using overhead bytes as physical channels, such as LCAS, is very limited.
3. The reusability of the design is poor. Because the whole service interpretation process is realized by hardware, any change on a protocol, the whole hardware and logic need to be redesigned, and a user interface of software also needs to be correspondingly upgraded, the method is difficult to adapt to the developing requirements of the communication technology.
Disclosure of Invention
In view of the above problems in the prior art, the present invention provides a SONET-based multiservice transport protocol interpretation device and method, which solves the problems of poor reusability and scalability of the existing SONET interpreter.
According to an embodiment of the present invention, there is provided a SONET-based multi-service transport protocol interpretation apparatus, the apparatus including an optical input terminal, an optical output terminal, a photoelectric receiving unit, an optical splitter, a clock data synchronization unit, a serial-parallel conversion unit, a PLD unit, a memory unit, a central processing unit, and a protocol interpretation device running protocol interpretation software; wherein,
the optical fiber splitter is used for splitting an optical signal input from the optical input end into two optical signals, wherein one optical signal is output through the optical output end, and the other optical signal is sent to the photoelectric receiving unit; the optical signal carries complete frame data;
the clock data synchronization unit is connected with the photoelectric receiving unit and is used for carrying out clock data synchronization on the input photoelectric converted electric signal;
a serial-to-parallel conversion unit for converting the serial data input from the clock data synchronization unit into parallel data and outputting the parallel data to the PLD unit;
the PLD unit is used for buffering the parallel data and writing the parallel data into a memory unit; reading and storing frame data stored in the memory unit under the control of the central processing unit, and then sending the frame data to the central processing unit;
the central processing unit is connected with the PLD unit and the protocol interpretation equipment, reads the frame data transmitted by the PLD unit according to the protocol interpretation instruction sent by the protocol interpretation equipment, and sends the frame data to the protocol interpretation equipment;
the protocol interpretation equipment sends a protocol interpretation instruction to the central processing unit; and receiving frame data transmitted by the central processing unit, and performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on the protocol interpretation equipment.
According to a preferred embodiment of the present invention, the PLD unit includes a FIFO unit, a memory unit interface unit, and a central processing unit interface unit; wherein,
the FIFO unit is connected with the serial-parallel conversion unit and the memory unit interface unit and is used for buffering the frame data input by the serial-parallel conversion unit and transmitting the frame data to the memory unit through the memory unit interface unit; the interface unit is used for reading the frame data in the memory unit from the memory unit interface unit and transmitting the frame data to the central processing unit interface unit;
and the central processor interface unit is connected with the FIFO unit and the central processor, receives the frame data transmitted by the FIFO unit and transmits the frame data to the central processor.
According to a preferred embodiment of the present invention, the central processor includes a network interface through which the central processor is connected with the protocol interpretation device.
According to another embodiment of the present invention, there is provided a SONET-based multi-service transport protocol interpretation method, including the steps of:
receiving an optical signal output from the tested equipment, and dividing the input optical signal into two paths of optical signals through an optical fiber splitter, wherein one path of optical signal is used for output so as to ensure normal service operation;
the other optical signal is used for protocol interpretation, and relevant continuous multi-frame complete frame data in the other optical signal in the two optical signals are stored in a memory unit according to a preset trigger condition;
according to the protocol interpretation instruction, the central processing unit reads the frame data stored in the memory unit and sends the frame data to the protocol interpretation equipment;
and performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on the protocol interpretation equipment.
According to a preferred embodiment of the present invention, storing the relevant consecutive frames of complete frame data in a memory unit comprises the steps of:
performing photoelectric conversion on the other optical signal in the two optical signals;
performing clock data synchronization on the electric signal subjected to photoelectric conversion;
converting serial data subjected to clock data synchronization into parallel data;
and after the parallel data is buffered by the PLD unit, writing the parallel data into the memory unit.
According to a preferred embodiment of the present invention, storing the relevant consecutive frames of complete frame data in a memory unit comprises the steps of:
performing photoelectric conversion on the other optical signal in the two optical signals;
and transmitting the electric signal subjected to the photoelectric conversion to a PLD unit, carrying out clock data synchronization, converting serial data subjected to the clock data synchronization into parallel data, buffering the parallel data, and writing the parallel data into the memory unit.
According to a preferred embodiment of the invention, the protocol interpretation comprises:
extracting values of regions related to the interpreted protocol in payload and overhead of frame data;
continuously displaying the values related to the interpreted protocol in the complete frame data of a plurality of frames so as to facilitate the intuitive interpretation.
According to a preferred embodiment of the present invention, the trigger condition and the protocol interpretation instruction are set by a protocol interpretation device.
According to a preferred embodiment of the present invention, the reading of the frame data stored in the memory unit by the cpu means that the cpu reads the frame data in the memory unit through the PLD unit, including the steps of:
reading and storing frame data in the memory unit by the PLD unit;
the CPU reads the frame data stored in the PLD unit.
The invention has the advantages that the hardware design of the protocol interpretation device is simplified, the universality of the hardware part is improved, and the interpretation requirement of the SONET-based multi-service transmission protocol can be comprehensively met; for a newly-appeared protocol, the requirement of rapid development of a communication technology can be supported and met in time only by upgrading software; the hardware development cost, the labor cost and the development period of the protocol interpretation device are reduced.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
figure 1 shows a schematic diagram of a SONET based multi-service transport protocol interpretation apparatus according to an embodiment of the present invention;
figure 2 shows a flow diagram of a SONET based multi-service transport protocol interpretation method according to one embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The invention provides a SONET-based multi-service transmission protocol interpretation device, which captures frame data at high speed and in real time through hardware, records continuous n frames of complete frame data to a memory unit for temporary storage, wherein the frame data comprises complete payload and overhead content; and then transmitting the frame data to a protocol interpretation device according to the instruction for off-line analysis, and performing protocol interpretation on the frame data according to a corresponding protocol by protocol interpretation software running on the protocol interpretation device, namely extracting values of related areas in payload and overhead and continuously displaying specific values of n frames, so that an operator can conveniently and intuitively interpret the values to meet the interpretation requirement of the SONET-based multi-service transmission protocol. Capturing frame data through a trigger condition preset by the protocol interpretation equipment so as to ensure that the captured data is meaningful data; and when off-line interpretation is performed, the frame data stored in the memory unit is also read through an instruction sent by the protocol interpretation equipment.
According to an embodiment of the present invention, as shown in fig. 1, there is disclosed a SONET-based multi-service transport protocol interpretation apparatus, the apparatus including: the device comprises an optical input end, an optical output end, a photoelectric receiving unit, an optical fiber splitter, a clock data synchronization unit, a serial-parallel conversion unit, a PLD unit, a memory unit, a central processing unit and protocol interpretation equipment running protocol interpretation software; wherein,
the optical fiber branching unit is used for dividing an optical signal input from the optical input end into two paths of optical signals, wherein one path of optical signal is output through the optical output end so as to ensure normal service operation; the other path of optical signal is sent to a photoelectric receiving unit; the optical signal carries complete frame data;
the clock data synchronization unit is connected with the photoelectric receiving unit and is used for carrying out clock data synchronization on the input photoelectric converted electric signal;
a serial-parallel conversion unit for converting serial data input from the clock data synchronization unit 33 into parallel data and outputting to the PLD unit;
the PLD unit is used for buffering the parallel data and writing the parallel data into a memory unit; under the control of the central processing unit CPU, reading and storing the frame data stored in the memory unit, and then sending the frame data to the central processing unit CPU;
the central processing unit CPU is connected with the PLD unit and the protocol interpretation equipment, reads the frame data transmitted by the PLD unit according to the protocol interpretation instruction sent by the protocol interpretation equipment, and sends the frame data to the protocol interpretation equipment;
the protocol interpretation equipment sends a protocol interpretation instruction to the central processing unit; and receiving frame data transmitted by the central processing unit, and performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on the protocol interpretation equipment.
In this embodiment, an optical fiber splitter is used, which is used to perform protocol interpretation while ensuring normal operation of bidirectional service of the device under test.
The PLD unit is a Field Programmable Gate Array (FPGA) chip.
The PLD cell includes: FIFO unit, memory unit interface unit and CPU interface unit; the FIFO unit is connected with the serial-parallel conversion unit and the memory unit interface unit and is used for buffering frame data input by the serial-parallel conversion unit and transmitting the frame data to the memory unit through the memory unit interface unit; the interface unit is used for reading the frame data in the memory unit from the memory unit interface unit and transmitting the frame data to the central processing unit interface unit; and the central processing unit interface unit is connected with the data buffering FIFO unit and the central processing unit, receives the frame data transmitted by the data buffering FIFO unit and transmits the frame data to the central processing unit CPU.
The central processing unit comprises a network interface, and the central processing unit is connected with the protocol interpretation equipment through the network interface.
The workflow according to the above-described embodiment of the present invention is as follows:
firstly, trigger conditions for capturing frame data can be set through protocol interpretation equipment, for example, the frame data is captured and stored under certain specific conditions, so that the captured frame data is meaningful;
receiving an optical signal output from the tested equipment, and dividing the input optical signal into two paths of optical signals through an optical fiber splitter, wherein one path of optical signal is used for output so as to ensure normal service operation;
performing photoelectric conversion on the other optical signal in the two optical signals in a photoelectric receiving unit;
performing clock data synchronization on the electric signal subjected to photoelectric conversion in a clock data synchronization unit;
converting serial data subjected to clock data synchronization into parallel data in a serial-parallel conversion unit;
and buffering the parallel data by a PLD (programmable logic device) unit, namely an FPGA (field programmable gate array) chip, and writing the parallel data into the memory unit. The frame data captured by the memory unit is captured according to a preset trigger condition so as to ensure that the captured frame data is meaningful.
When interpreting a virtual concatenation VC, a link capacity adjustment scheme LCAS, a link access procedure-synchronous digital hierarchy lap-SONET, a high-level data link control HDLC or a generic framing procedure GFP, the workflow is:
the unscrambler can issue a protocol unscrambling instruction through the protocol unscrambling equipment;
after the central processing unit obtains the instruction, the FPGA chip reads frame data from the memory unit, namely, the data in the memory unit is read through the memory unit interface unit and stored in the data buffer FIFO unit, then the frame data is sent to the protocol interpretation equipment through the CUP interface unit, and the protocol interpretation software running in the protocol interpretation equipment performs corresponding protocol interpretation on the frame data.
According to another embodiment of the present invention, another SONET-based multi-service transport protocol interpretation apparatus is disclosed, in which the PLD unit may employ a Field Programmable Gate Array (FPGA) chip with a high-speed transceiver hard core (SERDES), and the SERDES itself may perform clock data synchronization and serial-parallel conversion functions, and by using the chip, it is not necessary to add a CDR unit and a serial-parallel conversion unit externally. The device includes: the device comprises an optical input end, an optical output end, a photoelectric receiving unit, an optical fiber splitter, a PLD unit, a memory unit, a central processing unit and protocol interpretation equipment running protocol interpretation software; wherein,
the optical fiber branching unit is used for dividing an optical signal input from the optical input end into two paths of optical signals, wherein one path of optical signal is output through the optical output end so as to ensure the normal operation; the other path of optical signal is sent to a photoelectric receiving unit; the optical signal carries complete frame data;
the PLD unit is used for carrying out clock data synchronization on the received electric signals subjected to photoelectric conversion, converting serial data subjected to clock data synchronization into parallel data, buffering the parallel data and writing the parallel data into the memory unit; reading and storing frame data stored in the memory unit under the control of the central processing unit, and then sending the frame data to the central processing unit;
the central processing unit is connected with the PLD unit and the protocol interpretation equipment, reads the frame data transmitted by the PLD unit according to the protocol interpretation instruction sent by the protocol interpretation equipment, and sends the frame data to the protocol interpretation equipment;
the protocol interpretation equipment sends a protocol interpretation instruction to the central processing unit; and receiving frame data transmitted by the central processing unit, and performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on the protocol interpretation equipment.
The PLD unit comprises a clock data synchronization unit, a serial-parallel conversion unit, a data buffer FIFO unit, a memory unit interface unit and a central processing unit interface unit; wherein,
the clock data synchronization unit is connected with the photoelectric receiving unit and is used for carrying out clock data synchronization on the input photoelectric converted electric signal;
the serial-parallel conversion unit is used for converting serial data input from the clock data synchronization unit into parallel data and outputting the parallel data to the data buffer FIFO unit;
the data buffer FIFO unit is connected with the serial-parallel conversion unit and the memory unit interface unit and is used for buffering the frame data input by the serial-parallel conversion unit and transmitting the frame data to the memory unit through the memory unit interface unit; the interface unit is used for reading the frame data in the memory unit from the memory unit interface unit and transmitting the frame data to the central processing unit interface unit;
and the central processor interface unit is connected with the data buffer FIFO unit and the central processor CUP, receives the frame data transmitted by the data buffer FIFO unit and transmits the frame data to the central processor.
The central processing unit comprises a network interface, and the central processing unit is connected with the protocol interpretation equipment through the network interface.
The workflow according to the above-described embodiment of the present invention is as follows:
firstly, an unscrambler sets triggering conditions for capturing frame data through protocol unscrambling equipment, for example, the frame data is captured and stored under certain specific conditions;
receiving an optical signal output from the tested equipment, and dividing the input optical signal into two paths of optical signals through an optical fiber splitter, wherein one path of optical signal is used for output so as to ensure normal service operation;
performing photoelectric conversion on the other optical signal in the two optical signals in a photoelectric receiving unit;
the electric signals after photoelectric conversion are sent to a PLD unit, namely an FPGA chip, and a clock data synchronization unit in the FPGA chip carries out clock data synchronization; converting serial data subjected to clock data synchronization into parallel data in a serial-parallel conversion unit in the FPGA chip; and after the parallel data are buffered by a data buffer FIFO unit in the FPGA chip, the parallel data are written into the memory unit. The frame data captured by the memory unit 36 is captured according to a preset trigger condition, so as to ensure that the captured frame data is meaningful.
When interpreting a virtual concatenation VC, a link capacity adjustment scheme LCAS, a link access procedure-synchronous digital hierarchy lap-SONET, a high-level data link control HDLC or a generic framing procedure GFP, the workflow is:
the unscrambler can issue a protocol unscrambling instruction through the protocol unscrambling equipment;
after the central processing unit obtains the instruction, the FPGA chip reads frame data from the memory unit, namely, the data in the memory unit is read through the memory unit interface unit and stored in the data buffer FIFO unit, then the frame data is sent to the protocol interpretation equipment through the CUP interface unit, and the protocol interpretation software running in the protocol interpretation equipment performs corresponding protocol interpretation on the frame data.
The invention also provides a SONET-based multiservice transmission protocol interpretation method. In the invention, the method is realized by adopting the SONET-based multiservice transmission protocol interpretation device.
The SONET based multi-service transport protocol interpretation method of the present invention is described in detail below, and as shown in figure 2, the method comprises the steps of:
step 1, receiving an optical signal output from a tested device by an optical input end, and dividing the input optical signal into two paths of optical signals through an optical fiber splitter, wherein one path of optical signal is used for output so as to ensure normal service operation;
step 2, the other of the two signals is used for protocol interpretation, and relevant continuous multiframe complete frame data is stored in a memory unit according to a preset trigger condition;
step 3, according to the protocol interpretation instruction, the central processing unit reads the frame data stored in the memory unit and sends the frame data to the protocol interpretation equipment;
and 4, performing protocol interpretation on the frame data stored in the memory unit by using protocol interpretation software running on the protocol interpretation equipment according to the protocol type.
In this embodiment, the PLD unit is a field programmable gate array chip, and the step 2 may adopt the following specific steps:
performing photoelectric conversion on the other optical signal in the two optical signals;
transmitting the electric signal after photoelectric conversion to carry out clock data synchronization;
converting serial data subjected to clock data synchronization into parallel data;
and after the parallel data is buffered by the PLD unit, writing the parallel data into the memory unit.
And storing continuous multi-frame complete frame data carried by the other optical signal in the two optical signals in a memory unit.
In this embodiment, if the PLD unit is a field programmable gate array chip with a high-speed transceiver hard core (SERDES), then step 2 may further be completed by the following steps:
performing photoelectric conversion on the other optical signal in the two optical signals;
and transmitting the electric signal subjected to the photoelectric conversion to a PLD unit, carrying out clock data synchronization, converting serial data subjected to the clock data synchronization into parallel data, buffering the parallel data, and writing the parallel data into the memory unit.
In this embodiment, in the step 3, the reading of the frame data stored in the memory unit by the central processing unit means that the central processing unit reads the frame data in the memory unit through the PLD unit, and the method includes the steps of:
reading and storing frame data in the memory unit by the PLD unit;
the CPU reads the frame data stored in the PLD unit.
In this embodiment, the protocol interpretation of the frame data in step 4 refers to extracting values of the payload and overhead of the frame data in the area related to the interpreted protocol, and continuously displaying the values related to the interpreted protocol in the complete frames of data, so that an operator can perform the interpretation intuitively, and the interpretation requirements of the SONET-based multi-service transport protocol are met.
In this embodiment, the trigger condition and the protocol interpretation command are set by a protocol interpretation device.
In this embodiment, the n continuous complete frames of data stored in the SONET-based multi-service transport protocol interpretation apparatus are SONET sdh frame data, which includes complete payload and overhead content.
The number of the continuous multiframe complete frame data is determined by the service rate and the storage capacity of the memory unit. The capacity of the memory unit is modified, so that the requirements of different services and different frame numbers can be met.
The specific protocol type in the present invention may be a technology, standard, protocol, etc. related to SONET encapsulation. Such as: virtual cascade VC, link capacity adjusting scheme LCAS, link access procedure-synchronous digital system LAPS-SHD, high-level data link control HDLC and general framing procedure GFP.
The protocol interpretation software is more flexible to realize, and the design mode of the interface can be determined according to the type of the interpreted protocol.
In the interpretation method of the SONET-based multi-service transmission protocol, when the protocol changes or a new protocol type appears, only software needs to be changed to meet the new requirement and support the new protocol type. And the capacity and bandwidth of a memory unit of the MSTP interpretation device can be changed to support higher service rate and larger storage depth.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. A SONET-based multi-service transmission protocol interpretation device comprises an optical input end, an optical output end, a photoelectric receiving unit, an optical fiber splitter, a clock data synchronization unit, a serial-parallel conversion unit, a PLD (programmable logic device) unit, a memory unit, a central processing unit and protocol interpretation equipment running protocol interpretation software; wherein,
the optical fiber splitter is used for splitting an optical signal input from the optical input end into two optical signals, wherein one optical signal is output through the optical output end, and the other optical signal is sent to the photoelectric receiving unit; the optical signal carries complete frame data;
the clock data synchronization unit is connected with the photoelectric receiving unit and is used for carrying out clock data synchronization on the input photoelectric converted electric signal;
a serial-to-parallel conversion unit for converting the serial data input from the clock data synchronization unit into parallel data and outputting the parallel data to the PLD unit;
the PLD unit is used for buffering the parallel data and writing the parallel data into a memory unit; reading and storing frame data stored in the memory unit under the control of the central processing unit, and then sending the frame data to the central processing unit;
the central processing unit is connected with the PLD unit and the protocol interpretation equipment, reads the frame data transmitted by the PLD unit according to the protocol interpretation instruction sent by the protocol interpretation equipment, and sends the frame data to the protocol interpretation equipment;
the protocol interpretation equipment sends a protocol interpretation instruction to the central processing unit; and receiving frame data transmitted by the central processing unit, and performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on the protocol interpretation equipment.
2. The apparatus of claim 1, wherein the PLD unit comprises a FIFO unit, a memory unit interface unit, and a central processing unit interface unit; wherein,
the FIFO unit is connected with the serial-parallel conversion unit and the memory unit interface unit and is used for buffering the frame data input by the serial-parallel conversion unit and transmitting the frame data to the memory unit through the memory unit interface unit; the interface unit is used for reading the frame data in the memory unit from the memory unit interface unit and transmitting the frame data to the central processing unit interface unit;
and the central processor interface unit is connected with the FIFO unit and the central processor, receives the frame data transmitted by the FIFO unit and transmits the frame data to the central processor.
3. An apparatus as recited in claim 2, said central processor comprising a network interface through which said central processor is connected to said protocol interpretation device.
4. A method for performing protocol interpretation by a SONET based multi-service transmission protocol interpretation apparatus according to any of claims 1-3 and comprising the steps of:
receiving an optical signal output from the tested equipment, and dividing the input optical signal into two paths of optical signals through an optical fiber splitter, wherein one path of optical signal is used for output so as to ensure normal service operation;
the other optical signal is used for protocol interpretation, and relevant continuous multi-frame complete frame data in the other optical signal in the two optical signals are stored in a memory unit according to a preset trigger condition;
according to the protocol interpretation instruction, the central processing unit reads the frame data stored in the memory unit and sends the frame data to the protocol interpretation equipment;
performing protocol interpretation on the frame data according to the protocol type by protocol interpretation software running on protocol interpretation equipment;
wherein the protocol interpretation comprises:
extracting values of regions related to the interpreted protocol in payload and overhead of frame data;
continuously displaying the values related to the interpreted protocol in the complete frame data of a plurality of frames so as to facilitate the intuitive interpretation.
5. A method as claimed in claim 4, storing the associated plurality of consecutive frames of complete frame data in a memory unit, comprising the steps of:
performing photoelectric conversion on the other optical signal in the two optical signals;
performing clock data synchronization on the electric signal subjected to photoelectric conversion;
converting serial data subjected to clock data synchronization into parallel data;
and after the parallel data is buffered by the PLD unit, writing the parallel data into the memory unit.
6. A method as claimed in claim 4, storing the associated plurality of consecutive frames of complete frame data in a memory unit, comprising the steps of:
performing photoelectric conversion on the other optical signal in the two optical signals;
and transmitting the electric signal subjected to the photoelectric conversion to a PLD unit, carrying out clock data synchronization, converting serial data subjected to the clock data synchronization into parallel data, buffering the parallel data, and writing the parallel data into the memory unit.
7. A method as claimed in claim 4, wherein the trigger condition and the protocol interpretation instruction are set by the protocol interpretation device.
8. The method as claimed in claim 4, wherein the CPU reads the frame data stored in the memory unit, comprising the steps of:
reading and storing frame data in the memory unit by the PLD unit;
the CPU reads the frame data stored in the PLD unit.
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| US7277447B2 (en) * | 2001-03-30 | 2007-10-02 | Redback Networks Inc. | Onboard RAM based FIFO with pointers to buffer overhead bytes of synchronous payload envelopes in synchronous optical networks |
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