CN104391722A - Dual-BIOS design based on server system - Google Patents
Dual-BIOS design based on server system Download PDFInfo
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- CN104391722A CN104391722A CN201410717135.XA CN201410717135A CN104391722A CN 104391722 A CN104391722 A CN 104391722A CN 201410717135 A CN201410717135 A CN 201410717135A CN 104391722 A CN104391722 A CN 104391722A
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- bios
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- spi bus
- pch
- switch chip
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Abstract
The invention provides a double-BIOS design based on a server system, wherein an SPI bus of a PCH of the system is connected to a 1-to-2 switch chip, the switch chip is used for respectively connecting the SPI bus to a master BIOS chip and a slave BIOS chip, and the SPI bus of the PCH is controlled to be connected to the master BIOS chip and the slave BIOS chip through a logic control unit. Under the default state, the SPI bus of PCH is connected to the main BIOS chip, and when the main BIOS chip breaks down, the logic control unit switches the SPI bus of PCH to the slave BIOS through the switch chip, thereby ensuring the normal function of BIOS. Compared with the prior art, the BIOS redundancy can be realized, the system reliability is improved, the faults that the system cannot be started up and the like due to BIOS damage are avoided, and the BIOS redundancy protection method has the characteristics of reasonable design, simple structure, easiness in processing, convenience in use and the like, so that the BIOS redundancy protection method has good use value.
Description
Technical field
The present invention relates to server system technical field, specifically a kind of two BIOS designs based on server system.
Background technology
The reliability requirement of development to server of server technology is more and more higher now, and BIOS is as a part extremely important in system, self-evident on the impact of whole system, ensures the reliability and stability of BIOS, for of crucial importance system.The present invention is directed to this situation, by increasing BIOS redundancy, to ensure the security of BIOS.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of two BIOS designs based on server system are provided.
Technical scheme of the present invention realizes in the following manner, the spi bus of system PCH is connected to the switch chip of 1-to-2 by its structure, spi bus is connected respectively to principal and subordinate's two BIOS chips by switch chip, is connected to principal and subordinate BIOS chip by the spi bus of logic control element control PCH.Under default conditions, the spi bus of PCH is connected to main BIOS chip, and when main BIOS chip breaks down, the spi bus of PCH is switched to from BIOS by switch chip by logic control element, ensures that BIOS function is normal.
Advantage of the present invention is:
A kind of two BIOS designs based on server system of the present invention compared to the prior art, BIOS redundancy can be realized, improve system reliability, avoid occurring occurring that system such as cannot to be started shooting at the fault because BIOS damages, and the present invention have reasonable in design, structure simple, be easy to processing, the feature such as easy to use, thus, there is good use value.
Embodiment
Below a kind of two BIOS designs based on server system of the present invention are described in detail below.
A kind of two BIOS designs based on server system of the present invention, the spi bus of system PCH is connected to the switch chip of 1-to-2, spi bus is connected respectively to principal and subordinate's two BIOS chips by switch chip, is connected to principal and subordinate BIOS chip by the spi bus of logic control element control PCH.Under default conditions, the spi bus of PCH is connected to main BIOS chip, and when main BIOS chip breaks down, the spi bus of PCH is switched to from BIOS by switch chip by logic control element, ensures that BIOS function is normal.
The spi bus of PCH is connected to the first port of switch chip, the second port of switch chip is connected to Main BIOS, the 3rd port is connected to 2nd BIOS.By default, switch chip first port is connected with the second port by logic control element by system, and the spi bus of PCH is connected to Main BIOS, and now Main BIOS can use, and system can normally work.
When Main BIOS breaks down, upgrade unsuccessfully etc. situation time, switch chip first port is connected with the second port by logic control element by system, the spi bus of PCH is connected to 2nd BIOS, and now 2nd BIOS can use, and system can normally work.
It is very simple and convenient that a kind of two BIOS based on server system of the present invention design its processing and fabricating, can process to specifications.
Except the technical characteristic described in instructions, be the known technology of those skilled in the art.
Claims (1)
1. the two BIOS designs based on server system, it is characterized in that the spi bus by system PCH is connected to the switch chip of 1-to-2, spi bus is connected respectively to principal and subordinate's two BIOS chips by switch chip, is connected to principal and subordinate BIOS chip by the spi bus of logic control element control PCH; Under default conditions, the spi bus of PCH is connected to main BIOS chip, and when main BIOS chip breaks down, the spi bus of PCH is switched to from BIOS by switch chip by logic control element, ensures that BIOS function is normal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201410717135.XA CN104391722A (en) | 2014-12-03 | 2014-12-03 | Dual-BIOS design based on server system |
Applications Claiming Priority (1)
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CN201410717135.XA CN104391722A (en) | 2014-12-03 | 2014-12-03 | Dual-BIOS design based on server system |
Publications (1)
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CN104391722A true CN104391722A (en) | 2015-03-04 |
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CN201410717135.XA Pending CN104391722A (en) | 2014-12-03 | 2014-12-03 | Dual-BIOS design based on server system |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104731675A (en) * | 2015-03-24 | 2015-06-24 | 浪潮集团有限公司 | Intelligent redundancy backup method for BIOS in server system |
CN105468119A (en) * | 2015-11-19 | 2016-04-06 | 浪潮电子信息产业股份有限公司 | Hardware implementation method of reset circuit of multiple control terminals |
CN106020381A (en) * | 2016-06-14 | 2016-10-12 | 浪潮电子信息产业股份有限公司 | Method for realizing multi-product sharing one version BIOS |
CN108228394A (en) * | 2018-01-02 | 2018-06-29 | 郑州云海信息技术有限公司 | A kind of double BIOS Flash control systems of server and method |
CN108897646A (en) * | 2018-06-27 | 2018-11-27 | 郑州云海信息技术有限公司 | A kind of switching method and baseboard management controller of BIOS chip |
CN112084064A (en) * | 2020-08-05 | 2020-12-15 | 锐捷网络股份有限公司 | Master-slave BIOS switching method, board card and equipment |
-
2014
- 2014-12-03 CN CN201410717135.XA patent/CN104391722A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104731675A (en) * | 2015-03-24 | 2015-06-24 | 浪潮集团有限公司 | Intelligent redundancy backup method for BIOS in server system |
CN105468119A (en) * | 2015-11-19 | 2016-04-06 | 浪潮电子信息产业股份有限公司 | Hardware implementation method of reset circuit of multiple control terminals |
CN106020381A (en) * | 2016-06-14 | 2016-10-12 | 浪潮电子信息产业股份有限公司 | Method for realizing multi-product sharing one version BIOS |
CN108228394A (en) * | 2018-01-02 | 2018-06-29 | 郑州云海信息技术有限公司 | A kind of double BIOS Flash control systems of server and method |
CN108897646A (en) * | 2018-06-27 | 2018-11-27 | 郑州云海信息技术有限公司 | A kind of switching method and baseboard management controller of BIOS chip |
CN108897646B (en) * | 2018-06-27 | 2021-10-15 | 郑州云海信息技术有限公司 | Switching method of BIOS (basic input output System) chips and substrate management controller |
CN112084064A (en) * | 2020-08-05 | 2020-12-15 | 锐捷网络股份有限公司 | Master-slave BIOS switching method, board card and equipment |
CN112084064B (en) * | 2020-08-05 | 2023-03-31 | 锐捷网络股份有限公司 | Master-slave BIOS switching method, board card and equipment |
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Application publication date: 20150304 |