CN104320594A - Serial port matrix switcher based on FPGA - Google Patents

Serial port matrix switcher based on FPGA Download PDF

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Publication number
CN104320594A
CN104320594A CN201410671817.1A CN201410671817A CN104320594A CN 104320594 A CN104320594 A CN 104320594A CN 201410671817 A CN201410671817 A CN 201410671817A CN 104320594 A CN104320594 A CN 104320594A
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module
fpga
serial ports
serial port
input
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CN201410671817.1A
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连明昌
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Abstract

The invention relates to a serial port matrix switcher based on an FPGA. The serial port matrix switcher based on the FPGA comprises a plurality of serial port input channels, a plurality of serial port output channels, an FPGA matrix switching module for switching and allocating serial port input signals to a serial port output channel, a single-chip microcomputer control module for controlling matrix switching operation, and a power module for providing a system power source. The FPGA matrix switching module comprises an input serial port communication module, a gate switching module, a decoding module, a command decoding module, an SPI bus communication module and an output serial port communication module. The single-chip microcomputer control module is in communication with the FPGA matrix switching module through an SPI bus, and comprises an input key, an output key, a control key, a storage module, a display module and a control serial port module in communication with an upper computer. Through the serial port matrix switcher based on the FPGA, matrix switching output of multipath serial port communication is achieved, serial port device matrix control can be flexibly and conveniently achieved, and serial port communication lines can be flexibly and conveniently allocated.

Description

Based on the serial ports matrix switcher of FPGA
Technical field
The present invention relates to a kind of matrix switcher, relate to a kind of serial ports matrix switcher based on FPGA specifically.
Background technology
Serial ports RS-232 communication is widely used in equipment and controls and low-speed communication.When the equipment that is applied to controls, host computer by serial ports to equipment sending controling instruction, device decodes instruction completes corresponding operating, host computer and number of devices numerous time, the control appliance that host computer connects often will change, equipment also often needs different PC control, and host computer needs frequent plug Serial Port Line to meet the different demand for control of equipment.When being applied to low-speed communication, when line connecting relation change or cable damage, needing again cloth Serial Port Line or change serial ports cable.Therefore, need a kind of multiple serial communication Inverse problem output equipment, realize serial equipment matrix majorization with flexible and distribute serial communication circuit.
Summary of the invention
Object of the present invention will solve the problem exactly, provides a kind of serial ports matrix switcher realized based on FPGA technology.
The object of the invention is to be achieved through the following technical solutions.
A kind of serial ports matrix switcher based on FPGA comprises multiple serial ports input channel, multiple serial ports output channel, switches and distribute serial ports input signal to the single chip control module of the FPGA Inverse problem module of serial ports output channel, gating matrix handover operation and the power module providing system power supply.
Described serial ports input and output passage comprise MAX3232 serial ports conversion chip and peripheral circuit thereof, DB9 serial port male with female, communicate indicator light, serial ports male and female parallel join are to mate the input/output interface of distinct device.
Described FPGA Inverse problem module comprises input serial communication modular, gating handover module, decoding module, command decode module, spi bus communication module and exports serial communication modular.
Described single chip control module is communicated by spi bus with FPGA Inverse problem module, the control serial port module comprising input key, output key, control button, memory module, display module and communicate with host computer.FPGA matrix switcher is by button and control serial ports two kinds of mode realization matrixs switchings and setting operation.
The input key of described single chip control module and output key select corresponding input and output channel number, controlling button and switch the input channel of selection to output channel, controlling button also for arranging matrix operating state.
Described host computer is by controlling serial port module to single-chip microcomputer sending controling instruction, and single-chip microcomputer completes Inverse problem and setting operation according to instruction.
Beneficial effect of the present invention: the Inverse problem being realized serial communication by the FPGA (Field Programmable Gate Array) characteristic of FPGA, under the control of button and host computer two kinds of modes, annexation and the messaging parameter of serial ports input and output passage are set, complete Inverse problem, realize the function of serial equipment matrix majorization and distribution serial communication circuit flexibly and easily, can inquire about on display screen and upper computer software easily and display annexation.
Accompanying drawing explanation
Accompanying drawing 1 is serial ports I/O channel structure chart.
Accompanying drawing 2 is MAX3232 peripheral circuit diagrams.
Accompanying drawing 3 is FPGA controller functional modules.
Accompanying drawing 4 is single chip control module structure charts.
Embodiment
Be described in further detail below in conjunction with drawings and Examples.
A kind of serial ports matrix switcher based on FPGA comprises multiple serial ports input channel, multiple serial ports output channel, switches and distribute serial ports input signal to the single chip control module of the FPGA Inverse problem module of serial ports output channel, gating matrix handover operation and the power module providing system power supply.
Serial ports input and output channel design, as shown in Figure 1, comprise MAX3232 serial ports conversion chip and peripheral circuit thereof, DB9 serial port male with female, communicate indicator light.MAX3232 chip utilizes dual charge pump technology to realize RS-232 signal level and FPGA level conversion, and realize the transfer of data that rs-232 standard requires, as shown in Figure 2, chip periphery circuit only needs the charge pump capacitor of four 0.1uF.Serial ports male and female parallel join are to mate the input/output interface of distinct device.Send pwm signal by FPGA controller and control this tunneling traffic state of communication indicator light flicker instruction.
FPGA Inverse problem module, as shown in Figure 3, comprises input serial communication modular, gating handover module, decoding module, command decode module, spi bus communication module and exports serial communication modular.Serial communication modular realizes RS-232 serial communication protocol, by messaging parameters such as command decode module installation baud rates, when receiving and send data, pulse-width modulation (PWM) signal is sent to indicator light, pulsewidth is determined, by indicator light flicker speed instruction communications status and speed by baud rate size.Gating handover module arranges the annexation of corresponding input channel and output channel according to the result of decoding module.Decoding module selects corresponding input channel and output channel according to input channel number with output channel decoding.The order that the decoding of command decode module sends from single-chip microcomputer, carries out corresponding operation according to order, as channel parameters setting and passage bridge etc.SPI communication module realizes spi bus communication protocol, receives the order from single chip control module and data.
Single chip control module structure, as shown in Figure 4, the control serial port module comprising input key, output key, control button, memory module, display module and communicate with host computer.Single chip control module is communicated by spi bus with FPGA Inverse problem module, and the order from button and host computer sends to FPGA controller by SPI.Display module can display matrix switch state parameter and actions menu, memory module storage program and supplemental characteristic.
FPGA matrix switcher is by button and control serial ports two kinds of mode realization matrixs switchings and setting operation.Input key and output key select corresponding input and output channel number, controlling button and switch the input channel of selection to output channel, controlling button also for arranging matrix operating state.Upper computer software is by controlling serial port module to single-chip microcomputer sending controling instruction, and single-chip microcomputer completes Inverse problem and setting operation according to instruction.

Claims (7)

1. based on a serial ports matrix switcher of FPGA, it is characterized in that: comprise multiple serial ports input channel, multiple serial ports output channel, switch and distribute serial ports input signal to the single chip control module of the FPGA Inverse problem module of serial ports output channel, gating matrix handover operation and the power module providing system power supply.
2. a kind of serial ports matrix switcher based on FPGA according to claim 1, it is characterized in that: described serial ports input and output passage comprise MAX3232 serial ports conversion chip and peripheral circuit thereof, DB9 serial port male with female, communicate indicator light, serial ports male and female parallel join are to mate the input/output interface of distinct device.
3. a kind of serial ports matrix switcher based on FPGA according to claim 1, is characterized in that: described FPGA Inverse problem module comprises input serial communication modular, gating handover module, decoding module, command decode module, spi bus communication module and exports serial communication modular.
4. a kind of serial ports matrix switcher based on FPGA according to claim 1, it is characterized in that: described single chip control module is communicated by spi bus with FPGA Inverse problem module, the control serial port module comprising input key, output key, control button, memory module, display module and communicate with host computer.
5. a kind of serial ports matrix switcher based on FPGA according to claim 4, is characterized in that: described FPGA matrix switcher is by button and control serial ports two kinds of mode realization matrixs switchings and setting operation.
6. a kind of serial ports matrix switcher based on FPGA according to claim 4, it is characterized in that: described input key and output key select corresponding input and output channel number, controlling button and switch the input channel of selection to output channel, controlling button also for arranging matrix operating state.
7. a kind of serial ports matrix switcher based on FPGA according to claim 4, is characterized in that: described PC control software is by controlling serial port module to single-chip microcomputer sending controling instruction, and single-chip microcomputer completes Inverse problem and setting operation according to instruction.
CN201410671817.1A 2014-11-21 2014-11-21 Serial port matrix switcher based on FPGA Pending CN104320594A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105488003A (en) * 2015-11-24 2016-04-13 上海斐讯数据通信技术有限公司 Circuit structure and method for enhancing reliability of RS232 communication interface
CN110895501A (en) * 2019-06-10 2020-03-20 研祥智能科技股份有限公司 Serial port switching method and system
CN111181690A (en) * 2019-12-26 2020-05-19 山西银河电子设备厂 Multi-channel communication and interface dynamic switching method
CN111241020A (en) * 2019-12-31 2020-06-05 广州展讯信息科技有限公司 Serial port switching device and method based on FPGA and storage medium

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US20080147926A1 (en) * 2006-10-18 2008-06-19 Mitac International Corp. Interface conversion device
CN201450565U (en) * 2009-07-22 2010-05-05 广东响石数码科技有限公司 Central control matrix
CN102033833A (en) * 2009-09-25 2011-04-27 研祥智能科技股份有限公司 Serial port communication switching method and serial port communication system
CN102035532A (en) * 2009-09-28 2011-04-27 上海爱瑞科技发展有限公司 Software switching circuit for communication serial port
CN203801010U (en) * 2014-01-24 2014-08-27 广州市天誉创高电子科技有限公司 Mixed matrix switcher

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080147926A1 (en) * 2006-10-18 2008-06-19 Mitac International Corp. Interface conversion device
CN201450565U (en) * 2009-07-22 2010-05-05 广东响石数码科技有限公司 Central control matrix
CN102033833A (en) * 2009-09-25 2011-04-27 研祥智能科技股份有限公司 Serial port communication switching method and serial port communication system
CN102035532A (en) * 2009-09-28 2011-04-27 上海爱瑞科技发展有限公司 Software switching circuit for communication serial port
CN203801010U (en) * 2014-01-24 2014-08-27 广州市天誉创高电子科技有限公司 Mixed matrix switcher

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105488003A (en) * 2015-11-24 2016-04-13 上海斐讯数据通信技术有限公司 Circuit structure and method for enhancing reliability of RS232 communication interface
CN110895501A (en) * 2019-06-10 2020-03-20 研祥智能科技股份有限公司 Serial port switching method and system
CN110895501B (en) * 2019-06-10 2024-05-14 研祥智慧物联科技有限公司 Serial port switching method and system thereof
CN111181690A (en) * 2019-12-26 2020-05-19 山西银河电子设备厂 Multi-channel communication and interface dynamic switching method
CN111241020A (en) * 2019-12-31 2020-06-05 广州展讯信息科技有限公司 Serial port switching device and method based on FPGA and storage medium
CN111241020B (en) * 2019-12-31 2022-04-22 广州展讯信息科技有限公司 Serial port switching device and method based on FPGA and storage medium

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Application publication date: 20150128