CN104301738B - Video coding-decoding method and 3 D video codec - Google Patents

Video coding-decoding method and 3 D video codec Download PDF

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Publication number
CN104301738B
CN104301738B CN201310303248.0A CN201310303248A CN104301738B CN 104301738 B CN104301738 B CN 104301738B CN 201310303248 A CN201310303248 A CN 201310303248A CN 104301738 B CN104301738 B CN 104301738B
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China
Prior art keywords
hevc
instrument
value
code streams
video
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CN201310303248.0A
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Chinese (zh)
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CN104301738A (en
Inventor
刘鸿彬
贾杰
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LG Electronics China Research and Development Center Co Ltd
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LG Electronics China Research and Development Center Co Ltd
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Priority to CN201310303248.0A priority Critical patent/CN104301738B/en
Priority to PCT/CN2013/090672 priority patent/WO2015007066A1/en
Publication of CN104301738A publication Critical patent/CN104301738A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/597—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding specially adapted for multi-view video sequence encoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Abstract

The invention discloses a kind of video coding-decoding method and 3 D video codec, wherein video encoding/decoding method includes：If receiving MV HEVC code streams, closing all 3D HEVC includes but instrument not to be covered in MV HEVC, carries out MV HEVC code stream decodings；If receiving 3D HEVC code streams, 3D HEVC code stream decodings are carried out.Wherein method for video coding includes：3D HEVC code streams are encoded, includes for all 3D HEVC but instrument not to be covered sets switching flag bits in MV HEVC, and value is set to indicate that and opens or closes corresponding instrument.Using the present invention 3 D video decoder can be allow to decode MV HEVC code streams, realize 3D HEVC compatibility MV HEVC, more flexibilities can also be provided for 3D HEVC.

Description

Video coding-decoding method and 3 D video codec
Technical field
The present invention relates to 3 D video encoding and decoding and multi-angle video encoding and decoding technique field, more particularly to coding and decoding video Method and 3 D video codec.
Background technology
3D-HEVC (3D High Efficiency Video Coding, the 3 D video pressure based on efficient video coding Contracting standard) MV-HEVC (Multi-View High Efficiency Video Coding, based on efficient video can be regarded as The multi-view video coding standard of coding) extension.However, in existing design, 3D-HEVC can not compatible MV-HEVC.It is this It is irrational to design the ability for wasting 3 D video decoder.
The content of the invention
The embodiment of the present invention provides a kind of video encoding/decoding method, to allow 3 D video decoder to decode MV-HEVC Code stream, realizes 3D-HEVC compatibility MV-HEVC, and this method includes：
If receiving MV-HEVC code streams, closing all 3D-HEVC includes but instrument not to be covered in MV-HEVC, enters Row MV-HEVC code stream decodings；
If receiving 3D-HEVC code streams, 3D-HEVC code stream decodings are carried out.
In one embodiment, above-mentioned video encoding/decoding method also includes：
The flag bit of extending video parameter set 2 is obtained after reception code stream；
According to the flag bit of extending video parameter set 2, it is determined that the code stream received is MV-HEVC code streams or 3D-HEVC Code stream.
In one embodiment, above-mentioned video encoding/decoding method also includes：
If receiving MV-HEVC code streams, include for all 3D-HEVC but instrument setting not to be covered is opened in MV-HEVC Flag bit is closed, and value is set to indicate that closing.
In one embodiment, described is that all 3D-HEVC include but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that closing, including：
In extending video parameter set 2, include for all 3D-HEVC but instrument setting not to be covered is opened in MV-HEVC Flag bit is closed, and value is set to indicate that closing, does not decode extending video parameter set 2 now.
In one embodiment, above-mentioned video encoding/decoding method also includes：
If receiving 3D-HEVC code streams, according to including for all 3D-HEVC but instrument not to be covered is set in MV-HEVC The value for the switching flag bits put, open or close corresponding instrument.
In one embodiment, the basis is that all 3D-HEVC include but instrument not to be covered is set in MV-HEVC The value of switching flag bits, corresponding instrument is opened or closed, including：
Decoding expansion video parameter collection 2, according to being that all 3D-HEVC include but MV-HEVC in extending video parameter set 2 In the value of switching flag bits that sets of instrument not to be covered, open or close corresponding instrument.
In one embodiment, described is the switch that all 3D-HEVC include but instrument not to be covered is set in MV-HEVC The value of flag bit, it is configured according to the decoding capability of decoding end.
The embodiment of the present invention also provides a kind of method for video coding, to provide more flexibilities, the party for 3D-HEVC Method includes：
3D-HEVC code streams are encoded, includes for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that and opens or closes corresponding instrument.
In one embodiment, described is that all 3D-HEVC include but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that the corresponding instrument that opens or closes, including：
According to the decoding capability of decoding end, include for all 3D-HEVC but instrument setting not to be covered is opened in MV-HEVC Close the value of flag bit.
In one embodiment, above-mentioned method for video coding also includes：
The value of the flag bit of extending video parameter set 2 is set, indicate coded code stream be MV-HEVC code streams or 3D-HEVC code streams.
The embodiment of the present invention also provides a kind of 3 D video decoder, to allow 3 D video decoder to decode MV- HEVC code streams, 3D-HEVC compatibility MV-HEVC are realized, the 3 D video decoder includes：
Determining module, the code stream for determining to receive is MV-HEVC code streams or 3D-HEVC code streams；
Various visual angles decoder module, for after the determining module determines to receive MV-HEVC code streams, closing all 3D- HEVC includes but instrument not to be covered in MV-HEVC, carries out MV-HEVC code stream decodings；
Three-dimensional decoder module, for after the determining module determines to receive 3D-HEVC code streams, carrying out 3D-HEVC codes Stream decoding.
In one embodiment, the determining module includes：
Obtaining unit, the flag bit of extending video parameter set 2 is obtained after code stream for receiving；
Determining unit, for the flag bit according to extending video parameter set 2, it is determined that the code stream received is MV-HEVC codes Stream or 3D-HEVC code streams.
In one embodiment, above-mentioned 3 D video decoder also includes：
Switching flag bits setup module, for being all after the determining module determines to receive MV-HEVC code streams 3D-HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that closing.
In one embodiment, the switching flag bits setup module is specifically used in extending video parameter set 2, is all 3D-HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that closing；Now The various visual angles decoder module is further used for not decoding extending video parameter set 2.
In one embodiment, above-mentioned 3 D video decoder also includes：
Tool switch module, for after the determining module determines to receive 3D-HEVC code streams, according to for all 3D- HEVC include but in MV-HEVC the switching flag bits that instrument not to be covered is set value, open or close corresponding instrument.
In one embodiment, the three-dimensional decoder module is further used for decoding expansion video parameter collection 2；The instrument is opened Module is closed to be specifically used for according to being that all 3D-HEVC include but instrument not to be covered in MV-HEVC in extending video parameter set 2 The value of the switching flag bits of setting, open or close corresponding instrument.
In one embodiment, described is the switch that all 3D-HEVC include but instrument not to be covered is set in MV-HEVC The value of flag bit, is configured according to decoding capability.
The embodiment of the present invention also provides a kind of 3 d video encoding device, should to provide more flexibilities for 3D-HEVC 3 d video encoding device includes：
Coding module, for encoding 3D-HEVC code streams；
Switching flag bits setup module, for the coding module encode 3D-HEVC code streams when, for all 3D-HEVC Include but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that and opens or closes corresponding work Tool.
In one embodiment, the switching flag bits setup module is specifically used for the decoding capability according to decoding end, for institute There is the value that 3D-HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC.
In one embodiment, above-mentioned 3 d video encoding device also includes：
Code stream traffic sign placement module, the value of the flag bit for setting extending video parameter set 2, indicate coded code Stream is MV-HEVC code streams or 3D-HEVC code streams.
In the embodiment of the present invention, if receiving MV-HEVC code streams, closing all 3D-HEVC is included but in MV-HEVC Instrument not to be covered, carry out MV-HEVC code stream decodings；If receiving 3D-HEVC code streams, 3D-HEVC code stream decodings are carried out；From And 3 D video decoder is decoded MV-HEVC code streams, realize 3D-HEVC compatibilities MV-HEVC.
In the embodiment of the present invention, 3D-HEVC code streams are encoded, are included for all 3D-HEVC but not to be covered in MV-HEVC Instrument sets switching flag bits, and value is set to indicate that and opens or closes corresponding instrument, so as to be provided more for 3D-HEVC Flexibility, flexibly opening or closing all 3D-HEVC includes but instrument not to be covered in MV-HEVC.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, make required in being described below to embodiment Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings Accompanying drawing.In the accompanying drawings：
Fig. 1 is the process chart of video encoding/decoding method in the embodiment of the present invention；
Fig. 2 is the process chart of method for video coding in the embodiment of the present invention；
Fig. 3 is the structural representation of 3 D video decoder in the embodiment of the present invention；
Fig. 4 is the schematic diagram of the instantiation of determining module in the embodiment of the present invention；
Fig. 5 is the schematic diagram of the instantiation of 3 D video decoder shown in Fig. 3 in the embodiment of the present invention；
Fig. 6 is the schematic diagram of the instantiation of 3 D video decoder shown in Fig. 3 in the embodiment of the present invention；
Fig. 7 is the structural representation of 3 d video encoding device in the embodiment of the present invention；
Fig. 8 is the schematic diagram of the instantiation of 3 d video encoding device shown in Fig. 7 in the embodiment of the present invention.
Embodiment
For the purpose, technical scheme and advantage of the embodiment of the present invention are more clearly understood, below in conjunction with the accompanying drawings to this hair Bright embodiment is described in further details.Here, the schematic description and description of the present invention is used to explain the present invention, but simultaneously It is not as a limitation of the invention.
Fig. 1 is the process chart of video encoding/decoding method in the embodiment of the present invention.As shown in figure 1, in the embodiment of the present invention Video encoding/decoding method can include：
The code stream that step 101, determination receive is MV-HEVC code streams or 3D-HEVC code streams；If receive MV-HEVC Code stream, then perform step 102；If receiving 3D-HEVC code streams, step 103 is performed；
Step 102, all 3 D video compression standard 3D-HEVC based on efficient video coding of closing include but MV- Instrument not to be covered in HEVC, carry out MV-HEVC code stream decodings；
Step 103, carry out 3D-HEVC code stream decodings.
Flow, when the code stream received is MV-HEVC code streams, is closed it is known that in the embodiment of the present invention as shown in Figure 1 Closing all 3D-HEVC includes but instrument not to be covered in MV-HEVC, carries out MV-HEVC code stream decodings so that 3 D video solution Code device can decode MV-HEVC code streams, realize 3D-HEVC compatibilities MV-HEVC.Because 3D-HEVC can regard MV-HEVC's as Extension, MV-HEVC is substantially 3D-HEVC a subset, therefore, all 3D-HEVC is included but not wrapped in MV-HEVC The instrument included is closed, you can the instrument decoding MV-HEVC code streams for including 3 D video decoder application MV-HEVC.
When it is implemented, the code stream that a flag bit can be applied to determine to receive is MV-HEVC code streams or 3D-HEVC codes Stream.Such as the flag bit can be that (video parameter set, this parameter set is in MV-HEVC and 3D- for video parameter collection Have in HEVC code streams) in vps_extension2_flag (video parameter set extension 2flag, expand Open up the flag bit of video parameter collection 2), the flag bit of extending video parameter set 2 can be obtained in implementation after code stream is received；According to The flag bit of extending video parameter set 2, it is determined that the code stream received is MV-HEVC code streams or 3D-HEVC code streams.Certainly implement When the flag bit can as needed be located at code stream in other parts, such as can be located at sequential parameter concentrate.One embodiment In, can be when vps_extension2_flag be "false", it is determined that the code stream received is MV-HEVC code streams, in vps_ When extension2_flag is "true", it is determined that the code stream received is 3D-HEVC code streams.
Can be that all 3D-HEVC include but do not wrapped in MV-HEVC when it is implemented, when receiving MV-HEVC code streams The instrument included sets switching flag bits, and value is set to indicate that closing, such as is set to "false", and accordingly closes these instruments. Switching flag bits can be for example located in extending video parameter set 2, and switching flag bits can also be set as needed when implementing certainly Other parts in code stream.In one embodiment, in extending video parameter set 2, include for all 3D-HEVC but MV- Instrument not to be covered sets switching flag bits in HEVC, and value is set to indicate that closing, does not decode extending video parameter now Collection 2.
If, can be according to including for all 3D-HEVC but MV-HEVC when it is implemented, receive 3D-HEVC code streams In the value of switching flag bits that sets of instrument not to be covered, open or close corresponding instrument.If switching flag bits are located at expansion Open up in video parameter collection 2, then, can be with decoding expansion video parameter collection 2, according to extending video when receiving 3D-HEVC code streams Be in parameter set 2 all 3D-HEVC include but in MV-HEVC the switching flag bits that instrument not to be covered is set value, beat Corresponding instrument is closed on or off.Include during implementation for all 3D-HEVC but instrument not to be covered is set in MV-HEVC switch The value of flag bit, it can be configured according to the decoding capability of decoding end.For example, in coding side, according to the decoding of decoding end Ability, includes but instrument not to be covered sets switching flag bits in MV-HEVC value for all 3D-HEVC.
Can not also be that all 3D-HEVC include but instrument not to be covered sets switch in MV-HEVC during one is implemented The value of flag bit, but wherein only have the value that Some tools are provided with switching flag bits, now, decoding end is receiving During 3D-HEVC code streams, the value of the switching flag bits only set according to this Some tools, this Some tools is opened or closed.For The value that all 3D-HEVC include but instrument not to be covered sets switching flag bits in MV-HEVC, actually can be 3D-HEVC provides more flexibilities, can flexibly open or close all 3D- according to factors such as the decoding capabilities of decoding end HEVC includes but instrument not to be covered in MV-HEVC.For example, in existing 3D-HEVC, vps_extension2 is only included The switching flag bits of Some tools, if coding side does not carry out switching flag bits value setting to other instruments, decoding end can only This Some tools is opened or closed, and if coding side includes to all 3D-HEVC but instrument not to be covered is carried out in MV-HEVC The setting of switching flag bits value, you can, can be according to decoding capability of decoding end etc. to provide more flexibilities for 3D-HEVC Factor flexibly opens or closes that all 3D-HEVC include but instrument not to be covered in MV-HEVC, autgmentability are more preferable.
Fig. 2 is the process chart of method for video coding in the embodiment of the present invention.As shown in Fig. 2 in the embodiment of the present invention Method for video coding can include：
Step 201, coding 3D-HEVC code streams；
Step 202, it is that all 3D-HEVC include but instrument not to be covered sets switching flag bits in MV-HEVC, and takes Value, which is set to indicate that, opens or closes corresponding instrument.
As it was previously stated, in the embodiment of the present invention, 3D-HEVC code streams are encoded, are included for all 3D-HEVC but MV-HEVC In instrument not to be covered switching flag bits are set, and value is set to indicate that and opens or closes corresponding instrument, can be 3D-HEVC More flexibilities are provided, flexibly opening or closing all 3D-HEVC includes but instrument not to be covered in MV-HEVC.
When it is implemented, described is that all 3D-HEVC include but instrument not to be covered sets switch sign in MV-HEVC Position, and value is set to indicate that and opens or closes corresponding instrument, can include：According to the decoding capability of decoding end, for all 3D- The value that HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC.
When it is implemented, the value of the flag bit of extending video parameter set 2 can also be set, indicate that coded code stream is MV-HEVC code streams or 3D-HEVC code streams.As it was previously stated, when implementing the coded code stream of instruction be MV-HEVC code streams or The other parts that the flag bit of 3D-HEVC code streams can be also located in code stream, such as sequential parameter can be located at and concentrated.One embodiment In, it can indicate that coded code stream is MV-HEVC code streams, in vps_ when vps_extension2_flag is "false" When extension2_flag is "true", indicate that coded code stream is 3D-HEVC code streams.
Based on same inventive concept, a kind of 3 D video decoder and 3 D video are additionally provided in the embodiment of the present invention and is compiled Code device, as described in the following examples.Because 3 D video decoder and 3 d video encoding device solve the principle difference of problem It is similar to aforementioned video coding/decoding method and method for video coding, therefore the implementation of 3 D video decoder and 3 d video encoding device The implementation of correlation method is may refer to, part is repeated and repeats no more.
Fig. 3 is the structural representation of 3 D video decoder in the embodiment of the present invention.As shown in figure 3, the embodiment of the present invention Middle 3 D video decoder can include：
Determining module 301, the code stream for determining to receive is MV-HEVC code streams or 3D-HEVC code streams；
Various visual angles decoder module 302, for after the determining module 301 determines to receive MV-HEVC code streams, closing institute There is 3D-HEVC to include but instrument not to be covered in MV-HEVC, carry out MV-HEVC code stream decodings；
Three-dimensional decoder module 303, for after the determining module 301 determines to receive 3D-HEVC code streams, carrying out 3D- HEVC code stream decodings.
Fig. 4 is the schematic diagram of the instantiation of determining module in the embodiment of the present invention.As shown in figure 4, determining module can be with Including：
Obtaining unit 401, the flag bit of extending video parameter set 2 is obtained after code stream for receiving；
Determining unit 402, for the flag bit according to extending video parameter set 2, it is determined that the code stream received is MV-HEVC Code stream or 3D-HEVC code streams.
Fig. 5 is the schematic diagram of the instantiation of 3 D video decoder shown in Fig. 3 in the embodiment of the present invention.As shown in figure 5, 3 D video decoder shown in Fig. 3 can also include：
Switching flag bits setup module 501, for after the determining module 301 determines to receive MV-HEVC code streams, being All 3D-HEVC include but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that closing.
When it is implemented, the switching flag bits setup module can be specifically used in extending video parameter set 2, for institute There is 3D-HEVC to include but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that closing；This Shi Suoshu various visual angles decoder module can be further used for not decoding extending video parameter set 2.
Fig. 6 is the schematic diagram of the instantiation of 3 D video decoder shown in Fig. 3 in the embodiment of the present invention.As shown in fig. 6, 3 D video decoder shown in Fig. 3 can also include：
Tool switch module 601, for after the determining module 301 determines to receive 3D-HEVC code streams, according to for institute Have 3D-HEVC include but in MV-HEVC the switching flag bits that instrument not to be covered is set value, open or close corresponding Instrument.
When it is implemented, the three-dimensional decoder module can be further used for decoding expansion video parameter collection 2；The instrument Switch module can be specifically used for according to being that all 3D-HEVC include but do not included in MV-HEVC in extending video parameter set 2 Instrument set switching flag bits value, open or close corresponding instrument.
When it is implemented, described is the switch mark that all 3D-HEVC include but instrument not to be covered is set in MV-HEVC The value of will position, it can be configured according to decoding capability.
Fig. 7 is the structural representation of 3 d video encoding device in the embodiment of the present invention.As shown in fig. 7, the embodiment of the present invention Middle 3 d video encoding device can include：
Coding module 701, for encoding 3D-HEVC code streams；
Switching flag bits setup module 702, for being all when the coding module 701 encodes 3D-HEVC code streams 3D-HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that and opens or closes phase The instrument answered.
When it is implemented, the switching flag bits setup module can be specifically used for the decoding capability according to decoding end, it is The value that all 3D-HEVC include but instrument not to be covered sets switching flag bits in MV-HEVC.
Fig. 8 is the schematic diagram of the instantiation of 3 d video encoding device shown in Fig. 7 in the embodiment of the present invention.As shown in figure 8, 3 d video encoding device shown in Fig. 7 can also include：
Code stream traffic sign placement module 801, the value of the flag bit for setting extending video parameter set 2, coded by instruction Code stream be MV-HEVC code streams or 3D-HEVC code streams.
In summary, in the embodiment of the present invention, if receiving MV-HEVC code streams, close all 3D-HEVC include but Instrument not to be covered in MV-HEVC, carry out MV-HEVC code stream decodings；If receiving 3D-HEVC code streams, 3D-HEVC codes are carried out Stream decoding；So that 3 D video decoder can decode MV-HEVC code streams, 3D-HEVC compatibilities MV-HEVC is realized.
In the embodiment of the present invention, 3D-HEVC code streams are encoded, are included for all 3D-HEVC but not to be covered in MV-HEVC Instrument sets switching flag bits, and value is set to indicate that and opens or closes corresponding instrument, so as to be provided more for 3D-HEVC Flexibility, flexibly opening or closing all 3D-HEVC includes but instrument not to be covered in MV-HEVC.
It should be understood by those skilled in the art that, embodiments of the invention can be provided as method, system or computer program Product.Therefore, the present invention can use the reality in terms of complete hardware embodiment, complete software embodiment or combination software and hardware Apply the form of example.Moreover, the present invention can use the computer for wherein including computer usable program code in one or more The computer program production that usable storage medium is implemented on (including but is not limited to magnetic disk storage, CD-ROM, optical memory etc.) The form of product.
The present invention is the flow with reference to method according to embodiments of the present invention, equipment (system) and computer program product Figure and/or block diagram describe.It should be understood that can be by every first-class in computer program instructions implementation process figure and/or block diagram Journey and/or the flow in square frame and flow chart and/or block diagram and/or the combination of square frame.These computer programs can be provided The processors of all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing devices is instructed to produce A raw machine so that produced by the instruction of computer or the computing device of other programmable data processing devices for real The device for the function of being specified in present one flow of flow chart or one square frame of multiple flows and/or block diagram or multiple square frames.
These computer program instructions, which may be alternatively stored in, can guide computer or other programmable data processing devices with spy Determine in the computer-readable memory that mode works so that the instruction being stored in the computer-readable memory, which produces, to be included referring to Make the manufacture of device, the command device realize in one flow of flow chart or multiple flows and/or one square frame of block diagram or The function of being specified in multiple square frames.
These computer program instructions can be also loaded into computer or other programmable data processing devices so that counted Series of operation steps is performed on calculation machine or other programmable devices to produce computer implemented processing, so as in computer or The instruction performed on other programmable devices is provided for realizing in one flow of flow chart or multiple flows and/or block diagram one The step of function of being specified in individual square frame or multiple square frames.
Particular embodiments described above, the purpose of the present invention, technical scheme and beneficial effect are carried out further in detail Describe in detail it is bright, should be understood that the foregoing is only the present invention specific embodiment, the guarantor being not intended to limit the present invention Scope is protected, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc., should be included in this Within the protection domain of invention.

Claims (20)

  1. A kind of 1. video encoding/decoding method, it is characterised in that including：
    If receiving the multi-view video coding standard MV-HEVC code streams based on efficient video coding, close all based on height The 3 D video compression standard 3D-HEVC of effect Video coding includes but instrument not to be covered in MV-HEVC, carries out MV-HEVC Code stream decoding；
    If receiving 3D-HEVC code streams, 3D-HEVC code stream decodings are carried out.
  2. 2. the method as described in claim 1, it is characterised in that also include：
    The flag bit of extending video parameter set 2 is obtained after reception code stream；
    According to the flag bit of extending video parameter set 2, it is determined that the code stream received is MV-HEVC code streams or 3D-HEVC code streams.
  3. 3. the method as described in claim 1, it is characterised in that also include：
    If receiving MV-HEVC code streams, include for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that closing.
  4. 4. method as claimed in claim 3, it is characterised in that described to include but do not wrapped in MV-HEVC for all 3D-HEVC The instrument included sets switching flag bits, and value is set to indicate that closing, including：
    In extending video parameter set 2, include for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that closing, does not decode extending video parameter set 2 now.
  5. 5. the method as described in claim 1, it is characterised in that also include：
    If receiving 3D-HEVC code streams, according to including for all 3D-HEVC but instrument not to be covered is set in MV-HEVC The value of switching flag bits, open or close corresponding instrument.
  6. 6. method as claimed in claim 5, it is characterised in that the basis is that all 3D-HEVC are included but in MV-HEVC The value for the switching flag bits that instrument not to be covered is set, opens or closes corresponding instrument, including：
    Decoding expansion video parameter collection 2, according to be in extending video parameter set 2 all 3D-HEVC include but in MV-HEVC not Including instrument set switching flag bits value, open or close corresponding instrument.
  7. 7. method as claimed in claim 5, it is characterised in that described to include but do not wrapped in MV-HEVC for all 3D-HEVC The value for the switching flag bits that the instrument included is set, is configured according to the decoding capability of decoding end.
  8. A kind of 8. method for video coding, it is characterised in that including：
    3D-HEVC code streams are encoded, includes for all 3D-HEVC but instrument not to be covered sets switching flag bits in MV-HEVC, And value is set to indicate that and opens or closes corresponding instrument.
  9. 9. method as claimed in claim 8, it is characterised in that described to include but do not wrapped in MV-HEVC for all 3D-HEVC The instrument included sets switching flag bits, and value is set to indicate that the corresponding instrument that opens or closes, including：
    According to the decoding capability of decoding end, include for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC The value of will position.
  10. 10. method as claimed in claim 8, it is characterised in that also include：
    The value of the flag bit of extending video parameter set 2 is set, indicates that coded code stream is MV-HEVC code streams or 3D- HEVC code streams.
  11. A kind of 11. 3 D video decoder, it is characterised in that including：
    Determining module, the code stream for determining to receive is MV-HEVC code streams or 3D-HEVC code streams；
    Various visual angles decoder module, for after the determining module determines to receive MV-HEVC code streams, closing all 3D-HEVC Include but instrument not to be covered in MV-HEVC, carry out MV-HEVC code stream decodings；
    Three-dimensional decoder module, for after the determining module determines to receive 3D-HEVC code streams, carrying out 3D-HEVC code stream solutions Code.
  12. 12. 3 D video decoder as claimed in claim 11, it is characterised in that the determining module includes：
    Obtaining unit, the flag bit of extending video parameter set 2 is obtained after code stream for receiving；
    Determining unit, for the flag bit according to extending video parameter set 2, it is determined that the code stream received be MV-HEVC code streams also It is 3D-HEVC code streams.
  13. 13. 3 D video decoder as claimed in claim 11, it is characterised in that also include：
    Switching flag bits setup module, for the determining module determine receive MV-HEVC code streams after, for all 3D- HEVC includes but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that closing.
  14. 14. 3 D video decoder as claimed in claim 13, it is characterised in that the switching flag bits setup module is specific For in extending video parameter set 2, including for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC Will position, and value is set to indicate that closing；Now the various visual angles decoder module is further used for not decoding extending video parameter Collection 2.
  15. 15. 3 D video decoder as claimed in claim 11, it is characterised in that also include：
    Tool switch module, for after the determining module determines to receive 3D-HEVC code streams, according to for all 3D-HEVC Include but in MV-HEVC the switching flag bits that instrument not to be covered is set value, open or close corresponding instrument.
  16. 16. 3 D video decoder as claimed in claim 15, it is characterised in that the three-dimensional decoder module is further used for Decoding expansion video parameter collection 2；The tool switch module is specifically used for according to being all 3D- in extending video parameter set 2 HEVC include but in MV-HEVC the switching flag bits that instrument not to be covered is set value, open or close corresponding instrument.
  17. 17. 3 D video decoder as claimed in claim 15, it is characterised in that it is described include for all 3D-HEVC but The value for the switching flag bits that instrument not to be covered is set, is configured according to decoding capability in MV-HEVC.
  18. A kind of 18. 3 d video encoding device, it is characterised in that including：
    Coding module, for encoding 3D-HEVC code streams；
    Switching flag bits setup module, for the coding module encode 3D-HEVC code streams when, to be wrapped in all 3D-HEVC Include but instrument not to be covered sets switching flag bits in MV-HEVC, and value is set to indicate that and opens or closes corresponding instrument.
  19. 19. 3 d video encoding device as claimed in claim 18, it is characterised in that the switching flag bits setup module is specific For the decoding capability according to decoding end, include for all 3D-HEVC but instrument not to be covered sets switch mark in MV-HEVC The value of will position.
  20. 20. 3 d video encoding device as claimed in claim 18, it is characterised in that also include：
    Code stream traffic sign placement module, the value of the flag bit for setting extending video parameter set 2, indicate that coded code stream is MV-HEVC code streams or 3D-HEVC code streams.
CN201310303248.0A 2013-07-18 2013-07-18 Video coding-decoding method and 3 D video codec Expired - Fee Related CN104301738B (en)

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WO2018104225A1 (en) 2016-12-05 2018-06-14 Covestro Deutschland Ag Method and system for producing an article by layer-by-layer buildup in a stamping process
KR20210134771A (en) * 2019-03-08 2021-11-10 지티이 코포레이션 Signaling parameter sets in digital video

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JCT3V-D1004-v4：MV-HEVC Draft Text 4;Gerhard Tech等;《Joint Collaborative Team on 3D Video Coding Extension Development》;20130426;全文 *
JCT3V-D1005-spec-v4：3D-HEVC Test Model 4;Gerhard Tech等;《Joint Collaborative Team on 3D Video Coding Extension Development》;20130426;全文 *
JCTVC-J0124：AHG10: Video parameter setfor HEVC extensions;Ying Chen 等;《Joint Collaborative Team on Video Coding (JCT-VC)》;20120720;全文 *

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