CN104298309A - Storage device of SATA Express interface and mainboard for insertion of storage device - Google Patents
Storage device of SATA Express interface and mainboard for insertion of storage device Download PDFInfo
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- CN104298309A CN104298309A CN201410386128.6A CN201410386128A CN104298309A CN 104298309 A CN104298309 A CN 104298309A CN 201410386128 A CN201410386128 A CN 201410386128A CN 104298309 A CN104298309 A CN 104298309A
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- data
- transfer protocol
- port
- pin position
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
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- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
Abstract
The invention relates to a storage device of an SATA Express interface. The storage device comprises an interface connector, a first control unit and a second control unit. The interface connector comprises a first data connection end, a second data connection end and a control end, wherein two connector detection pins are defined in the pins of the control end, the first data connection end is defined by the first control unit to transfer the data of a first storage according to a first transfer protocol or a second transfer protocol, the second data connection end is defined by the second control unit to transfer the data of a second storage according to the first transfer protocol or the second transfer protocol, and by detecting the two connector detection pins, whether the data transferred by the first data connection end or the second data connection end accord with the first transfer protocol or the second transfer protocol or not can be judged.
Description
[technical field]
The present invention has about a kind of storing apparatus and the motherboard that plugs thereof, espespecially the one storing apparatus that accords with SATA Express interface specification and the motherboard that plugs thereof.
[background technology]
The performance of solid state hard disc improves constantly, so that the frequency range transmission speed of SATA does not apply use at present, the frequency range transmission speed as SATA3 is 6Gb/s.At this, in order to improve the frequency range transmission speed of SATA further, system of SATA-IO association is based on PCI-Express interface, and make brand-new SATA Express interface specification, its frequency range transmission speed can reach 8Gb/s or 16Gb/s.
SATA Express interface specification system allows that its interface can option and installment one or two memory, and its memory can be solid state hard disc or flash memory module.Definition of pin position about SATA Express interface is as described in Table 1:
Table 1
| Pin position | Pin position describes | Pin position | Pin position describes |
| S1 | GND | S10 | A1－ |
| S2 | A0+ | S11 | GND |
| S3 | A0－ | S12 | B1+ |
| S4 | GND | S13 | B1－ |
| S5 | B0+ | S14 | GND |
| S6 | B0－ | P1 | Reserved |
| S7 | GND | P2 | PERST# |
| S8 | GND | P3 | CLKREQ#/DEVSLP |
| S9 | A1+ | P4 | DET |
S1 ~ S7 pin position is configured to use to first memory, and wherein the pin position of data is transmitted in S2, S3, S5, S6 pin position as first memory.S8 ~ S14 pin position is configured to use to second memory, and wherein the pin position of data is transmitted in S9, S10, S12, S13 pin position as second memory.In addition, P1 ~ P4 pin position belongs to control pin position.
Continue, among P1 ~ P4 pin position, P4 pin position is defined as judging that the detection pin position of which kind of transfer protocol data is transmitted in S2, S3, S5, S6 data pin position and S9, S10, S12, S13 data pin position.Such as: when the signal state of P4 pin position is 0 (or electronegative potential), can judge that two memories transmit the data of PCIe transfer protocol via S2, S3, S5, S6 data pin position and S9, S10, S12, S13 data pin position; Or, when the signal state of P4 pin position is 1 (or noble potential), can judge that two memories transmit the data of SATA transfer protocol via S2, S3, S5, S6 data pin position and S9, S10, S12, S13 data pin position.At this, via judging that the signal state of P4 pin position is to learn the data transmission agreement of two memory institute specifications.
Moreover, the storing apparatus of SATA Express interface configured two memories in the past, detect pin position (as P4 pin position) owing to only using single and judge that its data transmission is reached an agreement on, therefore, the data transmission agreement of two memories must be restricted to identical, such as: the agreement of the data transmission of two memories is all SATA data by specification or is all PCIe data by specification.If the storing apparatus of SATA Express interface transmit the data of two kinds of transfer protocol types and practical application when a traditional motherboard, the situation that the data and then cause that traditional motherboard will be caused correctly cannot to determine two kinds of transfer protocol types decommissions.
[summary of the invention]
The present invention proposes a kind of storing apparatus of SATA Express interface, and its storing apparatus has two memories, and SATA Express interface can select the data adopting identical or different transfer protocol to access two memories.
The storing apparatus that the present invention proposes a kind of SATA Express interface and the motherboard plugged thereof, two detection pin positions are defined respectively in the SATA Express interface connector of storing apparatus and the SATA Express interface Connection Block of motherboard, when two of interface connector detect two of pin positions and interface Connection Block detect pin position in electrical contact time will produce two detection signals, the microprocessor of motherboard detects signal to judge that the data accessed from two memories of storing apparatus is as two kinds of transfer protocol types or a kind of transfer protocol type via inspection two.
For reaching above-mentioned purpose, the invention provides a kind of storing apparatus of SATA Express interface, comprise: an interface connector, it is the connector of a SATA Express interface specification, comprise one first data link, one second data link and a control end, in the pin position of control end, definition has two connectors to detect pin position; One first control module, is electrically connected the first data link and one first memory, defines the first data link transmits the first memory data with one first transfer protocol or one second transfer protocol; And one second control module, be electrically connected the second data link and one second memory, define the second data link transmits the second memory data with the first transfer protocol or the second transfer protocol, wherein detect pin position with the data judging the first data link or the second data link and transmit as the data according with the first transfer protocol or the second transfer protocol by detection two connector.
In one embodiment of the invention, the first data link and the second data link transmit the data of identical traffic agreement or different transfer protocol.
In one embodiment of the invention, interface connector is made into a golden finger interface connector or a stitch interface connector.
The motherboard that the present invention provides again one can plug for storing apparatus, comprising: a microprocessor, and an interface Connection Block, be electrically connected microprocessor, it is the Connection Block of a SATA Express interface specification, comprise one first data Port, one second data Port and one controls port, in the pin position controlling port, definition has two Connection Blocks to detect pin position, wherein when the first data link of interface connector, second data link and control end are plugged on the first data Port of interface Connection Block respectively, when the second data Port and control port, two connectors detect pin position and will detect pin position and produced two detection signals by two Connection Blocks in electrical contact, microprocessor detects signal with the data judging the first data Port or the second data Port and transmit as the data according with the first transfer protocol or the second transfer protocol via inspection two.
In one embodiment of the invention, the first data Port and the second data Port transmit the data of identical traffic agreement or different transfer protocol.
In one embodiment of the invention, the first transfer protocol is SATA transfer protocol, and the second transfer protocol is PCIe transfer protocol.
In one embodiment of the invention, interface Connection Block is made into a golden finger interface Connection Block or a stitch interface Connection Block.
[accompanying drawing explanation]
The three-dimensional structure diagram of motherboard that Fig. 1 is storing apparatus of the present invention and plugs.
The circuit structure diagram of motherboard that Fig. 2 is storing apparatus of the present invention and plugs.
Fig. 3 is the pin bit architecture signal of interface connector of the present invention and interface Connection Block
Figure.
Primary clustering symbol description:
10 storing apparatus 11 interface connectors
111 first data link 113 second data links
115 control end 1151 connectors detect pin position
1153 connectors detect pin position 131 first control module
133 second control module 15 first memories
17 second memory 20 motherboards
21 interface Connection Block 211 first data Ports
213 second data Ports 215 control port
2151 Connection Blocks detect pin position 2153 Connection Block and detect pin position
23 microprocessors
[embodiment]
Refer to Fig. 1 and Fig. 2 and be respectively storing apparatus of the present invention and the three-dimensional structure diagram of motherboard plugged thereof and circuit structure diagram.As shown in the figure, storing apparatus 10 comprises interface connector 11,1 first control module 131,1 second control module 133,1 first memory 15 and one second memory 17.First control module 131 and the second control module 133 can be indivedual independently chip module or integrated chip modules.First memory 15 and the second memory 17 can be solid state hard disc or flash memory module.Interface connector 11 is a golden finger or a stitch interface connector, and it comprises one first data link 111,1 second data link 113 and a control end 115.First control module 131 is electrically connected the first memory 15 and the first data link 111, and the second control module 133 is electrically connected the second memory 17 and the second data link 113.First control module 131 defines the first data link 111 transmits the first memory 15 data with one first transfer protocol or one second transfer protocol, and the second control module 133 defines the second data link 113 transmits the second memory 17 data with the first transfer protocol or the second transfer protocol.In an embodiment of the present invention, the first transfer protocol is the agreement of SATA data transmission, and the second transfer protocol is the agreement of PCIe data transmission.
Motherboard 20 is the motherboard of a computer system, and comprise interface Connection Block 21 and a microprocessor 23, microprocessor 23 is electrically connected interface Connection Block 21.Interface Connection Block 21 is a golden finger or a stitch interface Connection Block, and it comprises one first data Port 211,1 second data Port 213 and and controls port 215.Storing apparatus 10 and motherboard 20 can by the grafting of interface connector 11 and interface Connection Block 21 and the data transmission carried out between the two.Moreover, in one embodiment of the invention, storing apparatus 10 can directly utilize interface connector 11 to be plugged on the interface Connection Block 21 of motherboard 20, or, in another embodiment of the present invention, storing apparatus 10 has by one the interface connector 11 connecting winding displacement and is plugged on the interface Connection Block 21 of motherboard 20.
Consulting Fig. 3 further, is the pin bit architecture figure of interface connector of the present invention and interface Connection Block.Interface connector 11 and interface Connection Block 21 are the connector of SATA Express interface standard specification that accords with SATA-IO association and define and Connection Block, and its pin number amount is all 14.Definition of pin position about interface connector 11 and interface Connection Block 21 is as described in Table 2:
Table 2
| Pin position | Pin position describes | Pin position | Pin position describes |
| S1 | GND | S10 | A1－ |
| S2 | A0+ | S11 | GND |
| S3 | A0－ | S12 | B1+ |
| S4 | GND | S13 | B1－ |
| S5 | B0+ | S14 | GND |
| S6 | B0－ | P1 | DET2 |
| S7 | GND | P2 | PERST# |
| S8 | GND | P3 | CLKREQ#/DEVSLP |
| S9 | A1+ | P4 | DET1 |
S1 ~ S7 pin position is the pin position of the first data link 111 and the first data Port 211, and be configured to use to first memory 15, wherein S2, S3, S5, S6 pin position is defined the pin position as transmission first memory 15 data.S8 ~ S14 pin position is the pin position of the second data link 113 and the second data Port 213, and be configured to use to second memory 17, wherein S9, S10, S12, S13 pin position is defined the pin position as transmission second memory 17 data.P1 ~ P4 pin position is control end 115 and the pin position controlling port 215.
In the present invention, except being except a detection pin position 1151,2151 by the P4 definition of pin position at control end 115 and control port 215, be that another detects pin position 1153,2153 further by the P1 definition of pin position of original idle.When storing apparatus 10 passes through interface Connection Block 21 grafting of interface connector 11 and motherboard 20, first data link 111, second data link 113 and control end 15 will be combined in the first corresponding data Port 211, second data Port 213 respectively and control on port 215, make two of connector 11 detect pin positions 1151,1153 can two the detecting pin positions 2151,2153 and produce and have two detection signal DET1, DET2 of Connection Block 21 in electrical contact.This two detections signal DET1, DET2 will be pursuant to the first data link 111/ Port 211 and transmit the data of which kind of transfer protocol to reflect relative electrical signals with the second data link 113/ Port 213, as current potential signal.Afterwards, microprocessor 23 detects data transmission agreement of its indivedual definition of two memories 15,17 that signal DET1, DET2 can judge to configure in storing apparatus 10 via inspection two.
For table 3, when to receive two detection signals be DET1=0, DET2=0 to microprocessor 23, the data that the first data link 111/ Port 211 and the second data link 113/ Port 213 all transmit SATA transfer protocol will be determined.When to receive two detection signals be DET1=0, DET2=1 to microprocessor 23, will determine the data that the first data link 111/ Port 211 transmits SATA transfer protocol, and the second data link 113/ Port 213 transmits the data of PCIe transfer protocol.When to receive two detection signals be DET1=1, DET2=0 to microprocessor 23, will determine the data that the first data link 111/ Port 211 transmits PCIe transfer protocol, and the second data link 113/ Port 213 transmits the data of SATA transfer protocol.When to receive two detection signals be DET1=1, DET2=1 to microprocessor 23, the data that the first data link 111/ Port 211 and the second data link 113/ Port 213 all transmit PCIe transfer protocol will be determined.
Table 3
So, in the present invention, no matter the first data link 111/ Port 211 and the second data link 113/ Port 213 transmit the data of identical or different transfer protocol, the microprocessor 23 of motherboard 20 can detect signal DET1, DET2 by inspection two and correctly judge out.So implement according to this, SATA Express interface can select the data adopting identical or different transfer protocol to access two memories 15,17.
Two data link/Ports of SATA Express interface can only transmit the data (such as two data link/Ports all transmit the data of SATA transfer protocol or all transmit the data of PCIe transfer protocol) of identical traffic agreement in the past, so, two data links 111 of SATA Express interface of the present invention, 113/ Port 211, 213 can select to transmit the data of different transfer protocol (such as: the first data link 111/ Port 211 transmits the data of SATA transfer protocol, and the second data link 113/ Port 213 transmits the data of PCIe transfer protocol).
Moreover, in further embodiment of this invention, SATA Express interface of the present invention can select wherein that a data link/Port (such as: the first data link 111/ Port 211) is as the data interface of a memory, and another data link/Port (such as: the second data link 113/ Port 213) selects the application interface as application module (such as: display module, WIFI wireless telecommunications module).So implement according to this, SATA Express interface of the present invention can be made not only to have outside data store function, also can include other specific application functions.
As described above, be only one of the present invention preferred embodiment, not be used for limiting the scope of the invention process, namely all according to the shape described in the present patent application the scope of the claims, structure, characteristic and spirit institute for it impartial change with modify, all should be included in the claim of the present invention.
Claims (8)
1. a storing apparatus for SATA Express interface, its characteristic is, comprising:
One interface connector is the connector of a SATA Express interface specification, comprises one first data link, one second data link and a control end, and in the pin position of control end, definition has two connectors to detect pin position;
One first control module, is electrically connected the first data link and one first memory, defines the first data link transmits the first memory data with one first transfer protocol or one second transfer protocol; And
One second control module, be electrically connected the second data link and one second memory, define the second data link transmits the second memory data with the first transfer protocol or the second transfer protocol, wherein detect pin position with the data judging the first data link or the second data link and transmit as the data according with the first transfer protocol or the second transfer protocol by detection two connector.
2. storing apparatus according to claim 1, its characteristic is, this first data link and this second data link transmit the data of identical traffic agreement or different transfer protocol.
3. storing apparatus according to claim 1, its characteristic is, this first transfer protocol is SATA transfer protocol, and this second transfer protocol is PCIe transfer protocol.
4. storing apparatus according to claim 1, its characteristic is, this interface connector is made into a golden finger interface connector or a stitch interface connector.
5. the motherboard that storing apparatus as claimed in claim 1 plugged, its characteristic is, comprising: a microprocessor; And
One interface Connection Block, be electrically connected microprocessor, it is the Connection Block of a SATA Express interface specification, comprise one first data Port, one second data Port and one controls port, in the pin position controlling port, definition has two Connection Blocks to detect pin position, wherein when this first data link of this interface connector, this the second data link and this control end are plugged on the first data Port of interface Connection Block respectively, when the second data Port and control port, this two connector detects pin position and will detect pin position and produced two detection signals by two Connection Blocks in electrical contact, microprocessor detects signal with the data judging the first data Port or the second data Port and transmit as the data according with this first transfer protocol or this second transfer protocol via inspection two.
6. motherboard according to claim 5, its characteristic is, this first data Port and this second data Port transmit the data of identical traffic agreement or different transfer protocol.
7. motherboard according to claim 5, its characteristic is, this first transfer protocol is SATA transfer protocol, and this second transfer protocol is PCIe transfer protocol.
8. motherboard according to claim 5, its characteristic is, this interface Connection Block is made into a golden finger interface Connection Block or a stitch interface Connection Block.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410386128.6A CN104298309A (en) | 2014-08-07 | 2014-08-07 | Storage device of SATA Express interface and mainboard for insertion of storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410386128.6A CN104298309A (en) | 2014-08-07 | 2014-08-07 | Storage device of SATA Express interface and mainboard for insertion of storage device |
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| Publication Number | Publication Date |
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| CN104298309A true CN104298309A (en) | 2015-01-21 |
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| CN201410386128.6A Pending CN104298309A (en) | 2014-08-07 | 2014-08-07 | Storage device of SATA Express interface and mainboard for insertion of storage device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107450849A (en) * | 2017-05-11 | 2017-12-08 | 宜鼎国际股份有限公司 | Open-ended interface panel |
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| US20060017673A1 (en) * | 2004-07-21 | 2006-01-26 | Industrial Technology Research Institute | Flexible display device |
| TWI354410B (en) * | 2008-09-19 | 2011-12-11 | Innodisk Corp | |
| CN202383656U (en) * | 2011-12-13 | 2012-08-15 | 宜鼎国际股份有限公司 | Storage device and main unit connecting seat connected with same |
| CN102707771A (en) * | 2012-04-01 | 2012-10-03 | 宜鼎国际股份有限公司 | Embedded memory module and plugged mainboard thereof |
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2014
- 2014-08-07 CN CN201410386128.6A patent/CN104298309A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2619310Y (en) * | 2003-01-28 | 2004-06-02 | 劲永国际股份有限公司 | Solid disc module set with high speed data transmission |
| US20060017673A1 (en) * | 2004-07-21 | 2006-01-26 | Industrial Technology Research Institute | Flexible display device |
| TWI354410B (en) * | 2008-09-19 | 2011-12-11 | Innodisk Corp | |
| CN202383656U (en) * | 2011-12-13 | 2012-08-15 | 宜鼎国际股份有限公司 | Storage device and main unit connecting seat connected with same |
| CN102707771A (en) * | 2012-04-01 | 2012-10-03 | 宜鼎国际股份有限公司 | Embedded memory module and plugged mainboard thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107450849A (en) * | 2017-05-11 | 2017-12-08 | 宜鼎国际股份有限公司 | Open-ended interface panel |
| CN107450849B (en) * | 2017-05-11 | 2020-09-01 | 宜鼎国际股份有限公司 | Extensible interface board |
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Application publication date: 20150121 |
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