CN104297657B - Digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro - Google Patents

Digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro Download PDF

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CN104297657B
CN104297657B CN201410565844.0A CN201410565844A CN104297657B CN 104297657 B CN104297657 B CN 104297657B CN 201410565844 A CN201410565844 A CN 201410565844A CN 104297657 B CN104297657 B CN 104297657B
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CN104297657A (en
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韦文生
罗飞
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Nantong an art design Co., Ltd.
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Wenzhou University
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Abstract

The invention discloses a kind of digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro, comprise low noise power supply circuit DC voltage being provided and adding reverse bias voltage to measured diode, the forward adjustable current source circuit of multiple adjustable forward current is provided to measured diode, the edge adjustable pulse of multiple adjustable pulse modulation signal is provided to produce circuit to measured diode, obtain the reverse dynamic current of measured diode and the waveform of voltage and the reverse dynamic current of peak signal and voltage waveform test and peak-detector circuit, peak signal is processed into the dynamic current waveform sampling circuit of simulating signal, measure the C parameter detecting circuit of reverse crest voltage with the ratio of bias voltage and the CPU (central processing unit) of data processing.The embodiment of the present invention, by detecting the performance parameters such as the dynamic current of diode reverse, dynamic electric voltage and loss power, reaching and choosing and make good use of diode and strengthen the object of its reliability.

Description

Digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro
Technical field
The present invention relates to electronic technology field and microwave diode technical field, particularly relate to a kind of digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro.
Background technology
Diode is widely used in the equipment such as modern high power Radar-Communication, and its performance parameter (as reverse dynamic current, oppositely dynamic electric voltage and reverse anchor jam nut power etc.) is directly connected to the stability of the equipments such as modern high power Radar-Communication, reliability, life-span and efficiency.
Current, diode on-off action in circuit depends on the break-make characteristic aligning inverse current and show, and the moment break-make of its switch determines to only have small pressure drop during conducting, only have small electric current during shutoff by the alive polarity of two ends institute.PN junction due to diode stores many sons and few son, therefore when impressed voltage reversal of poles, the duty of diode can not complete change instantaneously, its change procedure is: diode current becomes reverse moment by forward larger inverse peak current, voltage, only have after certain hour, inverse current is just cut down and is diminished until be 0, and reverse voltage tends towards stability.In addition, the peak-inverse voltage of diode and disperse inductance, distributed capacitance, lead resistance, current slew rates are closely related, can suffer from the phenomenon that peak-inverse voltage is breakdown much larger than design load.Therefore, the performance parameter (as reverse dynamic current, oppositely dynamic electric voltage and reverse anchor jam nut power etc.) understanding diode to choose device and design circuit most important, need a kind of device measuring aforementioned properties parameter of design badly very necessary.
Summary of the invention
content
Embodiment of the present invention problem to be solved is to provide a kind of digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro, by detecting reverse dynamic current, the oppositely performance parameter such as dynamic electric voltage and reverse anchor jam nut power of diode, reach can twin zener dioder common mode interference, strengthen the object of its reliability and accuracy.
In order to solve the problems of the technologies described above, embodiments provide a kind of digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro, it matches with measured diode, comprises low noise power supply circuit, forward adjustable current source circuit, edge adjustable pulse generation circuit, oppositely dynamic current and voltage waveform test and peak-detector circuit, dynamic current waveform sampling circuit, C parameter detecting circuit and CPU (central processing unit); Wherein,
First output terminal of described low noise power supply circuit is connected with the input end of described forward adjustable current source circuit, the input end that second output terminal produces circuit with described edge adjustable pulse is connected, and is also the additional reverse bias voltage of described measured diode for providing DC voltage;
First output terminal of described forward adjustable current source circuit is connected with the positive pole of described measured diode, provides multiple adjustable forward current for giving described measured diode;
The first output terminal that described edge adjustable pulse produces circuit is connected with the positive pole of described measured diode, provides multiple adjustable pulse-modulated signal for giving described measured diode;
Described reverse dynamic current and voltage waveform test are connected with the negative pole of described measured diode with the input end of peak-detector circuit, first output terminal is connected with the input end of described dynamic current waveform sampling circuit, second output terminal is connected with the input end of described C parameter detecting circuit, for the waveform of the reverse dynamic current and reverse dynamic electric voltage that obtain described measured diode, obtain peak-inverse voltage and peak signal;
The output terminal of described dynamic current waveform sampling circuit is connected with described CPU (central processing unit), for the described peak signal obtained being processed into the simulating signal needed for described CPU (central processing unit);
The output terminal of described C parameter detecting circuit is connected with described CPU (central processing unit), for the peak-inverse voltage that obtains described in the measuring ratio with described reverse bias voltage;
Described CPU (central processing unit) comprises A/D change-over circuit and CPU, its second output terminal also producing circuit respectively with the second output terminal of described forward adjustable current source circuit and described edge adjustable pulse is connected, forward current and described edge adjustable pulse for controlling described forward adjustable current source circuit produce the generation of the pulse-modulated signal of circuit, and the related data that the described dynamic current waveform sampling circuit got and described C parameter detecting circuit export are processed.
Wherein, described low noise power supply circuit comprises Industrial Frequency Transformer, the first rectifier bridge, the first low-pass filter circuit, integrated switch power, buck output circuit, voltage divider, voltage stabilizing diode, the first triode, the second triode, the second rectifier bridge, the first linear voltage regulator, the second linear voltage regulator, the second low-pass filter circuit, the 3rd low-pass filter circuit, the 3rd rectifier bridge and the 4th low-pass filter circuit; Wherein,
Described Industrial Frequency Transformer comprises the first input coil of external AC potential source, and is positioned at the first secondary output winding, the second output winding and the 3rd output winding;
Described first output winding is connected with described first rectifier bridge, described first low-pass filter circuit, described integrated switch power, described buck output circuit and described voltage divider successively, form the first DC voltage output circuit, described first DC voltage output circuit is used for providing 12V DC voltage; Wherein, described buck output circuit comprises energy storage inductor, filter capacitor and fly-wheel diode;
After described first output winding is also connected with described first rectifier bridge and described first low-pass filter circuit successively, voltage stabilizing diode described in reversal connection, be connected with the Darlington transistor be made up of described first triode and the second triode again, form the second DC voltage output circuit, described second DC voltage output circuit is used for providing reverse voltage to described measured diode;
Described second output winding is connected with described second rectifier bridge, described first linear voltage regulator and the second low-pass filter circuit successively, and form the 3rd DC voltage output circuit, described 3rd DC voltage output circuit is used for providing 5V DC voltage;
Described second output winding is also connected with described second rectifier bridge, described second linear voltage regulator and the 3rd low-pass filter circuit successively, and form the 4th DC voltage output circuit, described 4th DC voltage output circuit is used for providing-5V DC voltage;
Described 3rd output winding is connected with described 3rd rectifier bridge and described 4th low-pass filter circuit successively, and form the 5th DC voltage output circuit, described 5th DC voltage output circuit is used for providing 10V DC voltage.
Wherein, described forward adjustable current source circuit comprises the first single-chip microcomputer, the first trigger, the first metal-oxide-semiconductor field effect transistor, the 3rd triode and multiple adjustable forward current branch road be in parallel; Wherein,
The output terminal of described first single-chip microcomputer is connected with the input end of the first trigger;
The output terminal of described first trigger is connected with the grid of described first metal-oxide-semiconductor field effect transistor;
The grounded drain of described first metal-oxide-semiconductor field effect transistor, source electrode is connected with the base stage of described 3rd triode, and also one end of all adjustable with each forward current branch road is connected;
The other end of each is adjustable forward current branch road is all connected with the emitter of described 3rd triode; Wherein, each adjustable forward current branch road described includes the relay and resistance that are in series;
The collector of described 3rd triode is connected with the positive pole of described measured diode.
Wherein, described edge adjustable pulse generation circuit comprises second singlechip, the second trigger, high-speed driver, the second metal-oxide-semiconductor field effect transistor and multiple adjustable pulse signal branch be in parallel; Wherein,
The output terminal of described second singlechip is connected with the input end of the second trigger;
The output terminal of described second trigger is connected with the input end of described high-speed driver;
The output terminal of described high-speed driver is connected with the grid of described second metal-oxide-semiconductor field effect transistor;
The grounded drain of described second metal-oxide-semiconductor field effect transistor, source electrode is connected with the positive pole of described measured diode, is also all connected with one end of each adjustable pulse signal branch; Wherein, each adjustable pulse signal branch described includes the relay and inductance that are in series.
Wherein, described reverse dynamic current and voltage waveform test comprise bandwidth-limited circuit, the first detector diode, the first operational amplifier, the first negative feedback voltage circuit, the second operational amplifier, the second negative feedback voltage circuit, the 3rd operational amplifier and the 3rd metal-oxide-semiconductor field effect transistor with peak-detector circuit; Wherein,
One end of described bandwidth-limited circuit is connected with the negative pole of described measured diode, and the other end is connected with the negative pole of described first detector diode;
The positive pole of described first detector diode is connected with the in-phase input end of described first operational amplifier;
The inverting input of described first operational amplifier is connected with one end of the first reference voltage source and described first negative feedback voltage circuit, and one end of the other end of output terminal and described first negative feedback voltage circuit, the input end of described dynamic current waveform sampling circuit, the inverting input of described second operational amplifier and described second negative feedback voltage circuit is connected;
The in-phase input end ground connection of described second operational amplifier, output terminal is connected with the described other end of the second negative feedback voltage circuit and the A/D change-over circuit of described CPU (central processing unit);
The in-phase input end of described 3rd operational amplifier is connected with the negative pole of described measured diode, and reverse input end is connected with the second reference voltage source, and output terminal is connected with the grid of described 3rd metal-oxide-semiconductor field effect transistor;
The source electrode of described 3rd metal-oxide-semiconductor field effect transistor is connected with the input end of described dynamic current waveform sampling circuit, drains to be connected with described first reference voltage source.
Wherein, described dynamic current waveform sampling circuit comprises the first differential amplifier circuit, the second differential amplifier circuit, first pair of negative edge JK flip-flop and second pair of negative edge JK flip-flop; Wherein,
Two ends after described first differential amplifier circuit is in parallel with described second differential amplifier circuit are tested with described reverse dynamic current and voltage waveform respectively and are connected with one end of the first output terminal of peak-detector circuit and described first pair of negative edge JK flip-flop;
The other end of described first pair of negative edge JK flip-flop is connected with one end of described second pair of negative edge JK flip-flop;
The other end of described second pair of negative edge JK flip-flop is connected with the A/D change-over circuit of described CPU (central processing unit).
Wherein, described C parameter detecting circuit comprises the second detector diode, the 5th low-pass filter circuit, four-operational amplifier and the 3rd negative feedback voltage circuit; Wherein,
The negative pole of described second detector diode is tested with described reverse dynamic current and voltage waveform and is connected with the second output terminal of peak-detector circuit, and positive pole is connected with one end of described 5th low-pass filter circuit;
The described other end of the 5th low-pass filter circuit is connected with one end of the inverting input of described four-operational amplifier and described 3rd negative feedback voltage circuit;
The in-phase input end ground connection of described four-operational amplifier, output terminal is connected with the described other end of the 3rd negative feedback voltage circuit and the A/D change-over circuit of described CPU (central processing unit).
Wherein, described system also comprises reverse anchor jam nut power test circuit, input end and the described reverse dynamic current and voltage waveform of described reverse anchor jam nut power test circuit are tested and are connected with the 3rd output terminal of peak-detector circuit, output terminal is connected with the A/D change-over circuit of described CPU (central processing unit), for measuring the reverse anchor jam nut power of described measured diode.
Wherein, described reverse anchor jam nut power test circuit comprises coupling transformer and the integrated circuit for detection signal effective value power; Wherein, described coupling transformer comprises the second input coil be connected with the input end of described reverse anchor jam nut power test circuit, and is positioned at secondary the 4th output winding be connected with described integrated circuit.
Wherein, described reverse anchor jam nut power test circuit also comprises at least one overload protection arrangement protecting described integrated circuit for clamper, and described overload protection arrangement comprises two diodes forming connected loop, and its two ends are all connected with described integrated circuit.
Implement the embodiment of the present invention, there is following beneficial effect:
In embodiments of the present invention, due to be provided with reverse dynamic current and voltage waveform test with peak-detector circuit, dynamic current waveform sampling circuit, C parameter detecting circuit, thus reverse dynamic current, the oppositely performance parameter such as dynamic electric voltage and reverse anchor jam nut power of diode detected, reach can twin zener dioder common mode interference, strengthen the object of its reliability and accuracy.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, the accompanying drawing obtaining other according to these accompanying drawings still belongs to category of the present invention.
The Circuits System block diagram of the digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform that Fig. 1 provides for the embodiment of the present invention and loss power test;
Fig. 2 is the system architecture diagram of low noise power supply circuit in Fig. 1;
Fig. 2 a is the circuit diagram of low noise power supply circuit application scene in Fig. 2;
Fig. 3 is the system architecture diagram of forward adjustable current source circuit in Fig. 1;
Fig. 3 a is the circuit diagram of forward adjustable current source circuit application scene in Fig. 3;
Fig. 4 is the system architecture diagram that in Fig. 1, edge adjustable pulse produces circuit;
Fig. 4 a is the circuit diagram that in Fig. 4, edge adjustable pulse produces circuit application scene;
Fig. 5 is the system architecture diagram of reverse dynamic current and voltage waveform test and peak-detector circuit in Fig. 1;
Fig. 5 a is the circuit diagram of reverse dynamic current and voltage waveform test and peak-detector circuit application scenarios in Fig. 5;
Fig. 5 b be the reverse dynamic current waveform that records from measured diode (DUT) negative pole in Fig. 5 a 1. and the reverse dynamic voltage waveforms structural representation 2. recorded from DUT positive pole;
Fig. 6 is the system architecture diagram of dynamic current waveform sampling circuit in Fig. 1;
Fig. 6 a is the dynamic current waveform sampling circuit of Fig. 6 application scenarios;
Fig. 6 b be the reverse dynamic current waveform that records from measured diode (DUT) negative pole in Fig. 5 a 1. and Fig. 6 a TR15 collector waveform 2., TR11 collector waveform 3., the waveform structural representation 4. of IC15A (74F112) 6 pin;
Fig. 7 is the system architecture diagram of C parameter detecting circuit in Fig. 1;
Fig. 7 a is the circuit diagram of C parameter detecting circuit in Fig. 7, A/D change-over circuit and LCD display circuit application scenarios;
Fig. 8 is the system architecture diagram of reverse anchor jam nut power test circuit in Fig. 1;
Fig. 8 a is the circuit diagram of reverse anchor jam nut power test circuit application scenarios in Fig. 8.
Embodiment
In order to make object, technical scheme and the advantage of the present invention's " digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro " clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
As shown in Figure 1, in the embodiment of the present invention, a kind of digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro are proposed, it matches with measured diode 8, comprises low noise power supply circuit 1, forward adjustable current source circuit 2, edge adjustable pulse generation circuit 3, oppositely dynamic current and voltage waveform test and peak-detector circuit 4, dynamic current waveform sampling circuit 5, C parameter detecting circuit 6 and CPU (central processing unit) 7; Wherein,
First output terminal a1 of described low noise power supply circuit 1 is connected with the input end b1 of described forward adjustable current source circuit 2, the input end c1 that second output terminal a2 produces circuit with described edge adjustable pulse is connected, and is also the additional reverse bias voltage of described measured diode 8 for providing DC voltage;
First output terminal b2 of described forward adjustable current source circuit 2 is connected with the positive pole of described measured diode 8, provides multiple adjustable forward current for giving described measured diode 8;
The first output terminal c2 that described edge adjustable pulse produces circuit 3 is connected with the positive pole of described measured diode 8, provides multiple adjustable pulse-modulated signal for giving described measured diode 8;
Described reverse dynamic current and voltage waveform test are connected with the negative pole of described measured diode 8 with the input end d1 of peak-detector circuit 4, first output terminal d2 is connected with the input end of described dynamic current waveform sampling circuit 5, second output terminal d3 is connected with the input end of described C parameter detecting circuit, for the waveform of the reverse dynamic current and reverse dynamic electric voltage that obtain described measured diode 8, obtain peak-inverse voltage and peak signal;
The output terminal of described dynamic current waveform sampling circuit 5 is connected with described CPU (central processing unit) 7, for the described peak signal obtained being processed into the simulating signal needed for described CPU (central processing unit) 7;
The output terminal of described C parameter detecting circuit 6 is connected with described CPU (central processing unit) 7, for the peak-inverse voltage that obtains described in the measuring ratio with described reverse bias voltage;
Described CPU (central processing unit) 7 comprises A/D change-over circuit 71 and CPU72, its second output terminal c3 also producing circuit 3 respectively with the second output terminal b3 of described forward adjustable current source circuit 2 and described edge adjustable pulse is connected, forward current and described edge adjustable pulse for controlling described forward adjustable current source circuit 2 produce the generation of the pulse-modulated signal of circuit 3, and the related data that the described dynamic current waveform sampling circuit 5 got and described C parameter detecting circuit 6 export are processed.
Because for detecting the system of diode behavior parameter for dynamic characteristic test in the embodiment of the present invention, the noise of power supply used is low, in order to avoid interference measurement results, need every road power supply after rectifier bridge, all use electric capacity, inductor filter carrys out stress release treatment, therefore, as shown in Figure 2, low noise power supply circuit 1 comprises Industrial Frequency Transformer 110, first rectifier bridge 111, first low-pass filter circuit 112, integrated switch power 113, buck output circuit 114, voltage divider 115, voltage stabilizing diode 116, first triode 117, second triode 118, second rectifier bridge 119, first linear voltage regulator 120, second linear voltage regulator 121, second low-pass filter circuit 122, 3rd low-pass filter circuit 123, 3rd rectifier bridge 124 and the 4th low-pass filter circuit 125, wherein,
Industrial Frequency Transformer 110 comprises the first input coil 1100 of external AC potential source, and is positioned at the first secondary output winding 1101, second output winding 1102 and the 3rd output winding 1103;
First output winding 1101 is connected with the first rectifier bridge 111, first low-pass filter circuit 112, integrated switch power 113, buck output circuit 114 and voltage divider 115 successively, form the first DC voltage output circuit, the first DC voltage output circuit is used for providing 12V DC voltage; Wherein, buck output circuit 114 comprises energy storage inductor 1141, filter capacitor 1142 and fly-wheel diode 1143;
After first output winding 1102 is also connected with the first rectifier bridge 111 and the first low-pass filter circuit 112 successively, reversal connection voltage stabilizing diode 116, be connected with the Darlington transistor be made up of the first triode 117 and the second triode 118 again, form the second DC voltage output circuit, the second DC voltage output circuit is used for providing reverse voltage to measured diode 8;
Second output winding 1102 is connected with the second rectifier bridge 119, first linear voltage regulator 120 and the second low-pass filter circuit 122 successively, and form the 3rd DC voltage output circuit, the 3rd DC voltage output circuit is used for providing 5V DC voltage;
Second output winding 1102 is also connected with the second rectifier bridge 119, second linear voltage regulator 121 and the 3rd low-pass filter circuit 122 successively, and form the 4th DC voltage output circuit, the 4th DC voltage output circuit is used for providing-5V DC voltage;
3rd output winding 1103 is connected with the 3rd rectifier bridge 124 and the 4th low-pass filter circuit 125 successively, and form the 5th DC voltage output circuit, the 5th DC voltage output circuit is used for providing 10V DC voltage.
As shown in Figure 2 a, the embody rule of low noise power supply in the embodiment of the present invention is further illustrated:
The commercial ac power being introduced 220V by supply socket is the power supply of system, uses the safety of the fuse protection system of 0.5A, and K switch completes energising and power down function.By the alternating current step-down of transformer B1 by 220V.There is one group of input coil on the former limit of this transformer B1, and there are three groups of output windings on secondary limit, makes the alternating current of 220V reduce to three groups of different voltages respectively, then become DC voltage after the first rectifier bridge D13, the second rectifier bridge D14 and the 3rd rectifier bridge D15.
(1) first DC voltage output circuit: alternating current 220V voltage is first through the step-down of 30VA Industrial Frequency Transformer, then the DC voltage obtained after the first rectifier bridge rectification (D13) and the first low-pass filter circuit (C20) is as the input voltage of integrated switch power L4962.Resistance R35, R36 form voltage divider, can be used for regulation output voltage Vo.L1 is energy storage inductor, and C25 is filter capacitor, and D8 is HER104 type fly-wheel diode, and these three devices constitute buck output circuit.
Output pulses modulation signal is drawn from the OUT end of L4962, and when this signal is high level, except can powering to the load, some electrical power storage is in L1 and C25, and now D8 pipe ends.When output pulses becomes low level, the conducting of D8 pipe, the electric energy be at this moment stored in L1 powers to the load with regard to the loop through being made up of D8, thus it is constant to maintain output voltage.Output voltage is after R35, R36 sampling, deliver to the inverting input FO of the error amplifier of chip internal, compare with the 5.1V reference voltage being added in in-phase input end, then go the pulse width of the PWM of control chip inside by the amplitude of the error voltage obtained, eventually pass power amplification and buck output circuit makes output voltage+12V remain unchanged.Output voltage Vo depends on resistance R35 and R36, Vo=[(R35+R36) × 5.1]/R35=11.985V ≈ 12V.COM pin compensates end, and external resistor-capacitor element (C21, R39) can be utilized to carry out frequency compensation to the error amplifier of chip internal.C23 and R38 that RC pin connects is the switching frequency in order to regulate L4962.
(2) second DC output circuits: alternating current 220V voltage is first through 30VA Industrial Frequency Transformer B1 step-down, the DC voltage obtained after the first rectifier bridge rectification (D13) and the first low-pass filter circuit (C20) again, then combine through the voltage stabilizing diode D12 of the first triode TR8, the second triode TR9 and reversal connection reverse voltage-30V ,-20V etc. that measured diode is provided.
(3) third and fourth DC output circuits: alternating current 220V voltage is first through 30VA Industrial Frequency Transformer B1 step-down, again through by after the second rectifier bridge D14, by the first linear voltage regulator IC11(7805), the second linear voltage regulator IC12(7905) realize+5V ,-5V respectively and power.Input 7805 and 7905, all to having electric capacity second low-pass filter circuit C15 and the 3rd low-pass filter circuit C14 filtering, ensures the stability of input voltage; And the filtering circuit filtering that the output terminal of the two all has electric capacity (C13, C12) to form, suppress the percent ripple of output voltage; Output terminal also has a small capacitances C24, improves High frequency filter effect further.
(4) the 5th DC output circuits: alternating current 220V voltage is first through 30VA Industrial Frequency Transformer B1 step-down, again after passing through the 3rd rectifier bridge D15, form through electric capacity C16 and C17 the ripple that the 4th low-pass filter circuit reduces output voltage, 10V voltage can be provided at the positive pole of electric capacity C16.
Convenient during in order to test, require that the output current size of current source can regulate by stepping, therefore, as shown in Figure 3, forward adjustable current source circuit 2 comprises the first single-chip microcomputer 21, first trigger 22, first metal-oxide-semiconductor field effect transistor 23, the 3rd triode 24 and multiple adjustable forward current branch road 25 be in parallel; Wherein,
The output terminal of the first single-chip microcomputer 21 is connected with the input end of the first trigger 22;
The output terminal of the first trigger 22 is connected with the grid G 1 of the first metal-oxide-semiconductor field effect transistor 23;
Drain D 1 ground connection of the first metal-oxide-semiconductor field effect transistor 23, source S 1 is connected with the base stage B3 of the 3rd triode 24, and also one end of all adjustable with each forward current branch road 25 is connected;
The other end of each is adjustable forward current branch road 25 is all connected with the emitter E 3 of the 3rd triode 24; Wherein, each adjustable forward current branch road 25 includes the relay 251 and resistance 252 that are in series;
The collector C3 of the 3rd triode 24 is connected with the positive pole (+) of measured diode 8.
It should be noted that the pulse-modulated signal that the forward current that forward adjustable current source circuit 2 produces can produce than edge adjustable pulse generation circuit 3 shifts to an earlier date the positive pole (+) that 2 μ s are added on measured diode 8, store to set up stable few son.
As shown in Figure 3 a, the embody rule of forward adjustable current source circuit in the embodiment of the present invention is further illustrated:
By the first single-chip microcomputer IC9(89C2051) control the state of the 3rd triode TR7 base stage, thus realize the adjustment to output current amplitude.The pulse signal that first single-chip microcomputer IC9 produces is by the first trigger IC10D(74HC14 type Schmidt trigger) after shaping, genertor impedance reduces, rising edge of a pulse, negative edge accelerate, the antijamming capability of signal improves, in order to avoid subsequent conditioning circuit produces unstable action due to undesired signal.74HC14 chip has multichannel schmidt trigger function, and at this is the 4th gate circuit, and by export signal level height control the first metal-oxide-semiconductor field effect transistor TR6(N raceway groove VN0300 type) conducting and shutoff.(design parameter of the first metal-oxide-semiconductor field effect transistor TR6 is: drain-source voltage value is 30V, grid source cut-in voltage value is 2.5V, drain electrode maximum current is 1A, conduction resistance value is 1.2 to 3.3 ohm, input capacitance value is 190pF, the size of this input capacitance can provide the input signal of upper frequency, thus ensures the speed of control; As the gate source voltage VGS=0V of the first metal-oxide-semiconductor field effect transistor TR6, the first metal-oxide-semiconductor field effect transistor TR6 turns off; As the gate source voltage VGS=5V of the first metal-oxide-semiconductor field effect transistor TR6, the first metal-oxide-semiconductor field effect transistor TR6 conducting).
In Fig. 3 a, J0-J3 is four WJ108 type relays, break-make by different relay selects corresponding resistance R32, R31, R30, R29(tetra-resistance accuracies to be 1%), thus form four adjustable forward current branch roads be in parallel, realize the size of adjustment the 3rd triode TR7 output current.In adjustable forward current branch road, each relay coil one end all connects 12V power supply, when the circuit signal that normally opened contact (as the J0-J3) lower end of relay is corresponding is low level, this relay contact adhesive, complete the selection of resistance and connect circuit, thus realize the adjustment of current source output current, for measured diode provides reliable and stable forward current.The size of electric current at different levels is IF=(VD9-VbeTR7)/R, then corresponding R32, R31, R30, R29, and IF is respectively 1A, 2A, 4A, 8A.Therefore, IF can be arranged between (1A, 10A) by software with four control lines, and round.
For the ease of reverse dynamic current and the detection of reverse dynamic voltage waveforms of measured diode 8, require that edge adjustable pulse produces circuit 3 and exports different pulse-modulated signals, therefore, as shown in Figure 4, edge adjustable pulse generation circuit 3 comprises second singlechip 31, second trigger 32, high-speed driver 33, second metal-oxide-semiconductor field effect transistor 34 and multiple adjustable pulse signal branch 35 be in parallel; Wherein,
The output terminal of second singlechip 31 is connected with the input end of the second trigger 32;
The output terminal of the second trigger 32 is connected with the input end of high-speed driver 33;
The output terminal of high-speed driver 33 is connected with the grid G 2 of the second metal-oxide-semiconductor field effect transistor 34;
Drain D 2 ground connection of the second metal-oxide-semiconductor field effect transistor 34, source S 2 is connected with the positive pole (+) of measured diode 8, is also all connected with one end of each adjustable pulse signal branch 35; Wherein, each adjustable pulse signal branch 35 includes the relay 351 and inductance 352 that are in series.
As shown in fig. 4 a, the embody rule of edge adjustable pulse generation circuit in the embodiment of the present invention is further illustrated:
From second singlechip IC9(89C2051) produce the pulse that frequency is 20kHz, width is 2 μ s, through the second trigger IC10F(74HC14 type Schmidt trigger) shaping, high-speed driver IC14(TC4420) drive second metal-oxide-semiconductor field effect transistor TR10 export test pulse, then via relay J 4-J8(WJ112-1A) select series inductance (containing distributed inductance) to be added on the positive pole of measured diode; Wherein, five relay J 4-J8 five inductance corresponding to it form five adjustable pulse signal branch be in parallel.
The supply voltage of high-speed driver IC14 is 12V, therefore the high level exported is close to 12V, and low level is still 0V.There is filter capacitor C27 and C26 at the power end of high-speed driver IC14, the rectangular property of chip output waveform can be improved.According to databook, when the size of load capacitance is 2500pF, rising, the fall time of waveform are 25ns.The output signal of high-speed driver IC14, after a coupling capacitance C28, controls the second metal-oxide-semiconductor field effect transistor TR10 and works.
When the output voltage of high-speed driver IC14 is 0V, the second metal-oxide-semiconductor field effect transistor TR10 turns off; As the output voltage >10V of high-speed driver IC14, the second metal-oxide-semiconductor field effect transistor TR10 opens.After second metal-oxide-semiconductor field effect transistor TR10 opens, its drain electrode will produce the pulse voltage of-30V.In order to select the test pulse of different dIf/dt, different relays need be carried out adhesive, thus different inductance is in series with the pulse voltage of-30V, export the test pulse of required dIf/dt value.
The inductance of control dIf/dt also serves the effect of the distributed inductance in simulating diode side circuit when testing softness C, because inductance must be had in side circuit to exist.Parallel connection R4(82 Ω is gone back on the inductance side of control dIf/dt), serve the effect of the braking absorption resistance in simulation measured diode side circuit.
By R3 to the pre-making alive of measured diode, whether exist for detecting it.
Inductance at different levels (containing distributed inductance) makes the power of dIf/dt be 10,20,40,100,200 (A/ μ s) arrangement, and dIf/dt is arranged on the different current reduction ratio of 10-200A/ μ s by available five road control lines.The theoretical tandem inductance of 200A/ μ s shelves is 0.04 μ H, when the test pulse forward position that the second metal-oxide-semiconductor field effect transistor TR10 produces is minimum, and dIf/dt=200A/ μ s.
As shown in Figure 5, reverse dynamic current and voltage waveform test comprise bandwidth-limited circuit 41, first detector diode 42, first operational amplifier 43, first negative feedback voltage circuit 44, second operational amplifier 45, second negative feedback voltage circuit 46, the 3rd operational amplifier 47 and the 3rd metal-oxide-semiconductor field effect transistor 48 with peak-detector circuit 4; Wherein,
One end of bandwidth-limited circuit 41 is connected with the negative pole (-) of measured diode 8, and the other end is connected with the negative pole (-) of the first detector diode 42;
The positive pole (+) of the first detector diode 42 is connected with the in-phase input end (+) of the first operational amplifier 43;
The inverting input (-) of the first operational amplifier 43 is connected with one end of the first reference voltage source V1 and the first negative feedback voltage circuit 44, and one end of the other end of output terminal and the first negative feedback voltage circuit 44, the input end of dynamic current waveform sampling circuit 5, the inverting input (-) of the second operational amplifier 45 and the second negative feedback voltage circuit 46 is connected;
In-phase input end (+) ground connection of the second operational amplifier 45, output terminal is connected with the other end of the second negative feedback voltage circuit 46 and the A/D change-over circuit 71 of CPU (central processing unit) 7;
The in-phase input end (+) of the 3rd operational amplifier 47 is connected with the negative pole (-) of measured diode 8, and reverse input end (-) is connected with the second reference voltage source V2, and output terminal is connected with the grid G 3 of the 3rd metal-oxide-semiconductor field effect transistor 48;
The source S 3 of the 3rd metal-oxide-semiconductor field effect transistor 48 is connected with the input end of dynamic current waveform sampling circuit 5, and drain D 3 is connected with the first reference voltage source V1.
It should be noted that the reverse dynamic current that dynamic current waveform sampling circuit 5 exports and reverse voltage waveform directly show by oscillograph; First reference voltage source V1 and the second reference voltage source V2 is low noise power supply 1 to be provided, and the magnitude of voltage of the first reference voltage source V1 is greater than the magnitude of voltage of the second reference voltage source V2.
Shown in composition graphs 5a and Fig. 5 b, the embody rule of dynamic current reverse in the embodiment of the present invention and voltage waveform test and peak-detector circuit is further illustrated:
The restoring current waveform exported from measured diode negative pole produces voltage signal and carries out filtering process the bandwidth-limited circuit be made up of resistance R45 and electric capacity C33, and at the first detector diode D18(Schottky type high frequency detector diode 1N60) carry out peak detection, detect peak-inverse voltage Vrm, this pipe can process the more weak small-signal of amplitude.Signal is by the first operational amplifier IC5D(LM324 type of negative feedback work) in-phase end input (+) exports again after impedance reduction, diode D5(1N4148 type) correct detection droop loss, obtain by R58, R59 dividing potential drop the voltage being equivalent to 0.25IrrmR45 again, the voltage of this 0.25IrrmR45 exports to dynamic current waveform sampling circuit; Wherein, the first negative feedback voltage circuit is adjustable resistance W2, Irrm is inverse peak current.
On the one hand, by the second operational amplifier IC5B(LM324 type) carry out anti-phase, become digital signal after flowing to the A/D change-over circuit in CPU (central processing unit), so that CPU process, complete the collection and judgement that recover wave-shape amplitude signal.On the other hand, by the 3rd operational amplifier IC5A(LM324 type) as determining whether measured diode, because R18, R19 dividing potential drop, 3rd operational amplifier IC5A inverting input (-) is positioned at 2.5V, if there is measured diode, then because of forward voltage <2.5V, C8 is powered up, thus make TR4 conducting.
In measuring process, the positive and negative electrode of measured diode correctly must be connected to measuring junction, just can obtain the reverse dynamic current waveform of this measured diode, and export to sample resistance R45 from the negative pole of measured diode and be converted into voltage signal; Reverse dynamic voltage waveforms exports from the positive pole of measured diode.
As shown in Figure 5 b, the reverse dynamic waveform of display one SiC material schottky diode under different I F=1A, 200A/ μ s is directly carried out by oscillograph; Wherein, be 1. inverse current waveform; 2. be reverse voltage waveform.
As shown in Figure 6, dynamic current waveform sampling circuit 5 comprises the first differential amplifier circuit 51, second differential amplifier circuit 52, first pair of negative edge JK flip-flop 53 and second pair of negative edge JK flip-flop 54; Wherein,
Two ends after first differential amplifier circuit 51 is in parallel with the second differential amplifier circuit 52 are tested with reverse dynamic current and voltage waveform respectively and are connected with one end of the first output terminal d2 and first pair negative edge JK flip-flop 53 of peak-detector circuit 4;
The other end of described first pair of negative edge JK flip-flop 53 is connected with one end of described second pair of negative edge JK flip-flop 54;
The other end of described second pair of negative edge JK flip-flop 54 is connected with the A/D change-over circuit 71 of described CPU (central processing unit) 7.
Shown in composition graphs 6a and Fig. 6 b, the embody rule of dynamic current waveform sampling circuit in the embodiment of the present invention is further illustrated:
The auxiliary signal negative edge first couple of negative edge JK flip-flop IC15B exported from 74HC14 type Schmidt trigger IC10B makes its set, to allow second couple of negative edge JK flip-flop IC15A to work.
Dynamic waveform negative edge is when transverse axis (0V), and triode TR14 turns off and triode TR15 conducting, and thus the collector potential of TR15 declines (contrary with TR14).Second couple of negative edge JK flip-flop IC15A is sent to make its set waveform negative edge through R53 after TR15 conducting.The base potential of TR12 is 0.25IrrmR45, recovers waveform rising edge when superpotential 0.25IrrmR45, TR13 conducting and TR12 turns off, and two two negative edge JK flip-flop IC15A, IC15B is resetted after rising edge send TR11 to amplify by R57 simultaneously.Pulse is exported by the 6th pin of second couple of negative edge JK flip-flop IC15A, current impulse is converted to through TR2, TR3, after C35, R51 integration, become analog voltage to amplify through IC4 chip OP07 negative feedback, deliver to the A/D converter CS5524 of CPU (central processing unit), then shown by LCD chip RT12032-1 after the computing of CPU software.The negative feedback enlargement factor of OP07 is (1+R12/R13)=26, R12, the resistance accuracy of R13 is 1%.
In Fig. 6 a, TR14, TR15 are 9018 type high-frequency small power transistors, and input pulse rising edge ascending time tr is about 3ns, and during anti-phase output, tf is lower than 2ns the negative edge time.Because during negative edge, the mean charge of knot reduces, and effective junction capacity diminishes, so the negative edge time is shorter.The high-frequency tube of selected characteristic frequency f T=1GHz, Vce minimum value 2.5V.By two-stage quasi high-speed JK flip-flop circuit (IC15A, IC15B), tr, the tf on edge before and after pulse are accelerated (74S112 trigger speed is faster).In Fig. 6 a, W5 is trr correcting element, R16 and W5 determines the total current I of TR2 and TR3.
As shown in Figure 6 b, directly carry out showing the reverse dynamic waveform of another SiC material schottky diode under different I F=1A, 200A/ μ s by oscillograph; Wherein, be 1. reverse dynamic current waveform; 2. being triode TR15 collector waveform, is 3. triode TR11 collector waveform, is 4. the waveform of the 6th pin output pulse of second couple of negative edge JK flip-flop IC15A.
As shown in Figure 7, C parameter detecting circuit 6 comprises the second detector diode 61, the 5th low-pass filter circuit 62, four-operational amplifier 63 and the 3rd negative feedback voltage circuit 64; Wherein,
Negative pole (-) and reverse dynamic current and the voltage waveform of the second detector diode 61 are tested and are connected with the second output terminal d3 of peak-detector circuit 4, and positive pole (+) is connected with one end of the 5th low-pass filter circuit 62;
The other end of the 5th low-pass filter circuit 62 is connected with one end of the inverting input (-) of four-operational amplifier 63 and the 3rd negative feedback voltage circuit 64;
In-phase input end (+) ground connection of four-operational amplifier 63, output terminal is connected with the other end of the 3rd negative feedback voltage circuit 64 and the A/D change-over circuit 71 of CPU (central processing unit) 7.
As shown in Figure 7a, the embody rule of C parameter detecting circuit in the embodiment of the present invention is further illustrated:
Softness C (=Vrm/Vr, wherein Vrm is peak-inverse voltage, and Vr is added reverse bias voltage) test circuit is made up of D7, C9, R25, R65 and IC5C phase inverter; Wherein, D7 is the second detector diode, and C9 is the filter capacitor in the 5th low-pass filter circuit, R25 and R65 forms the 3rd negative feedback voltage circuit, and IC5C phase inverter is four-operational amplifier.
D7 and C9 forms peak detection, and D7 have detected the peak value transient voltage of measured tube turn off process, and this voltage reversal is sent A/D converter CS5524 by IC5C.
Further, as shown in Figure 8, system also comprises reverse anchor jam nut power test circuit 9, input end and reverse dynamic current and the voltage waveform of reverse anchor jam nut power test circuit 9 are tested and are connected with the 3rd output terminal d4 of peak-detector circuit 4, output terminal is connected with the A/D change-over circuit 71 of CPU (central processing unit) 7, for measuring the reverse anchor jam nut power of measured diode 8.
Wherein, reverse anchor jam nut power test circuit 9 comprises coupling transformer 91 and the integrated circuit 92 for detection signal effective value power; Wherein, coupling transformer 91 comprises the second input coil 911 be connected with the input end of described reverse anchor jam nut power test circuit, and is positioned at secondary the 4th output winding 912 be connected with described integrated circuit.
Reverse anchor jam nut power test circuit 9 also comprises at least one overload protection arrangement 93 protecting described integrated circuit 92 for clamper, and overload protection arrangement 93 comprises two diodes forming connected loop, and its two ends are all connected with integrated circuit 92.
As shown in Figure 8 a, the embody rule of reverse anchor jam nut power test circuit in the embodiment of the present invention is further illustrated:
Integrated circuit AD8362 is arbitrary shape signal real effective power detection device, frequency range 50Hz ~ 3GHz, two squaring circuit is adopted to compare switch technology and laser trimming techniques, measure linear degree is higher, result almost has nothing to do with signal waveform, especially when large peak factor, the requirement of sophisticated signal to precision can be competent at, be usually used in measuring large bandwidth sophisticated signal power.Operating frequency range 20kHz ~ the 250MHz of coupling transformer T4-6T, when transformer transfer ratio is 1:2, is conducive to the impedance matching between signal and power detection chip, can also improves the signal power 3dB of input end.The power measurement scope of complete machine is-48dBm ~+12dBm, and precision can reach 0.1dB.Because reverse Dynamic Signal is superimposed upon on test pulse, the power delivery of measurement to A/D change-over circuit, then pass to when CPU software processes by deduction test pulse power, just can obtain the power of reverse Dynamic Signal.Diode D1 serves overload protective function; Diode D2 and D3 of forward and reverse parallel connection, D4 and D5, D6 and D7 are combined into over-pressure safety device, in order to avoid sensing instant high-voltage because of input end and defective chip, serve clamper protective effect.
Should be noted that, the A/D converter of A/D change-over circuit to be IC1 chip be CS5524 type 12 bit resolution, external circuit is by its pin IN2, IN1, IN0 input analog amount trr reverse recovery time, reverse voltage VR, softness C etc. respectively, and analog quantity is converted into digital quantity by it.
Whether the work of the CS pin control converter of A/D converter, and CS is Low level effective.Its IN pin is serial data input.Serial data has four, and the I/OCK end of CS5524 provides clock signal by single-chip microcomputer 89C52.Its OUT pin is data output end, and single-chip microcomputer 89C52 draws the results such as Vrm, Vr, C, P as calculated according to sense data, and result is given LCD display.Its VZ+, VZ-port is the pin of external positive and negative reference voltage source, and VZ+ external TL431C type reference voltage source IC3 chip, it provides the reference voltage of analog to digital converter.Owing to employing TL431C secondary pressure, the power supply that CS5524 chip needs can be provided by Fig. 2 general supply circuit.
Implement the embodiment of the present invention, there is following beneficial effect:
In embodiments of the present invention, due to be provided with reverse dynamic current and voltage waveform test with peak-detector circuit, dynamic current waveform sampling circuit, C parameter detecting circuit, thus reverse dynamic current, the oppositely performance parameter such as dynamic electric voltage and reverse anchor jam nut power of diode detected, reach can twin zener dioder common mode interference, strengthen the object of its reliability and accuracy.
One of ordinary skill in the art will appreciate that all or part of step realized in above-described embodiment method is that the hardware that can carry out instruction relevant by program has come, described program can be stored in a computer read/write memory medium, described storage medium, as ROM/RAM, disk, CD etc.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1. a digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform and loss power test macro, it matches with measured diode, it is characterized in that, comprise low noise power supply circuit, forward adjustable current source circuit, edge adjustable pulse generation circuit, oppositely dynamic current and voltage waveform test and peak-detector circuit, dynamic current waveform sampling circuit, reverse anchor jam nut power test circuit, C parameter detecting circuit and CPU (central processing unit), wherein:
First output terminal of described low noise power supply circuit is connected with the input end of described forward adjustable current source circuit, the input end that second output terminal produces circuit with described edge adjustable pulse is connected, and is also the additional reverse bias voltage of described measured diode for providing DC voltage;
First output terminal of described forward adjustable current source circuit is connected with the positive pole of described measured diode, provides multiple adjustable forward current for giving described measured diode;
The first output terminal that described edge adjustable pulse produces circuit is connected with the positive pole of described measured diode, provides multiple adjustable pulse-modulated signal for giving described measured diode;
Described reverse dynamic current and voltage waveform test are connected with the negative pole of described measured diode with the input end of peak-detector circuit, first output terminal is connected with the input end of described dynamic current waveform sampling circuit, second output terminal is connected with the input end of described C parameter detecting circuit, for the waveform of the reverse dynamic current and reverse dynamic electric voltage that obtain described measured diode, obtain peak-inverse voltage and peak signal;
The output terminal of described dynamic current waveform sampling circuit is connected with described CPU (central processing unit), for the described peak signal obtained being processed into the simulating signal needed for described CPU (central processing unit);
The output terminal of described C parameter detecting circuit is connected with described CPU (central processing unit), for the peak-inverse voltage that obtains described in the measuring ratio with described reverse bias voltage; Described C parameter detecting circuit comprises the second detector diode, the 5th low-pass filter circuit, four-operational amplifier and the 3rd negative feedback voltage circuit; Wherein,
The negative pole of described second detector diode is tested with described reverse dynamic current and voltage waveform and is connected with the second output terminal of peak-detector circuit, and positive pole is connected with one end of described 5th low-pass filter circuit;
The described other end of the 5th low-pass filter circuit is connected with one end of the inverting input of described four-operational amplifier and described 3rd negative feedback voltage circuit;
The in-phase input end ground connection of described four-operational amplifier, output terminal is connected with the described other end of the 3rd negative feedback voltage circuit and the A/D change-over circuit of described CPU (central processing unit);
Described CPU (central processing unit) comprises A/D change-over circuit and CPU, its second output terminal also producing circuit respectively with the second output terminal of described forward adjustable current source circuit and described edge adjustable pulse is connected, forward current and described edge adjustable pulse for controlling described forward adjustable current source circuit produce the generation of the pulse-modulated signal of circuit, and the related data that the described dynamic current waveform sampling circuit got and described C parameter detecting circuit export are processed.
2. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described low noise power supply circuit comprises Industrial Frequency Transformer, the first rectifier bridge, the first low-pass filter circuit, integrated switch power, buck output circuit, voltage divider, voltage stabilizing diode, the first triode, the second triode, the second rectifier bridge, the first linear voltage regulator, the second linear voltage regulator, the second low-pass filter circuit, the 3rd low-pass filter circuit, the 3rd rectifier bridge and the 4th low-pass filter circuit; Wherein,
Described Industrial Frequency Transformer comprises the first input coil of external AC potential source, and is positioned at the first secondary output winding, the second output winding and the 3rd output winding;
Described first output winding is connected with described first rectifier bridge, described first low-pass filter circuit, described integrated switch power, described buck output circuit and described voltage divider successively, form the first DC voltage output circuit, described first DC voltage output circuit is used for providing 12V DC voltage; Wherein, described buck output circuit comprises energy storage inductor, filter capacitor and fly-wheel diode;
After described first output winding is also connected with described first rectifier bridge and described first low-pass filter circuit successively, voltage stabilizing diode described in reversal connection, be connected with the Darlington transistor be made up of described first triode and the second triode again, form the second DC voltage output circuit, described second DC voltage output circuit is used for providing reverse voltage to described measured diode;
Described second output winding is connected with described second rectifier bridge, described first linear voltage regulator and the second low-pass filter circuit successively, and form the 3rd DC voltage output circuit, described 3rd DC voltage output circuit is used for providing 5V DC voltage;
Described second output winding is also connected with described second rectifier bridge, described second linear voltage regulator and the 3rd low-pass filter circuit successively, and form the 4th DC voltage output circuit, described 4th DC voltage output circuit is used for providing-5V DC voltage;
Described 3rd output winding is connected with described 3rd rectifier bridge and described 4th low-pass filter circuit successively, and form the 5th DC voltage output circuit, described 5th DC voltage output circuit is used for providing 10V DC voltage.
3. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described forward adjustable current source circuit comprises the first single-chip microcomputer, the first trigger, the first metal-oxide-semiconductor field effect transistor, the 3rd triode and multiple adjustable forward current branch road be in parallel; Wherein,
The output terminal of described first single-chip microcomputer is connected with the input end of the first trigger;
The output terminal of described first trigger is connected with the grid of described first metal-oxide-semiconductor field effect transistor;
The grounded drain of described first metal-oxide-semiconductor field effect transistor, source electrode is connected with the base stage of described 3rd triode, and also one end of all adjustable with each forward current branch road is connected;
The other end of each is adjustable forward current branch road is all connected with the emitter of described 3rd triode; Wherein, each adjustable forward current branch road described includes the relay and resistance that are in series;
The collector of described 3rd triode is connected with the positive pole of described measured diode.
4. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described edge adjustable pulse produces circuit and comprises second singlechip, the second trigger, high-speed driver, the second metal-oxide-semiconductor field effect transistor and multiple adjustable pulse signal branch be in parallel; Wherein,
The output terminal of described second singlechip is connected with the input end of the second trigger;
The output terminal of described second trigger is connected with the input end of described high-speed driver;
The output terminal of described high-speed driver is connected with the grid of described second metal-oxide-semiconductor field effect transistor;
The grounded drain of described second metal-oxide-semiconductor field effect transistor, source electrode is connected with the positive pole of described measured diode, is also all connected with one end of each adjustable pulse signal branch; Wherein, each adjustable pulse signal branch described includes the relay and inductance that are in series.
5. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described reverse dynamic current and voltage waveform test comprise bandwidth-limited circuit, the first detector diode, the first operational amplifier, the first negative feedback voltage circuit, the second operational amplifier, the second negative feedback voltage circuit, the 3rd operational amplifier and the 3rd metal-oxide-semiconductor field effect transistor with peak-detector circuit; Wherein,
One end of described bandwidth-limited circuit is connected with the negative pole of described measured diode, and the other end is connected with the negative pole of described first detector diode;
The positive pole of described first detector diode is connected with the in-phase input end of described first operational amplifier;
The inverting input of described first operational amplifier is connected with one end of the first reference voltage source and described first negative feedback voltage circuit, and one end of the other end of output terminal and described first negative feedback voltage circuit, the input end of described dynamic current waveform sampling circuit, the inverting input of described second operational amplifier and described second negative feedback voltage circuit is connected;
The in-phase input end ground connection of described second operational amplifier, output terminal is connected with the described other end of the second negative feedback voltage circuit and the A/D change-over circuit of described CPU (central processing unit);
The in-phase input end of described 3rd operational amplifier is connected with the negative pole of described measured diode, and reverse input end is connected with the second reference voltage source, and output terminal is connected with the grid of described 3rd metal-oxide-semiconductor field effect transistor;
The source electrode of described 3rd metal-oxide-semiconductor field effect transistor is connected with the input end of described dynamic current waveform sampling circuit, drains to be connected with described first reference voltage source.
6. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described dynamic current waveform sampling circuit comprises the first differential amplifier circuit, the second differential amplifier circuit, first pair of negative edge JK flip-flop and second pair of negative edge JK flip-flop; Wherein,
Two ends after described first differential amplifier circuit is in parallel with described second differential amplifier circuit are tested with described reverse dynamic current and voltage waveform respectively and are connected with one end of the first output terminal of peak-detector circuit and described first pair of negative edge JK flip-flop;
The other end of described first pair of negative edge JK flip-flop is connected with one end of described second pair of negative edge JK flip-flop;
The other end of described second pair of negative edge JK flip-flop is connected with the A/D change-over circuit of described CPU (central processing unit).
7. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 1 and loss power test macro, it is characterized in that, described system also comprises reverse anchor jam nut power test circuit, input end and the described reverse dynamic current and voltage waveform of described reverse anchor jam nut power test circuit are tested and are connected with the 3rd output terminal of peak-detector circuit, output terminal is connected with the A/D change-over circuit of described CPU (central processing unit), for measuring the reverse anchor jam nut power of described measured diode.
8. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 7 and loss power test macro, it is characterized in that, described reverse anchor jam nut power test circuit comprises coupling transformer and the integrated circuit for detection signal effective value power; Wherein, described coupling transformer comprises the second input coil be connected with the input end of described reverse anchor jam nut power test circuit, and is positioned at secondary the 4th output winding be connected with described integrated circuit.
9. digitizing HIGH-POWERED MICROWAVES diode reverse dynamic waveform as claimed in claim 8 and loss power test macro; it is characterized in that; described reverse anchor jam nut power test circuit also comprises at least one overload protection arrangement protecting described integrated circuit for clamper; described overload protection arrangement comprises two diodes forming connected loop, and its two ends are all connected with described integrated circuit.
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