CN104282340A - Threshold voltage sensing method and threshold voltage sensing system for solid-state disk flash memory chip - Google Patents

Abstract

The invention discloses a threshold voltage sensing method for a solid-state disk flash memory chip, and in particular relates to an optimal method mainly used for performing error correction on multiple layers of unit flash memory chips by using a low-density parity-check code. The system mainly comprises an LDPC encoding module, a flash memory chip storage module, a non-uniform threshold voltage sensing module, a log-likelihood ratio computation module and an LDPC decoding module, wherein the LDPC encoding module is mainly used for encoding original data to generate codons by using an LDPC generation matrix; the flash memory chip storage module is mainly used for storing data; the non-uniform threshold voltage sensing module is mainly used for performing non-uniform threshold voltage sensing on the flash memory chips; the log-likelihood ratio computation module is mainly used for obtaining a log-likelihood ratio value according to a threshold voltage value; the LDPC decoding module is mainly used for performing decoding error correction on the log-likelihood ratio value and a check matrix. The threshold voltage sensing method is mainly suitable for the field of solid-state disk error correction, and the reliability of data storage is improved.

Description

A kind of solid-state disk flash chip threshold voltage cognitive method and system

Technical field

The invention belongs to solid-state disk flash chip error correcting technique field, more specifically, relate to a kind of solid-state disk flash chip threshold voltage cognitive method and system.

Background technology

Along with the generally application of all kinds of mobile device in people's daily life, as the flash chip (Not And, NAND Flash memory) of one of nonvolatile memory kind, more and more play an important role.Due to the physical arrangement feature of NAND Flash memory, easily make a mistake, how to ensure the reliability of data, become one of gordian technique of NAND Flash memory application success.Therefore, the Reliability Assurance technology of employing error correcting code becomes key one ring in NAND Flash memory application, is widely used and studies.

The framework of current NAND Flash memory is from single layer cell flash chip (Single Layer Cell, SLC) multi-layered unit flash memory chip (Multi-Level Cell is developed into, MLC), the manufacturing process of NAND Flash develops into the level of 25 nanometers or even 20 nanometers, this means that the probability made a mistake in NAND Flash memory is increasing, therefore, the error correction algorithm using stronger error correcting capability is needed in NAND Flash memory equipment.

In existing error-correcting code technique, low density parity check code (Low-Density Parity-Check code, LDPC) there is powerful error correcting capability, LDPC code is utilized to carry out the code word generating and be made up of raw information and check information of encoding during data write NAND Flash memory, then again utilize LDPC code to carry out decoding and error when digital independent, to reach the object of the bit error rate (Bit Error Rate, BER) reducing NAND Flash memory.

LDPC code error correction needs accurate log-likelihood ratio (Log-likelihood Rate, LLR) information, and log-likelihood ratio information depends on the threshold voltage perceived accuracy of NAND Flash memory flash chip unit cell.

In MLC NAND Flash memory, a flash chip unit cell stores 2bits, and it has four kinds of store statuss 00,01,10,11, can use 2 ²=4 threshold voltage window represent, each threshold voltage window represents a kind of store status.

Ideally, MLC NAND Flash memory has 4 kinds of non-cross threshold voltage window, as shown in Figure 1, has certain distance between 4 threshold voltage window, can identify correct storing value according to threshold voltage value.But due to the interference of noise in flash chip, 4 kinds of threshold voltage window can cross one another, thus there is the situation of 3 crossing threshold voltage windows, as shown in Figure 2, there is mutual crossover phenomenon in 4 kinds of threshold voltage window, in crossing threshold voltage window, just can not separate corresponding store status in right area during threshold of perception current voltage like this, occur mistake.

Summary of the invention

The object of the invention is accurately to obtain the threshold voltage value in MLC NAND Flash memory flash chip unit, thus obtain the initial information of required LLR ratio as LDPC code decoding and error, carry out LDPC decoding and error, improve the reliability of NAND Flash memory.

To achieve these goals, the present invention constructs one non-homogeneous threshold voltage method for sensing and optimizing in crossing threshold voltage window, decrease uniform thresh voltage perception number of times in traditional crossing threshold voltage window, using the input of the threshold voltage of acquisition as LDPC decoding module in MLC NAND Flash memory.The non-homogeneous perceptual strategy built mainly is carried out threshold voltage perception heterogeneous and do not do any perception outside intersection region in crossing threshold voltage regime.

According to one aspect of the present invention, provide a kind of solid-state disk internal flash chip threshold voltage cognitive method, comprise the steps:

(1) data input step, comprises following sub-step:

(1.1) when raw data R is written into flash chip, according to low density parity check code LDPC generator matrix G, raw data R is encoded, generated codeword C;

(1.2) the code word C generated is write in flash chip;

(2) data export step, comprise following sub-step:

(2.1) what calculate intersection region parts boundary line on the left side with part boundary line on the right side the distance of then trying to achieve between two separatrix is wherein i=0,1,2;

(2.2) non-homogeneous perception is carried out to the threshold voltage of flash chip:

(2.2.1) precision determines perception frequency n in each threshold voltage intersection region as requested;

(2.2.2) the perception number of times in left and right half region of each threshold voltage intersection region is determined according to perception frequency n

(2.2.3) calculate according to the perception number of times m in left and right half region of each threshold voltage intersection region the position needing sense voltage in left and right half region;

(2.2.4) according to the sense voltage position read threshold voltages obtained;

(2.3) log-likelihood ratio LLR is calculated according to the threshold voltage of non-homogeneous perception;

(2.4) according to LLR and LDPC check matrix Q, decoding and error is carried out to the code word C of write flash chip in step (1).

In one embodiment of the present of invention, calculate in left and right half region according to the perception number of times m in left and right half region of each threshold voltage intersection region in described step (2.2.3) and need the position of sense voltage specifically to comprise:

Geometric Sequence obtains the threshold voltage needing perception to use common ratio to be q, wherein q > 1, and the left-half for intersection region needs the number of times of perception to be m, then the relative distance of perception point From Left circle chosen is respectively 1, q, q ²... q ^m-1, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively wherein S _irepresent the distance of each intersection region, i=0,1,2.

In one embodiment of the present of invention, specifically according to following formula generated codeword C in described step (1):

C＝R×G (1)

In one embodiment of the present of invention, what calculate intersection region in described step (2.1) parts boundary line on the left side with part boundary line on the right side be specially:

$\frac{P^{\left(i\right)}\left(B_l^{\left(i\right)}\right)}{P^{(i+1)}\left(B_l^{\left(i\right)}\right)}=\frac{P^{(i+1)}\left(B_r^{\left(i\right)}\right)}{P^{\left(i\right)}\left(B_r^{\left(i\right)}\right)}=M---\left(2\right)$

P ⁽ⁱ⁾x () is i-th threshold voltage gaussian probability distribution function, M is a ratio, determines according to intersection region size, is substituted in above formula by threshold voltage Gaussian probability functions and obtains

$-\frac{{(B_l^{\left(i\right)}-{\mathrm{\μ}}_i)}^2}{{\mathrm{\σ}}_i^2}+\frac{{(B_l^{\left(i\right)}-{\mathrm{\μ}}_{i+1})}^2}{{\mathrm{\σ}}_{i+1}^2}=2\ln \left(\frac{{\mathrm{\σ}}_i}{{\mathrm{\σ}}_{i+1}}M\right)---\left(3\right)$

$-\frac{{(B_r^{\left(i\right)}-{\mathrm{\μ}}_{i+1})}^2}{{\mathrm{\σ}}_{i+1}^2}+\frac{{(B_r^{\left(i\right)}-{\mathrm{\μ}}_i)}^2}{{\mathrm{\σ}}_i^2}=2\ln \left(\frac{{\mathrm{\σ}}_{i+1}}{{\mathrm{\σ}}_i}M\right)---\left(4\right)$

According to the average μ of known i-th threshold voltage Gaussian probability functions _iand variance with ratio M, by solution formula above (3) and (4), that obtains each intersection region parts boundary line on the left side with part boundary line on the right side

In one embodiment of the present of invention, the LLR calculating i-th according to the threshold voltage of non-homogeneous perception in described step (2.3) is specially:

${\mathrm{LLR}}_i=\ln \frac{{\∫}_{A_i}{P}^{\left(i\right)}(b_i=1|V_i)}{{\∫}_{A_i}{P}^{\left(i\right)}(b_i=0|V_i)}---\left(5\right)$

Wherein V _irepresent sense voltage value, A _irepresent the regional extent value at sense voltage place, P ⁽ⁱ⁾x () represents i-th threshold voltage perception Gaussian function.

In one embodiment of the present of invention, described step (2.4) specifically comprises:

(2.4.1), the LLR information that step (2.3) obtains is input in the variable node in check matrix Q, as the initial information of LDPC decoding;

(2.4.2), in check matrix Q each variable node and check-node carry out iterative processing decoding information each other, only at the inter-node transmission of variable node and check-node annexation each other in check matrix Q;

If (2.4.3) decoded the LDPC decoding vector C' that obtains equal with the code word C of input or when reaching maximum iterations LDPC decode procedure terminate.

According to another aspect of the present invention, additionally provide a kind of solid-state disk internal flash chip threshold voltage sensory perceptual system, described system comprises load module, output module and flash chip memory module, wherein:

Described load module, comprises LDPC coding module, described LDPC coding module, generates n-bit LDPC code word C, wherein n > k for carrying out coding to k-bit raw data according to LDPC generator matrix;

Described flash chip memory module, for storing LDPC code word C;

Described output module comprises non-homogeneous voltage sensing module, LLR computing module and LDPC decoding module, wherein:

Described non-homogeneous voltage sensing module, non-homogeneous threshold voltage sense operation is carried out to the flash chip in flash chip memory module, described non-homogeneous threshold voltage sense operation carries out non-homogeneous threshold voltage perception to three threshold voltages intersection window areas, do not carry out voltage sense operation outside threshold voltage intersection window;

Described LLR computing module, for calculating corresponding LLR ratio according to the threshold voltage obtained;

LDPC decoding module, for carrying out iterative decoding operation according to the LLR ratio obtained and LDPC check matrix, obtaining LDPC output codons C', correcting the mistake of code word in flash chip memory module.

In one embodiment of the present of invention, described non-homogeneous voltage sensing module comprises perception number of times computing module, perceived position computing module and threshold voltage sensing module, wherein:

Described perception number of times computing module, for according to perception frequency n in each threshold voltage intersection region, determines the perception number of times in left and right half region of each threshold voltage intersection region

Described perceived position computing module, calculates the position needing sense voltage in left and right half region for the perception number of times m in left and right half region of each threshold voltage intersection region that calculates according to perception number of times computing module;

Described threshold voltage sensing module, for the sense voltage position read threshold voltages calculated according to perceived position computing module.

In one embodiment of the present of invention, described perceived position computing module specifically for:

The Geometric Sequence that common ratio is q is used to obtain the threshold voltage (q > 1) needing perception, left-half for intersection region also needs the number of times of perception to be m, then the relative distance of perception point From Left circle chosen is respectively 1, q, q ²... q ^m-1, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively wherein S _irepresent the distance of each intersection region, i=0,1,2.

In sum, the beneficial effect of technical solution of the present invention is:

Propose a kind of solid-state disk flash chip threshold voltage method for sensing and optimizing, the method can adopt cognitive method heterogeneous in 3 main threshold voltage intersection regions.Compared with uniform thresh cognitive method in traditional intersection region, effectively can reduce the perception number of times of threshold voltage signal, perceived accuracy is also high than uniform thresh voltage cognitive method, and the threshold voltage obtained with the method perception increases for the error correcting capability of LDPC code.Because decrease threshold voltage perception number of times, so the consumption of energy in LDPC code error correction procedure in solid-state disk effectively can be reduced.

Accompanying drawing explanation

Fig. 1 is ideally not by noise threshold voltage window;

Fig. 2 is the threshold window occurring intersection region after being subject to noise;

Fig. 3 is that the present invention carries out non-homogeneous threshold voltage perceptual map in intersection region;

Fig. 4 is the treatment scheme schematic diagram of the present invention's threshold voltage cognitive method heterogeneous;

Fig. 5 is solid-state disk flash chip threshold voltage sensory perceptual system structural representation of the present invention.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.In addition, if below in described each embodiment of the present invention involved technical characteristic do not form conflict each other and just can mutually combine.

As shown in Figure 3, be the principle of threshold voltage cognitive method of the present invention, intersect in window at three threshold voltages, precision determines perception frequency n in each threshold voltage intersection region as requested.The perception number of times in left and right half region of each threshold voltage intersection region is determined according to given perception frequency n perception number of times m according to left and right half region of each threshold voltage intersection region calculates the position needing sense voltage in left and right half region, obtains threshold voltage value in the sense voltage position perception of correspondence.

As shown in Figure 4, solid-state disk flash chip threshold voltage cognitive method of the present invention, specifically comprises the steps:

(1) data input step:

(1.1) when there being raw data R to be written into flash chip, according to LDPC generator matrix G, raw data is encoded, generated codeword C;

The process of coding is:

C＝R×G (1)

(1.2) flash chip is write.

The code word C generated is written into flash chip memory module.

(2) data export step:

(2.1) what calculate intersection region parts boundary line on the left side with part boundary line on the right side wherein (i=0,1,2), the distance of then trying to achieve between two separatrix is

As shown in Figure 3.

$\frac{P^{\left(i\right)}\left(B_l^{\left(i\right)}\right)}{P^{(i+1)}\left(B_l^{\left(i\right)}\right)}=\frac{P^{(i+1)}\left(B_r^{\left(i\right)}\right)}{P^{\left(i\right)}\left(B_r^{\left(i\right)}\right)}=M---\left(2\right)$

M varies in size according to intersection region and different, is substituted in above formula by threshold voltage Gaussian probability functions and obtains

$-\frac{{(B_l^{\left(i\right)}-{\mathrm{\μ}}_i)}^2}{{\mathrm{\σ}}_i^2}+\frac{{(B_l^{\left(i\right)}-{\mathrm{\μ}}_{i+1})}^2}{{\mathrm{\σ}}_{i+1}^2}=2\ln \left(\frac{{\mathrm{\σ}}_i}{{\mathrm{\σ}}_{i+1}}M\right)---\left(3\right)$

$-\frac{{(B_r^{\left(i\right)}-{\mathrm{\μ}}_{i+1})}^2}{{\mathrm{\σ}}_{i+1}^2}+\frac{{(B_r^{\left(i\right)}-{\mathrm{\μ}}_i)}^2}{{\mathrm{\σ}}_i^2}=2\ln \left(\frac{{\mathrm{\σ}}_{i+1}}{{\mathrm{\σ}}_i}M\right)---\left(4\right)$

The average μ of known i-th threshold voltage Gaussian probability functions _iand variance with ratio M, by solution formula 3 and 4 above, that can obtain each intersection region parts boundary line on the left side with part boundary line on the right side

(2.2) non-homogeneous perception is carried out to threshold voltage:

(2.2.1), precision determines perception frequency n in each threshold voltage intersection region as requested;

(2.2.2) the perception number of times in left and right half region of each threshold voltage intersection region, is determined according to perception frequency n

(2.2.3), calculate according to the perception number of times m in left and right half region of each threshold voltage intersection region the position needing sense voltage in left and right half region;

The present invention two in left and right regions use threshold of perception current voltage heterogeneous, so it not is equally distributed that these points are chosen, the point that we choose is denser the closer to separatrix, more sparse the closer to zone line.If we use common ratio to obtain the threshold voltage also needing perception for the Geometric Sequence of q (q > 1), left-half for intersection region also needs the number of times of perception to be m, then the relative distance of perception point From Left circle chosen is respectively 1, q, q ²... q ^m-1, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively wherein S _irepresent the distance (i=0,1,2) of each intersection region.Also above-mentioned sense operation heterogeneous is carried out in remaining intersection region.

(2.2.4), according to the sense voltage position read threshold voltages obtained.

(2.3) LLR of i-th is calculated according to the threshold voltage of non-homogeneous perception;

${\mathrm{LLR}}_i=\ln \frac{{\∫}_{A_i}{P}^{\left(i\right)}(b_i=1|V_i)}{{\∫}_{A_i}{P}^{\left(i\right)}(b_i=0|V_i)}---\left(5\right)$

Wherein V _irepresent sense voltage value, A _irepresent the regional extent at sense voltage place, P ⁽ⁱ⁾x () represents i-th threshold voltage perception Gaussian function.

(2.4) according to LLR and LDPC check matrix Q, decoding and error is carried out to the code word C of write flash chip in step (1).

(2.4.1) the LLR information that, step 4 obtains is input in the variable node in check matrix Q, as the initial information of LDPC decoding;

(2.4.2), in check matrix Q each variable node and check-node carry out iterative processing decoding information each other, only at the inter-node transmission of variable node and check-node annexation each other in check matrix Q.

If (2.4.3) decoded the LDPC decoding vector C' that obtains equal with the code word C of input or when reaching maximum iterations LDPC decode procedure terminate.In two kinds of situation: if decoding obtains LDPC decoding vector, C' is equal with enter code word C, successfully decoded; If iterations reaches the maximal value of regulation, and the LDPC decoding vector C' and enter code word C that decoding obtains is unequal, decoding failure.

As shown in Figure 5, solid-state disk flash chip threshold voltage sensory perceptual system of the present invention mainly comprises load module, output module and flash chip memory module composition.Described load module mainly comprises LDPC coding module.Described output module mainly comprises non-homogeneous voltage sensing module, LLR computing module and LDPC decoding module, wherein:

Described LDPC coding module, generates n-bit LDPC code word C (n > k) for carrying out coding to k-bit raw data R according to LDPC generator matrix.

Described flash chip memory module, for storing LDPC code word C.

Described non-homogeneous voltage sensing module, for carrying out non-homogeneous threshold voltage sense operation to the flash chip in flash chip memory module, described non-homogeneous threshold voltage sense operation carries out non-homogeneous threshold voltage perception to three threshold voltages intersection window areas, do not carry out voltage sense operation outside threshold voltage intersection window.

Particularly, described non-homogeneous voltage sensing module comprises perception number of times computing module, perceived position computing module and threshold voltage sensing module, wherein:

Described perception number of times computing module, for according to perception frequency n in each threshold voltage intersection region, determines the perception number of times in left and right half region of each threshold voltage intersection region

Described perceived position computing module, the perception number of times m for left and right half region of each threshold voltage intersection region calculated according to perception number of times computing module calculates the position needing sense voltage in left and right half region;

Described threshold voltage sensing module, for the sense voltage position read threshold voltages calculated according to perceived position computing module.

Particularly, described perceived position computing module specifically for:

The Geometric Sequence 1 that use common ratio is q, q, q ²... q ^m-1obtain the threshold voltage (q > 1) needing perception, the left-half for intersection region also needs the number of times of perception to be m, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively $\frac{1}{W}\×\frac{S_i}{2},\frac{q}{W}\×\frac{S_i}{2},\frac{q^2}{W}\×\frac{S_i}{2},...,\frac{q^{m-1}}{W}\×\frac{S_i}{2},$ Wherein S _irepresent the distance (i=0,1,2) of each intersection region.

Described LLR computing module, for calculating corresponding LLR ratio according to the threshold voltage obtained.

LDPC decoding module, for carrying out iterative decoding operation according to the LLR ratio obtained and LDPC check matrix, obtaining LDPC output codons C', correcting the mistake of code word in flash chip memory module.Have two kinds of situations, one be correct for institute wrong, namely LDPC output codons C' is identical with LDPC code word C.Another kind of situation is that the two is not identical, and it is wrong namely not correct institute, LDPC decoding and error operation failure.

Those skilled in the art will readily understand; the foregoing is only preferred embodiment of the present invention; not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.

Claims (9)

1. a solid-state disk flash chip threshold voltage cognitive method, is characterized in that, described method comprises the steps:

(1) data input step, comprises following sub-step:

(1.1) when raw data R is written into flash chip, according to low density parity check code LDPC generator matrix G, raw data R is encoded, generated codeword C;

(1.2) the code word C generated is write in flash chip;

(2) data export step, comprise following sub-step:

(2.1) what calculate intersection region parts boundary line on the left side with part boundary line on the right side the distance of then trying to achieve between two separatrix is wherein i=0,1,2;

(2.2) non-homogeneous perception is carried out to the threshold voltage of flash chip:

(2.2.1) precision determines perception frequency n in each threshold voltage intersection region as requested;

(2.2.2) the perception number of times in left and right half region of each threshold voltage intersection region is determined according to perception frequency n

(2.2.3) calculate according to the perception number of times m in left and right half region of each threshold voltage intersection region the position needing sense voltage in left and right half region;

(2.2.4) according to the sense voltage position read threshold voltages obtained;

(2.3) log-likelihood ratio LLR is calculated according to the threshold voltage of non-homogeneous perception;

(2.4) according to LLR and LDPC check matrix Q, decoding and error is carried out to the code word C of write flash chip in step (1).

2. the method for claim 1, is characterized in that, calculating in left and right half region according to the perception number of times m in left and right half region of each threshold voltage intersection region in described step (2.2.3) needs the position of sense voltage specifically to comprise:

Geometric Sequence obtains the threshold voltage needing perception to use common ratio to be q, wherein q > 1, and the left-half for intersection region needs the number of times of perception to be m, then the relative distance of perception point From Left circle chosen is respectively 1, q, q ²... q ^m-1, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively , wherein S _irepresent the distance of each intersection region, i=0,1,2.

3. method as claimed in claim 1 or 2, is characterized in that, specifically according to following formula generated codeword C in described step (1):

C＝R×G (1)。

4. method as claimed in claim 1 or 2, it is characterized in that, what calculate intersection region in described step (2.1) parts boundary line on the left side with part boundary line on the right side be specially:

P ⁽ⁱ⁾x () is i-th threshold voltage gaussian probability distribution function, M is a ratio, determines according to intersection region size.Threshold voltage Gaussian probability functions is substituted in above formula and obtains

According to the average μ of known i-th threshold voltage Gaussian probability functions _iand variance with ratio M, by solution formula above (3) and (4), that obtains each intersection region parts boundary line on the left side with part boundary line on the right side

5. method as claimed in claim 1 or 2, is characterized in that, the LLR calculating i-th according to the threshold voltage of non-homogeneous perception in described step (2.3) is specially:

Wherein V _irepresent sense voltage value, A _irepresent the regional extent value at sense voltage place, P ⁽ⁱ⁾x () represents i-th threshold voltage perception Gaussian function.

6. method as claimed in claim 1 or 2, it is characterized in that, described step (2.4) specifically comprises:

(2.4.1), the LLR information that step (2.3) obtains is input in the variable node in check matrix Q, as the initial information of LDPC decoding;

(2.4.2), in check matrix Q each variable node and check-node carry out iterative processing decoding information each other, only at the inter-node transmission of variable node and check-node annexation each other in check matrix Q;

If (2.4.3) decoded the LDPC decoding vector C' that obtains equal with the code word C of input or when reaching maximum iterations LDPC decode procedure terminate.

7. a solid-state disk flash chip threshold voltage sensory perceptual system, is characterized in that, described system comprises load module, output module and flash chip memory module, wherein:

Described load module, comprises LDPC coding module, described LDPC coding module, generates n-bit LDPC code word C, wherein n > k for carrying out coding to k-bit raw data according to LDPC generator matrix;

Described flash chip memory module, for storing LDPC code word C;

Described output module comprises non-homogeneous voltage sensing module, LLR computing module and LDPC decoding module, wherein:

Described non-homogeneous voltage sensing module, non-homogeneous threshold voltage sense operation is carried out to the flash chip in flash chip memory module, described non-homogeneous threshold voltage sense operation carries out non-homogeneous threshold voltage perception to three threshold voltages intersection window areas, do not carry out voltage sense operation outside threshold voltage intersection window;

Described LLR computing module, for calculating corresponding LLR ratio according to the threshold voltage obtained;

LDPC decoding module, for carrying out iterative decoding operation according to the LLR ratio obtained and LDPC check matrix, obtaining LDPC output codons C', correcting the mistake of code word in flash chip memory module.

8. method as claimed in claim 7, it is characterized in that, described non-homogeneous voltage sensing module comprises perception number of times computing module, perceived position computing module and threshold voltage sensing module, wherein:

Described perception number of times computing module, for according to perception frequency n in each threshold voltage intersection region, determines the perception number of times in left and right half region of each threshold voltage intersection region

Described perceived position computing module, the perception number of times m for left and right half region of each threshold voltage intersection region calculated according to perception number of times computing module calculates the position needing sense voltage in left and right half region;

Described threshold voltage sensing module, for the sense voltage position read threshold voltages calculated according to perceived position computing module.

9. method as claimed in claim 8, is characterized in that, described perceived position computing module specifically for:

Geometric Sequence obtains the threshold voltage needing perception to use common ratio to be q, wherein q > 1, and the left-half for intersection region needs the number of times of perception to be m, then the relative distance of perception point From Left circle chosen is respectively 1, q, q ²... q ^m-1, note W=1+q+...+q ^m-1, then the absolute distance of the sense voltage positional distance left margin chosen is respectively , wherein S _irepresent the distance of each intersection region, i=0,1,2.