CN104270587A - Two-phase driven CCD double-channel quick reading structure - Google Patents
Two-phase driven CCD double-channel quick reading structure Download PDFInfo
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- CN104270587A CN104270587A CN201410568537.8A CN201410568537A CN104270587A CN 104270587 A CN104270587 A CN 104270587A CN 201410568537 A CN201410568537 A CN 201410568537A CN 104270587 A CN104270587 A CN 104270587A
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Abstract
The invention provides a two-phase driven CCD double-channel quick reading structure. The two-phase driven double-channel quick reading structure comprises a CCD unit and a CCD reading structure, wherein the CCD unit and the CCD reading structure are integrated in a CMOS circuit through the on-chip integration technology; the CCD reading structure comprises an image element, two reading transfer gates connected with the image element, two transfer channels connected with the two reading transfer gates and an output node connected with the two transfer channels. The two-phase driven CCD double-channel quick reading structure is characterized in that each transfer channel is composed of a plurality of transfer units; the transfer units are manufactured through the secondary polycrystalline silicon process compatible with the CMOS process, so that the transfer channels form a two-phase driven signal transfer control structure. The two-phase driven CCD double-channel quick reading structure has the advantages of reducing the complexity of process implementation, optimizing a signal reading structure, facilitating improving of process compatibility of on-chip integration of a CCD in the CMOS circuit and improving the overall reliability of devices and signal reading performance.
Description
Technical field
The present invention relates to a kind of line array CCD sensing technique, particularly relate to the quick reading out structure of a kind of two-phase-region casting CCD binary channels.
Background technology
Charge coupled device ccd (Charge Coupled Device) is a kind of miniature image transducer, itself have the functions such as the storage of photoelectric converting function and signal, transfer, conversion concurrently, the image that can will distribute in spatial domain, be converted into the signal of telecommunication of the discrete distribution in temporally territory, there is highly sensitive, the advantage such as spectral response is wide, dynamic range is large, pixel dimension is little, geometric accuracy is high, good imaging quality, anti-vibration, radioresistance.
Linear array Type C CD, as the important branch of in CCD type, is used widely in the system such as bar code recognition, spectral detection, graph scanning, contactless dimensional measurement in industrial detection and safety verification field.Line array CCD has very wide spectrographic detection scope, the line array CCD of special purpose, can near ultraviolet near infrared spectral region in have good response.
The linear array Type C CD that tradition two-phase-region casting binary channels reads generally adopts three times or four polysilicon grating structures, and technique realizes comparatively complicated on the one hand, and its reliability and noiseproof feature have certain loss; On the other hand, because CMOS technology is generally secondary polysilicon process, when by time integrated on the CCD of three times or four times polysilicon grating structures in cmos circuitry sheet, there is processing compatibility difference, problem that surface smoothness is low.
Summary of the invention
For the problem in background technology, the present invention proposes the quick reading out structure of a kind of two-phase-region casting CCD binary channels, comprise and adopt integrated technology on sheet to be integrated in CCD unit in cmos circuit and CCD reading out structure, described CCD reading out structure comprise pixel, be connected with pixel two read TG transfer gate, read two transfering channels that TG transfer gate is connected with two, the output node be connected with two transfering channels; Its innovation is: described transfering channel is made up of multiple buanch unit, and described buanch unit adopts and makes with the secondary polysilicon process of CMOS technology compatibility, makes transfering channel form the signal transfer control structure of two-phase-region casting.
Control principle of the present invention is similar to prior art, namely export two phase transfer control levels by certain sequential to multiple buanch unit outwards to be exported to make the electric charge in pixel by transfering channel and output node, core of the present invention is to adopt with the secondary polysilicon process of CMOS technology compatibility to form the buanch unit on transfering channel, thus processing compatibility when making CCD integrated on sheet is in cmos circuitry improved, and improves device surface evenness.
Preferably, described output node is connected with two transfering channels respectively by two Output transfer grid, wherein, first Output transfer grid are connected with the first transfering channel, second Output transfer grid are connected with the second transfering channel, the control part of the first Output transfer grid is connected with signal end one, and the control part of the second Output transfer grid is connected with signal end two; Multiple buanch unit in described transfering channel is alternately connected with signal end one and signal end two; Buanch unit adjacent with the first Output transfer grid on first transfering channel is connected with signal end two; Buanch unit adjacent with the second Output transfer grid on second transfering channel is connected with signal end one.
Advantageous Effects of the present invention is: reduce complexity that technique realizes, optimize signal reading out structure, be conducive to improving CCD integrated on sheet in cmos circuitry time processing compatibility, the global reliability and the signal that improve device read performance.
Accompanying drawing explanation
Fig. 1, structural representation of the present invention;
The schematic diagram of Fig. 2, existing two-phase-region casting CCD binary channels reading out structure;
In figure, each title corresponding to mark is respectively: pixel 1, read TG transfer gate 2, output node 3, buanch unit 4, potential well mutually 5, potential barrier mutually 6, signal end one POLY1, signal end two POLY2, signal end three POLY3, TG transfer gate TG.
Concrete enforcement execution mode
The quick reading out structure of a kind of two-phase-region casting CCD binary channels, comprise and adopt integrated technology on sheet to be integrated in CCD unit in cmos circuit and CCD reading out structure, described CCD reading out structure comprise pixel 1, be connected with pixel 1 two read TG transfer gate 2, read two transfering channels that TG transfer gate 2 is connected with two, the output node 3 be connected with two transfering channels; Its innovation is: described transfering channel is made up of multiple buanch unit 4, and described buanch unit 4 adopts and makes with the secondary polysilicon process of CMOS technology compatibility, makes transfering channel form the signal transfer control structure of two-phase-region casting.
Further, described output node 3 is connected with two transfering channels respectively by two Output transfer grid OTG, wherein, first Output transfer grid OTG is connected with the first transfering channel, second Output transfer grid OTG is connected with the second transfering channel, the control part of the first Output transfer grid OTG is connected with signal end one POLY1, and the control part of the second Output transfer grid OTG is connected with signal end two POLY2; Multiple buanch units 4 in described transfering channel are alternately connected with signal end one POLY1 and signal end two POLY2; Buanch unit 4 adjacent with the first Output transfer grid OTG on first transfering channel is connected with signal end two POLY2; Buanch unit 4 adjacent with the second Output transfer grid OTG on second transfering channel is connected with signal end one POLY1.
Claims (2)
1. the quick reading out structure of two-phase-region casting CCD binary channels, comprise and adopt integrated technology on sheet to be integrated in CCD unit in cmos circuit and CCD reading out structure, described CCD reading out structure comprise pixel (1), be connected with pixel (1) two read TG transfer gate (2), read two transfering channels that TG transfer gate (2) is connected with two, the output node (3) be connected with two transfering channels; It is characterized in that: described transfering channel is made up of multiple buanch unit (4), described buanch unit (4) adopts and makes with the secondary polysilicon process of CMOS technology compatibility, makes transfering channel form the signal transfer control structure of two-phase-region casting.
2. the quick reading out structure of two-phase-region casting CCD binary channels according to claim 1, it is characterized in that: described output node (3) is connected with two transfering channels respectively by two Output transfer grid (OTG), wherein, first Output transfer grid (OTG) are connected with the first transfering channel, second Output transfer grid (OTG) are connected with the second transfering channel, the control part of the first Output transfer grid (OTG) is connected with signal end one (POLY1), and the control part of the second Output transfer grid (OTG) is connected with signal end two (POLY2); Multiple buanch units (4) in described transfering channel are alternately connected with signal end one (POLY1) and signal end two (POLY2); Buanch unit (4) adjacent with the first Output transfer grid (OTG) on first transfering channel is connected with signal end two (POLY2); Buanch unit (4) adjacent with the second Output transfer grid (OTG) on second transfering channel is connected with signal end one (POLY1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410568537.8A CN104270587A (en) | 2014-10-23 | 2014-10-23 | Two-phase driven CCD double-channel quick reading structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410568537.8A CN104270587A (en) | 2014-10-23 | 2014-10-23 | Two-phase driven CCD double-channel quick reading structure |
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| CN104270587A true CN104270587A (en) | 2015-01-07 |
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| CN201410568537.8A Pending CN104270587A (en) | 2014-10-23 | 2014-10-23 | Two-phase driven CCD double-channel quick reading structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110610955A (en) * | 2019-09-09 | 2019-12-24 | 中国电子科技集团公司第四十四研究所 | CCD grid structure for reducing overlapping coupling |
| CN111355906A (en) * | 2020-03-13 | 2020-06-30 | 中国电子科技集团公司第四十四研究所 | Image sensor based on CCD and CMOS integrated technology |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5449908A (en) * | 1993-12-30 | 1995-09-12 | Texas Instruments Incorporated | Hybrid CCD imaging |
| US20040233314A1 (en) * | 2003-05-20 | 2004-11-25 | Toshihiro Kuriyama | Solid-state imaging apparatus and manufacturing method thereof |
| CN103400847A (en) * | 2013-08-14 | 2013-11-20 | 中国电子科技集团公司第四十四研究所 | Technology for manufacturing CCD secondary or more than secondary polycrystalline silicon |
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2014
- 2014-10-23 CN CN201410568537.8A patent/CN104270587A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5449908A (en) * | 1993-12-30 | 1995-09-12 | Texas Instruments Incorporated | Hybrid CCD imaging |
| US20040233314A1 (en) * | 2003-05-20 | 2004-11-25 | Toshihiro Kuriyama | Solid-state imaging apparatus and manufacturing method thereof |
| CN103400847A (en) * | 2013-08-14 | 2013-11-20 | 中国电子科技集团公司第四十四研究所 | Technology for manufacturing CCD secondary or more than secondary polycrystalline silicon |
Non-Patent Citations (2)
| Title |
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| 孙希任: "《航空传感器实用手册》", 30 June 1995, 机械工业出版社 * |
| 孙志君: "新的高密度四线二行线阵CCD传感器", 《半导体光电》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110610955A (en) * | 2019-09-09 | 2019-12-24 | 中国电子科技集团公司第四十四研究所 | CCD grid structure for reducing overlapping coupling |
| CN111355906A (en) * | 2020-03-13 | 2020-06-30 | 中国电子科技集团公司第四十四研究所 | Image sensor based on CCD and CMOS integrated technology |
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Application publication date: 20150107 |