CN102589719A

CN102589719A - Reading circuit of silicon substrate focal plane device

Info

Publication number: CN102589719A
Application number: CN2012100458627A
Authority: CN
Inventors: 张康
Original assignee: Individual
Current assignee: Individual
Priority date: 2012-02-28
Filing date: 2012-02-28
Publication date: 2012-07-18

Abstract

The invention relates to a reading circuit of a silicon substrate focal plane device. The reading circuit includes a focal plane array circuit, a vertical shift register, a group selection shift register, a multichannel selective switch and other main parts. The reading method has the following advantages: as the designed reading circuit structure adopts a novel reading mode, the number of amplifiers and integrators required at the back end of the circuit is greatly reduced, thus reducing the complexity of the reading circuit and greatly reducing the number of pins of the chips of the reading circuit; the reading circuit structure also avoids errors of read voltage signals caused by inconsistency in the device manufacturing process; and the circuit structure can be applied below the focal plane with silicon as the substrate material to serve as the reading circuit structure of the circuit, has strong transportability and is suitable for design of the reading circuits of the arrays on any scale.

Description

A kind of sensing circuit of silica-based focal plane device

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Technical field

A kind of sensing circuit of silica-based focal plane device belongs to electronic technology field, is specifically related to the design of the reading circuit structure of silica-based focal plane device.

Background technology

Infrared technique is owing to military tight demand traction is able to develop rapidly.Infrared focal plane array is the core component of infrared imaging system, and it is made up of infrared eye and sensing circuit two parts.Sensing circuit is that digital-to-analogue is mixed extensive MOS integrated circuit, and its function is the faint infrared electric signal of detector induction to be carried out the parallel/serial row conversion of pre-process (like integration, amplification, filtering and sampling/maintenance etc.) and signal.Sensing circuit mainly contains two types of CCD and CMOS, and the CMOS sensing circuit becomes the main developing direction of current sensing circuit because of its numerous advantage.

After integrated circuit had experienced PMOS, NMOS technology, the CMOS technology had become the main flow technology of current integrated circuit.Except same high density, low power capabilities, the CMOS integrated circuit also has superiority than CCD at low-work voltage, capability of resistance to radiation, pixel data random access aspects such as (can on the focal plane, window arbitrarily).The more important thing is; It is a kind of general silicon process technology, and its design specifications is highly standardized, can be on same silicon chip integrated various signal Processing fit the digital function parts; Like A/D, control timing logic etc., possibility is provided for realizing monolithic system (System on Chip).In addition,, make circuit structure not only become simpler, also make design become more flexible because of pipe of the N on the same silicon chip and the complementation of P pipe polarity.In view of like this many advantages, the arrival in CMOS readout circuit for IRFPA epoch has been exactly the thing that follows a well mapped-out plan.

The U.S. in 1993 is Newire Inc.'s report T16 * 64,64 * 128,240 * 336 yuan uncooled microbolometer infrared focal plane array suddenly; This array is that micro-metering bolometer infrared eye and CMOS sensing circuit are prepared on the same silicon base; Be that the CMOS sensing circuit is integrated on the silicon base; This makes the signal from each list～micro-metering bolometer infrared eye can both obtain measurement separately, in each frame, all signals can both be taken a sample.Sensing circuit is made up of high speed transistor switch under each pixel and multiplexer on every side, and multiplexer can call over each micro-metering bolometer via the row and column of metallic film.At present, five companies such as Santa Barbara Research Center, Lockheed Co., Boeing North American, Inc., Reaser benefactor department, AllianTechsystems company are own through obtaining the micro-metering bolometer transfer of technology licence of Newire Inc. suddenly.The non-refrigeration focal plane arrays (FPA) of 320 * 240 micro-metering bolometers of Newire Inc. has dropped into batch process suddenly.

But domestic technological level also is on the lower development level, and the fulfillment capability of circuit can not satisfy the needs of design, and this just makes that the development level of sensing circuit is lower.And domestic research to sensing circuit is less, and lacking ripe experience can use for reference, and the work of therefore carrying out this respect is highly significant.

Summary of the invention

The object of the present invention is to provide the method for designing of the sensing circuit of silica-based focal plane device.It is to do below the focal plane of backing material in the reading circuit structure of circuit to go that circuit structure of the present invention can be applied to silicon, and its portability is very strong, is suitable for the design of the sensing circuit of any scale array.Be characterized in:

With silicon is the reading circuit structure of the focal plane circuit of backing material, comprising:

(1) focal plane array column circuits: accomplish the conversion of photosignal;

(2) vertical transfer register: produce row and select signal, be expert at and select under the control of signal, the pixel cell of gating delegation;

(3) group is selected shift register: produce the column selection signal, through the signal after the row choosing of several row of gating in multidiameter option switch;

(4) multidiameter option switch: export the pixel cell of gating according to certain rules.

For a M * N array, the output of N row pixel unit circuit is divided into L group, selects shift register to control wherein one group of gating by group, reads into the signal of this group in the multidiameter option switch circuit then and exports.

Adopt a kind of bridge architecture in the structure of array inside.R1, R2 are heat sink bolometer resistance; They do not change along with variation of temperature, R3 be optics shielding with reference to bolometer resistance, do not receive the influence of added infrared radiation; It is consistent with the temperature coefficient of detector resistance; R4 is a detector bolometer resistance, the variation that has a resistance because detector bolometer resistance is changed by the influence of infrared radiation, its temperature.

Control signal module vertical transfer register, group select shift register and multidiameter option switch to adopt d type flip flop to realize; The input of each d type flip flop is the output of upper level d type flip flop; The output of d type flip flop is used to control the grid of the MOS of corresponding row simultaneously, and the d type flip flop of each module uses synchronous clock.Begin to import the initial input of a pulse signal, and control gating first row or first row with this as first d type flip flop.

Advantage of the present invention has:

(1) adopts this circuit structure can reduce the number of amplifier and integrator, reduced the complicacy of sensing circuit;

(2) adopt this circuit structure to avoid because the error that the inconsistency that produces in the device manufacturing processes is brought to the voltage signal of reading;

(3) power consumption that the domain structure of circuit design is compact and the circuit generation is lower according to this;

(4) adopt bridge architecture can eliminate the still image The noise as much as possible;

(5) adopt the number of pins of the readout circuit chip of this circuit realization to be reduced greatly;

(6) adopt this circuit structure can realize the follow-up signal processing circuits preferably.

Description of drawings

The system chart of Fig. 1 chip part;

Fig. 2 readout circuit chip partial graph;

Fig. 3 bridge architecture circuit diagram;

The circuit diagram of Fig. 4 shift register;

The circuit diagram of Fig. 5 d type flip flop;

The sequential chart of Fig. 6 sensing circuit.

Embodiment

Through embodiment the present invention is done below and further describes:

With 160 * 120 array infrared focal plane read-out circuits is the technical solution of this invention of example explanation:

Referring to Fig. 1, be the reading circuit structure of the focal plane circuit of backing material with silicon, comprising:

As shown in Figure 2: the playback mode of employing is row gate logic each gating delegation under the control of clock signal, selects shift register control to read n signal in each row with group simultaneously at every turn, and all row need m to organize and select shift register could read out first all pixels of being listed as (m * n=120) altogether like this; When first group is selected the shift register gating; Gating the n row of front, like this with regard to gating this n pixel, subsequently second; The 3rd; Second group of n of gating was individual when the 4th group selected the shift register gating, and the 3rd group n, the 4th group of n pixel; Up to all pixels of first row all after the gating, will pass through also gating after that multi-way switch controls is that which pixel reads out from chip.The row gate logic is gating second row under next time clock control ... So going on all pixels like this can gating.Pixel between each group is serial output, and the benefit of doing like this has: the number of amplifier and integrator can be reduced in (1), has reduced the complicacy of sensing circuit; (2) avoided because the compact and low power consumption of error (3) domain that the inconsistency that produces in the device manufacturing processes is brought to the voltage signal of reading.Unfavorable have: (1) makes the time of reading whole signals elongated, and the image display speed is slack-off; (2) array pixel far away is because the elongated signal errors of these pixels that possibly make in the path of process becomes big.The bandwidth of (3) reading is very high will to increase total noise.Be again line output also simultaneously for n pixel in each group; The benefit of doing like this is the more integral time of integrator to the back; Can reduce so again and read bandwidth, and then reduce total noise, could make the back when image shows, can better demonstrate image.At such string and in combining,, obtain well compromise according to the needs of side circuit.

Fig. 3 is the bridge-type sensing circuit of micro-metering bolometer detector, can improve the low-frequency stability of detector system output signal.The work of bridge is to use the responsive differential signal to the responsive output signal of bridge leg resistance variations that produces at two bridge legs of surveying mutually.Use this sensing circuit can measure the millionth variation of resistance on the bridge.Its principle is that row on the left side are listed as as a reference, fixedly is connected on the negative input end of differential amplifier always.The right is our focal plane arrays (FPA).R1, R2 are heat sink bolometer resistance; They do not change along with variation of temperature, R3 be optics shielding with reference to bolometer resistance, do not receive the influence of added infrared radiation; It is consistent with the temperature coefficient of detector resistance; R4 is a detector bolometer resistance, the variation that has a resistance because detector bolometer resistance is changed by the influence of infrared radiation, its temperature.The lower limit of detector resistance be by in readout because the processing power decision of the resistance variations that causes of heating, its upper limit is that the noise that the noise current of input causes increases decision, it depends on admissible noise level.Their output all is sent to be carried out difference and reads in the differential amplifier.Its objective is and eliminate the still image The noise as much as possible (fixed pattern noise is owing to multiple reasons such as material and manufacturing process; Cause that deviation has appearred in the performance of each pixel circuit in the array; Even the identical signal of each pixel input; The size of its output signal is also different, has promptly produced the distinctive fixed pattern noise of array circuit.）

Fig. 4 and Fig. 5 show the concrete design diagram of shift register.Under the control of CLK synchronizing signal; Import a pulse signal HSY; Realize first d type flip flop output of gating Shiftl at the negative edge of clock, export shift2 at second d type flip flop of negative edge of next clock afterwards ... Principle has realized the function of displacement according to this.

Fig. 6 shows the sequential chart of circuit.After pulse signal hsyl arrived, hshiftl output high level when the negative edge of clkl arrives was at next negative edge hshift2 output high level ... Up to hshiftM output high level.The cycle of pulse signal hsy2 is the duration of the high level of hshiftl, gshiftl output high level when the negative edge of clk2 arrives ... Up to gshiftN output high level.

Claims

1. the sensing circuit of a silica-based focal plane device is characterized in that, comprising:

1) focal plane array column circuits: accomplish the conversion of photosignal;

2) vertical transfer register: produce row and select signal, be expert at and select under the control of signal, the pixel cell of gating delegation;

3) group is selected shift register: produce the column selection signal, through the signal after the row choosing of several row of gating in multidiameter option switch;

4) multidiameter option switch: export the pixel cell of gating according to certain rules;

Wherein, the work schedule of said circuit is following: circuit follow-up work period during with a frame, be meant during a frame that pixel cells all in the focal plane arrays (FPA) all will carry out one time gating; Circuit is at first gone to select from the first capable delegation to the end and is carried out gating successively; Row at each row selects the signal valid period, and array is divided into several groups to the pixel of this delegation according to certain rules, and the gating that carries out is successively then read;

Described control signal module vertical transfer register, group select shift register and multidiameter option switch to adopt d type flip flop to realize; The input of each d type flip flop is the output of upper level d type flip flop; The output of d type flip flop is used to control the grid of the metal-oxide-semiconductor of corresponding row simultaneously, and the d type flip flop of each module uses synchronous clock; Begin to import the initial input of a pulse signal, and control gating first row or first row with this as first d type flip flop;

And, in focal plane arrays (FPA), also adopted bridge circuit structure, wherein R1, R2 are heat sink bolometer resistance; They do not change along with variation of temperature, R3 be optics shielding with reference to bolometer resistance, do not receive the influence of added infrared radiation; It is consistent with the temperature coefficient of detector resistance; R4 is a detector bolometer resistance, the variation that has a resistance because detector bolometer resistance is changed by the influence of infrared radiation, its temperature.