CN104267580A - Mask plate, array substrate and preparation method thereof, and display device - Google Patents
Mask plate, array substrate and preparation method thereof, and display device Download PDFInfo
- Publication number
- CN104267580A CN104267580A CN201410453914.3A CN201410453914A CN104267580A CN 104267580 A CN104267580 A CN 104267580A CN 201410453914 A CN201410453914 A CN 201410453914A CN 104267580 A CN104267580 A CN 104267580A
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- light
- array substrate
- mask plate
- thin film
- film transistor
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- 239000000758 substrate Substances 0.000 title claims abstract description 45
- 238000002360 preparation method Methods 0.000 title abstract description 12
- 239000010409 thin film Substances 0.000 claims description 34
- 239000010408 film Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 9
- 239000012528 membrane Substances 0.000 claims description 4
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical group O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 claims description 3
- 229910000423 chromium oxide Inorganic materials 0.000 claims description 3
- GALOTNBSUVEISR-UHFFFAOYSA-N molybdenum;silicon Chemical compound [Mo]#[Si] GALOTNBSUVEISR-UHFFFAOYSA-N 0.000 claims description 3
- 239000013078 crystal Substances 0.000 abstract 4
- 230000003313 weakening effect Effects 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Landscapes
- Thin Film Transistor (AREA)
Abstract
The invention provides a mask plate, an array substrate and a preparation method thereof, and a display device, belonging to the technical field of display and being capable of solving the problem that a conductive channel region of an active layer is broken when a source electrode and a drain electrode of a film crystal transistor are prepared by an existing mask plate. The mask plate provided by the invention is used for forming the source electrode and the drain electrode of the film crystal transistor, and comprises a first light-transmitting region corresponding to the position of a conductive channel region of the active layer of the film crystal transistor on a base plate and first non-light-transmitting regions corresponding to positions of the source electrode and the drain electrode of the film crystal transistor, wherein a semi-transparent film layer band is arranged at a position in which the first light-transmitting region is located and used for weakening the light intensity of the first light-transmitting region during exposure. The mask plate can be used for preparing the array substrate.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to a mask plate, an array substrate, a preparation method of the array substrate and a display device.
Background
At present, Liquid Crystal Displays (LCD) are the mainstream products in the market due to their excellent performance and mature technology. With the development of display technology, high transmittance, large size, low power consumption, and low cost have become the development direction of future display field.
In the production process of the liquid crystal panel, a single slit exposure (SSM) process is an advanced technology, and compared with a traditional gray scale mask (GTM) or semi-transparent mask (HTM) technology, the size of a conductive channel of an active layer of a thin film transistor formed by exposure is smaller, so that the size of the thin film transistor is reduced, the aperture ratio of the display panel is improved, and Ion is improved.
As shown in fig. 1 to 4, the inventors found that at least the following problems exist in the prior art: as shown in fig. 3, after an active layer having an active layer conductive channel 2 with a smaller size is formed by a single slit exposure process, a source drain metal film 1 is formed on a substrate, a photoresist layer 3 (negative photoresist) is coated on the source drain metal film, and then the photoresist layer 3 is exposed by using a mask plate (as shown in fig. 1 and 2) corresponding to the source and drain electrodes, since light irradiated onto the mask plate corresponding to the source and drain electrodes is not transmitted (i.e. a first non-transmission region 10 on the mask plate) during exposure, and a slit (i.e. a first transmission region 20) is present at the mask plate corresponding to the conductive channel region of the active layer, light irradiated onto the source and drain electrodes 11 and 12 is diffracted, and light irradiated onto the photoresist at the conductive channel region from the first transmission region 20) causes stronger light at the conductive channel region (e. a light intensity curve 4 shown in fig. 3), the photoresist in this region is made to be thin, which in turn causes the active layer conductive channel to be etched while the source electrode 111 and the drain electrode 112 are etched, resulting in the fracture of the active layer conductive channel 2 (the location where the filled points are sparse in fig. 4, i.e. the location where the middle of the conductive channel is etched too early).
Disclosure of Invention
The technical problem to be solved by the invention is to provide a mask plate, an array substrate, a preparation method thereof and a display device, aiming at the problems existing in the existing mask plate, wherein the mask plate can avoid the damage to a conductive channel region of an active layer while forming a source and a drain by composition.
The technical scheme adopted for solving the technical problem is that the mask plate is used for forming a source electrode and a drain electrode of a thin film transistor, and comprises a first light-transmitting area corresponding to the position of a conductive channel area of an active layer of the thin film transistor on a substrate and a first non-light-transmitting area corresponding to the position of the source electrode and the drain electrode of the thin film transistor; wherein,
and a semitransparent film layer belt is arranged at the position of the first light transmitting area of the mask plate and is used for reducing the light intensity of the first light transmitting area during exposure.
The first non-light-transmitting area of the mask plate can not transmit light, but the first non-light-transmitting area is adjacent to the first light-transmitting area, so that light irradiates the first non-light-transmitting area and is diffracted to transmit the light from the first light-transmitting area.
Preferably, the width of the semi-permeable membrane layer strip is in a range of 1% to 99% of the width of the first light-transmitting region.
Preferably, the semi-permeable membrane layer strip is a chromium oxide film or a molybdenum silicon film.
Preferably, the mask plate further includes a second non-transmissive region corresponding to a position of the data line.
The technical scheme adopted for solving the technical problem is a preparation method of the array substrate, which comprises the step of forming a source electrode and a drain electrode on a substrate on which an active layer of a thin film transistor is formed, wherein the source electrode and the drain electrode are formed by exposing any one of the mask plates.
The mask plate is adopted in the preparation method of the array substrate, so that the prepared array substrate has better performance.
Preferably, the source electrode and the drain electrode of the thin film transistor are formed and simultaneously a pattern including a data line is formed.
The technical scheme adopted for solving the technical problem of the invention is an array substrate, and the array substrate is prepared by the preparation method.
The array substrate is prepared by the method, so the array substrate has better performance.
The technical scheme adopted for solving the technical problem of the invention is a display device which comprises the array substrate.
The display device comprises the array substrate, so that the cost of the display device is reduced, and the performance is better.
Drawings
FIG. 1 is a schematic diagram of a conventional mask plate for manufacturing a source and a drain of a thin film transistor;
FIG. 2 is a cross-sectional view A-A of FIG. 1;
FIG. 3 is a schematic diagram of a conventional photoresist coated on a source/drain metal film when forming a source/drain electrode;
FIG. 4 is a schematic diagram of a conventional method for forming a source and a drain;
fig. 5 is a schematic view of a mask plate for preparing a source and a drain of a thin film transistor in embodiment 1 of the present invention;
FIG. 6 is a cross-sectional view B-B of FIG. 3;
fig. 7 is a schematic view of a photoresist coated on a source-drain metal film when forming a source and a drain according to embodiments 1 and 2 of the present invention;
fig. 8 is a schematic diagram of forming source and drain electrodes according to embodiments 1 and 3 of the present invention.
Wherein the reference numerals are: 1. a source drain metal film; 111. a source electrode; 112. a drain electrode; 2. an active layer conductive channel; 3. a photoresist layer; 4. a light intensity curve; 10. a first non-light-transmitting region; 11. representing the position corresponding to the source electrode on the mask plate; 12. representing the position corresponding to the drain electrode on the mask plate; 20. a first light-transmitting region; 21. a translucent film layer tape.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Example 1:
as shown in fig. 5 and 6, the present embodiment provides a mask blank for forming the source electrode 111 and the drain electrode 112 of the thin film transistor, the mask blank comprising a first light-transmitting region 20 corresponding to the position of the conductive channel of the active layer of the thin film transistor on the substrate and a first non-light-transmitting region 10 corresponding to the position of the source electrode 111 and the drain electrode 112 of the thin film transistor; wherein, a semi-transparent film layer strip 21 is arranged at the position of the first light-transmitting area 20 of the mask plate and is used for reducing the light intensity of the first light-transmitting area during exposure.
It should be noted that the active layer of the thin film transistor includes a source contact region, a drain contact region, and an active layer conductive channel 2 located between the source and drain contact regions; the source electrode of the thin film transistor is connected with the active layer through the source electrode contact region, and the drain electrode of the thin film transistor is connected with the active layer through the drain electrode contact region. Accordingly, the mask for forming the source and the drain includes a first non-transmissive region 10 corresponding to the source 111 and the drain 112 (including a position 11 corresponding to the source on the mask and a position 12 corresponding to the source on the mask), and a first transmissive region 20 corresponding to the active layer conductive channel 2 of the active layer, and the position which can transmit light except for the first transmissive region 20 in the mask of the present embodiment is a second transmissive region.
Specifically, as shown in fig. 7, a source/drain metal thin film 1 is formed on a substrate on which an active layer of a thin film transistor is formed, and a photoresist layer 3 (the material of the photoresist layer is a negative photoresist) is coated, the photoresist layer 3 is exposed through a mask plate of this embodiment, light cannot penetrate through the position of a first non-transparent region 10 of the mask plate, but since the first non-transparent region 10 is adjacent to a first transparent region 20, light is irradiated on the first non-transparent region 10 and diffracted to penetrate through the first transparent region 20, whereas in the first transparent region 20 of the mask plate of this embodiment, a semi-transparent film layer strip 21 is provided, so that the intensity of light irradiated on the region can be weakened (a light intensity curve 4 is shown in fig. 7), thereby preventing the photoresist layer thickness of the active layer conductive channel 2 from being thinned due to strong light in the prior art, and further preventing the active layer conductive channel 2 from being etched too early in the etching process, and the active layer conductive channel 2 is broken.
In this embodiment, the width of the translucent film layer strip 21 is preferably in the range of 1% to 99% of the width of the first light-transmitting area, and this range can be specifically set according to actual conditions; the translucent film layer strip 21 is preferably a chromium oxide film or a molybdenum silicon film, but may be a translucent film made of other materials.
The mask plate in this embodiment further includes a second non-transmissive region (not shown) corresponding to the position of the data line. Therefore, the data lines can be formed while the source electrode 111 and the drain electrode 112 of the thin film transistor are formed by the mask plate of the embodiment, so that the production cost of the array substrate can be saved, and the production efficiency can be improved.
Example 2:
as shown in fig. 7 and 8, the present embodiment provides a method for manufacturing an array substrate, which includes a step of forming a source electrode 111 and a drain electrode 112 on a substrate on which an active layer of a thin film transistor is formed, wherein the source electrode 111 and the drain electrode 112 are formed by exposing through a mask plate of any one of embodiments 1.
Since the source 111 and the drain 112 of the thin film transistor of the array substrate of this embodiment are prepared by the preparation method of embodiment 1, the thin film transistor of the array substrate prepared by the preparation method of the array substrate has better performance, so that the array substrate has better performance.
Preferably, in the method for manufacturing the array substrate, the pattern including the data line is formed while the source electrode 111 and the drain electrode 112 of the thin film transistor are formed, that is, the source electrode 111, the drain electrode 112 of the thin film transistor and the data line are manufactured and formed by using the same mask plate, so that the manufacturing cost of the array substrate can be saved, and the production efficiency can be improved.
Of course, the manufacturing method of the array substrate further includes a step of forming a gate electrode, a gate line, a gate insulating layer of the thin film transistor, and a step of forming a pixel electrode and other known elements, which are not described in detail herein.
It should be noted that the thin film transistor in the array substrate of this embodiment may be a metal oxide thin film transistor, or may be a polysilicon or amorphous silicon thin film transistor. In this embodiment, only the mask plate in embodiment 1 is used to prepare the source electrode 111 and the drain electrode 112 of the thin film transistor, so that the active layer conductive channel 2 of the thin film transistor prepared by the preparation method of this embodiment is not easily broken, and thus the performance of the prepared array substrate is better.
Correspondingly, the embodiment also provides an array substrate, and the array substrate is prepared by the preparation method, so that the array substrate has better performance and lower cost.
Example 3:
the embodiment provides a display device, which comprises the array substrate. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
Since the display device of this embodiment includes the array substrate of embodiment 2, the performance is better, and the production cost is lower.
Of course, other conventional structures, such as a display driving unit, may also be included in the display device of the present embodiment.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (8)
1. A mask plate is used for forming a source electrode and a drain electrode of a thin film transistor and is characterized by comprising a first light-transmitting area corresponding to the position of a conductive channel area of an active layer of the thin film transistor on a substrate and a first non-light-transmitting area corresponding to the position of the source electrode and the drain electrode of the thin film transistor; wherein,
and a semitransparent film layer belt is arranged at the position of the first light transmitting area of the mask plate and is used for reducing the light intensity of the first light transmitting area during exposure.
2. The mask blank of claim 1, wherein the width of the semi-permeable membrane layer strip is in a range of 1% to 99% of the width of the first light-transmitting zone.
3. The mask blank according to claim 1, wherein the semi-permeable membrane layer is a chromium oxide film or a molybdenum silicon film.
4. The mask blank of claim 1, further comprising a second opaque region corresponding to a data line location.
5. A method for preparing an array substrate, which comprises the step of forming a source electrode and a drain electrode on a substrate on which an active layer of a thin film transistor is formed, wherein the source electrode and the drain electrode are formed by exposing through a mask plate according to any one of claims 1 to 4.
6. The method of claim 5, wherein a pattern including data lines is formed simultaneously with the source and drain electrodes of the thin film transistor.
7. An array substrate, wherein the array substrate is prepared by the method of claim 5 or 6.
8. A display device comprising the array substrate according to claim 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410453914.3A CN104267580A (en) | 2014-09-05 | 2014-09-05 | Mask plate, array substrate and preparation method thereof, and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410453914.3A CN104267580A (en) | 2014-09-05 | 2014-09-05 | Mask plate, array substrate and preparation method thereof, and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104267580A true CN104267580A (en) | 2015-01-07 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410453914.3A Pending CN104267580A (en) | 2014-09-05 | 2014-09-05 | Mask plate, array substrate and preparation method thereof, and display device |
Country Status (1)
| Country | Link |
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| CN (1) | CN104267580A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104793461A (en) * | 2015-04-20 | 2015-07-22 | 深圳市华星光电技术有限公司 | Mask plate for manufacturing of thin film transistor and thin film transistor manufactured by utilizing mask plate |
| CN106711154A (en) * | 2017-01-06 | 2017-05-24 | 合肥鑫晟光电科技有限公司 | Display substrate, display device and manufacturing method of display substrate |
| CN114038737A (en) * | 2021-08-17 | 2022-02-11 | 重庆康佳光电技术研究院有限公司 | Mask, light-emitting device and manufacturing method thereof |
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| CN102308256A (en) * | 2009-02-16 | 2012-01-04 | 大日本印刷株式会社 | Photomask and methods for manufacturing and correcting photomask |
| CN102478737A (en) * | 2010-11-22 | 2012-05-30 | 乐金显示有限公司 | Liquid crystal display device and method for manufacturing the same |
| CN102819180A (en) * | 2012-07-30 | 2012-12-12 | 京东方科技集团股份有限公司 | Gray-scale mask plate and columnar spacer formed by utilizing same |
| CN103383523A (en) * | 2012-05-02 | 2013-11-06 | Hoya株式会社 | Photomask, image transfer method and manufacturing method of flat panel display |
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2014
- 2014-09-05 CN CN201410453914.3A patent/CN104267580A/en active Pending
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| JP2007178649A (en) * | 2005-12-27 | 2007-07-12 | Dainippon Printing Co Ltd | Gray-scale mask |
| CN101013705A (en) * | 2006-02-03 | 2007-08-08 | 三星电子株式会社 | Thin film transistor substrate and method of manufacturing the same and mask for manufacturing thin film transistor substrate |
| CN101398611A (en) * | 2007-09-29 | 2009-04-01 | Hoya株式会社 | Graytone mask plate and and graytone mask, and methof for producing the same and pattern copying method |
| CN102308256A (en) * | 2009-02-16 | 2012-01-04 | 大日本印刷株式会社 | Photomask and methods for manufacturing and correcting photomask |
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| CN102819180A (en) * | 2012-07-30 | 2012-12-12 | 京东方科技集团股份有限公司 | Gray-scale mask plate and columnar spacer formed by utilizing same |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104793461A (en) * | 2015-04-20 | 2015-07-22 | 深圳市华星光电技术有限公司 | Mask plate for manufacturing of thin film transistor and thin film transistor manufactured by utilizing mask plate |
| CN106711154A (en) * | 2017-01-06 | 2017-05-24 | 合肥鑫晟光电科技有限公司 | Display substrate, display device and manufacturing method of display substrate |
| CN106711154B (en) * | 2017-01-06 | 2024-04-09 | 合肥鑫晟光电科技有限公司 | Display substrate, display device and manufacturing method of display substrate |
| CN114038737A (en) * | 2021-08-17 | 2022-02-11 | 重庆康佳光电技术研究院有限公司 | Mask, light-emitting device and manufacturing method thereof |
| CN114038737B (en) * | 2021-08-17 | 2022-08-26 | 重庆康佳光电技术研究院有限公司 | Mask plate using method, light-emitting device and manufacturing method thereof |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20150107 |
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