CN104253091A - A manufacturing method of a thin film transistor substrate - Google Patents
A manufacturing method of a thin film transistor substrate Download PDFInfo
- Publication number
- CN104253091A CN104253091A CN201310253860.1A CN201310253860A CN104253091A CN 104253091 A CN104253091 A CN 104253091A CN 201310253860 A CN201310253860 A CN 201310253860A CN 104253091 A CN104253091 A CN 104253091A
- Authority
- CN
- China
- Prior art keywords
- layer
- thin film
- film transistor
- photoresist layer
- base plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000000758 substrate Substances 0.000 title claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims abstract description 33
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 23
- 230000004888 barrier function Effects 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 81
- 239000012212 insulator Substances 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000010408 film Substances 0.000 claims description 3
- 238000003384 imaging method Methods 0.000 claims description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 2
- 229910003437 indium oxide Inorganic materials 0.000 claims description 2
- 239000011241 protective layer Substances 0.000 claims description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 2
- 229910001887 tin oxide Inorganic materials 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to a manufacturing method of a thin film transistor substrate. The method comprises: providing a substrate; sequentially forming a gate, a gate insulation layer, a semiconductor layer, an etch barrier layer, a transparent conductive layer and a metal layer on the substrate; providing a photoresist layer, which covers the metal layer and is exposed and developed by a photomask to generate a patterned photoresist layer, wherein a portion of the patterned photoresist layer that is close to the semiconductor layer is thicker than a portion thereof that is far away from the semiconductor layer; etching the metal layer until a part of the etch barrier layer is exposed; removing the remaining thinner part of the photoresist layer, in order to expose a part of the metal layer; etching the exposed metal layer to expose a part of the transparent conductive layer; and removing the photoresist layer.
Description
Technical field
The present invention relates to a kind of manufacture method of thin film transistor base plate.
Background technology
The manufacture method of existing thin film transistor base plate generally comprises following steps: step one: form gate metal layer; Step 2: form gate electrode; Step 3: form gate insulator; Step 4: form a semiconductor layer on this gate insulator; Step 5: form an etch stop layer on this semiconductor layer; Step 6: form a transparency conducting layer; Step 7: form a pixel electrode; Step 8: form source/drain electrode; Step 9: form the patterned layer of a passivation layer on this pixel electrode, source/drain electrode.
This thin film transistor base plate needs to adopt multiple tracks optical cover process, and optical cover process is usually comparatively complicated and cost is higher, thus makes manufacturing cost higher.
Summary of the invention
In view of this, the manufacture method that the simple thin film transistor base plate of a kind of processing procedure is provided is necessary.
A manufacture method for thin film transistor base plate, it comprises: provide a substrate; Form grid, gate insulator, semiconductor layer, etch stop layer, transparency conducting layer and metal level successively on the substrate; One photoresist layer is provided, this photoresist layer covers on the metal layer, a light shield is utilized to carry out exposure imaging to this photoresist layer, to form patterning photoresist layer, the part of this patterning photoresist layer adjacent semiconductor layers is thicker, part away from semiconductor layer is thinner, then etches metal level, until expose partially-etched barrier layer; Remove the photoresist layer that remaining thinner is divided, to expose partial metal layers; Etch being exposed to outer metal level, to expose this transparency conducting layer of part; And remove this photoresist layer.
In the manufacture method of above-mentioned thin film transistor base plate, the formation of source electrode, drain electrode and the formation of pixel electrode only need a photoresist layer, thus save the use of a photoresist layer, and processing procedure simplifies, and significantly reduces cost.Further, because transparency conducting layer is between metal level and gate insulator, therefore can the metallic element of barrier metal layer be diffused in gate insulator, thus the quality of improving product.
Accompanying drawing explanation
Fig. 1 to Fig. 7 is the generalized section of the manufacture method of the thin film transistor base plate that embodiment of the present invention provides.
Main element symbol description
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Fig. 1 is to the manufacture method that Figure 6 shows that thin film transistor base plate 100 that the embodiment of the present invention provides.The manufacture method of this thin film transistor base plate 100 comprises the steps:
Step one: refer to Fig. 1, provides a substrate 10.This substrate 10 is insulated substrate, and it can be glass, quartz or the insulating material such as ceramic.In the present embodiment, this substrate 10 is glass substrate.
Step 2: form grid 20, gate insulator 30, semiconductor layer 40, etch stop layer 50, transparency conducting layer 60 and metal level 70 on this substrate 10 successively.Wherein, this gate insulator 30 comprises silicon nitride and/or silica.This transparency conducting layer 60 is indium and tin oxide film (Indium Tin Oxide, ITO).This grid 20 is formed by etching.In the present embodiment, this semiconductor layer 40 is also formed by ablation, and it is island, and is positioned at directly over this grid 20.The material of this semiconductor layer 40 comprises amorphous oxide semi-conducting material (Amorphous Oxide Semiconductor, AOS).
Step 3: refer to Fig. 2 and Fig. 3, provides a photoresist layer, and this photoresist layer covers above this metal level 70.Afterwards, a light shield (not shown) is utilized to carry out exposure imaging to photoresist layer 80, to form patterning photoresist layer 80, the part of this patterning photoresist layer 80 adjacent semiconductor layers 40 is thicker, part away from semiconductor layer 40 is thinner, again this metal level 70 is etched, until expose partially-etched barrier layer 50.In the present embodiment, this light shield is halftoning site light shield (Halftone mask).Outside the part be positioned at above this semiconductor layer 40 of this metal level 70 is exposed to, the part be positioned at above this semiconductor layer 40 is etched, thus makes outside partially-etched barrier layer 50 is exposed to.
Step 4: refer to Fig. 4, removes the patterning photoresist layer 80 that remaining thinner is divided, to expose partial metal layers 70.In the present embodiment, part residual graph patterning photoresist layer 80 is removed in the mode of dry ecthing.
Step 5: please also refer to Fig. 5, etches being exposed to outer metal level 70, to expose this transparency conducting layer 60 of part.In the present embodiment, the pixel electrode of this outer transparency conducting layer 60 as this thin film transistor base plate is exposed to.
Step 6: please also refer to Fig. 6, removes this photoresist layer 80.In the present embodiment, be positioned at this metal level 70 of this semiconductor layer 40 side and the part adjacent with this pixel electrode as the drain electrode of this thin film transistor base plate, be positioned at the source electrode of this metal level 70 as this film crystal substrate of the opposite side of this semiconductor layer 40.
Step 7: refer to Fig. 7, forms a protective layer 90, covers this metal level 70, transparency conducting layer 60 and is exposed to outer etch stop layer 50, thus form thin film transistor base plate 100.
In the manufacture method of above-mentioned thin film transistor base plate 100, the formation of source electrode, drain electrode and the formation of pixel electrode only need a photoresist layer, thus save the use of a photoresist layer, and processing procedure simplifies, and significantly reduces cost.
In addition, because transparency conducting layer 60 is between metal level 70 and gate insulator 30, therefore can the metallic element of barrier metal layer 70 be diffused in gate insulator 30, thus the quality of improving product.
Be understandable that, those skilled in the art also can do other change in spirit of the present invention, as long as it does not depart from technique effect of the present invention.These changes done according to the present invention's spirit, all should be included within the present invention's scope required for protection.
Claims (6)
1. a manufacture method for thin film transistor base plate, it comprises:
One substrate is provided;
Form grid, gate insulator, semiconductor layer, etch stop layer, transparency conducting layer and metal level successively on the substrate;
One photoresist layer is provided, this photoresist layer covers on the metal layer, a light shield is utilized to carry out exposure imaging to this photoresist layer, to form patterning photoresist layer, the part of this patterning photoresist layer adjacent semiconductor layers is thicker, part away from semiconductor layer is thinner, then etches metal level, until expose partially-etched barrier layer;
Remove the photoresist layer that remaining thinner is divided, to expose partial metal layers;
Etch being exposed to outer metal level, to expose this transparency conducting layer of part; And
Remove this photoresist layer.
2. the manufacture method of thin film transistor base plate as claimed in claim 1, it is characterized in that, this semiconductor layer comprises amorphous oxide semi-conducting material.
3. the manufacture method of thin film transistor base plate as claimed in claim 1, it is characterized in that, this transparency conducting layer is indium and tin oxide film.
4. the manufacture method of thin film transistor base plate as claimed in claim 1, it is characterized in that, this light shield is halftoning site light shield.
5. the manufacture method of thin film transistor base plate as claimed in claim 1, it is characterized in that, transparency conducting layer is between metal level and semiconductor layer.
6. the manufacture method of thin film transistor base plate as claimed in claim 1; it is characterized in that; after step " removes this photoresist layer ", comprise the steps: formation protective layer further, to cover this metal level, transparency conducting layer and to be exposed to outer etch stop layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310253860.1A CN104253091A (en) | 2013-06-25 | 2013-06-25 | A manufacturing method of a thin film transistor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310253860.1A CN104253091A (en) | 2013-06-25 | 2013-06-25 | A manufacturing method of a thin film transistor substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104253091A true CN104253091A (en) | 2014-12-31 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310253860.1A Pending CN104253091A (en) | 2013-06-25 | 2013-06-25 | A manufacturing method of a thin film transistor substrate |
Country Status (1)
| Country | Link |
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| CN (1) | CN104253091A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101770121A (en) * | 2008-12-26 | 2010-07-07 | 北京京东方光电科技有限公司 | Thin film transistor liquid crystal display (TFT-LCD) array substrate and manufacturing method thereof |
| CN103050412A (en) * | 2012-12-20 | 2013-04-17 | 深圳丹邦投资集团有限公司 | Manufacturing method of oxide thin film transistor |
| US20130099240A1 (en) * | 2011-10-12 | 2013-04-25 | Samsung Display Co., Ltd. | Thin film transistor, thin film transistor panel, and method for manufacturing the same |
-
2013
- 2013-06-25 CN CN201310253860.1A patent/CN104253091A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101770121A (en) * | 2008-12-26 | 2010-07-07 | 北京京东方光电科技有限公司 | Thin film transistor liquid crystal display (TFT-LCD) array substrate and manufacturing method thereof |
| US20130099240A1 (en) * | 2011-10-12 | 2013-04-25 | Samsung Display Co., Ltd. | Thin film transistor, thin film transistor panel, and method for manufacturing the same |
| CN103050412A (en) * | 2012-12-20 | 2013-04-17 | 深圳丹邦投资集团有限公司 | Manufacturing method of oxide thin film transistor |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20161018 Address after: 518109 Guangdong city of Shenzhen province Baoan District Longhua Town Industrial Zone tabulaeformis tenth East Ring Road No. 2 two Applicant after: Hongfujin Precise Industry (Shenzhen) Co., Ltd. Applicant after: Hon Hai Precision Industry Co., Ltd. Address before: Taiwan Hsinchu County Chinese jhubei City, Taiwan 1 yuan a Street No. 7 Building 1 Applicant before: YEXIN TECHNOLOGY CONSULATION CO., LTD. Applicant before: AU OPTRONICS CO., LTD. |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20141231 |