TWI459447B - Display panel and fabrications thereof - Google Patents

Description

Display panel and its making method

The present invention relates to a display device, and more particularly to a display panel for a display device.

Oxide semiconductors have been extensively studied in recent years and have been applied to display related products. At present, the most commonly proposed oxide semiconductor materials are indium gallium zinc oxide (IGZO), and other ionic bond-based oxide semiconductors have been published in the literature to distinguish them from sulfhydryl semiconductors that utilize covalent bonding. Since the source of such materials is a rare metal, the cost of the active layer alone is extremely high, and a novel process method and structure are required to increase the application surface of the oxide semiconductor to reduce the cost.

The present invention provides a method for fabricating a display panel, comprising: providing a substrate comprising an active region and a pixel region; forming a first metal layer on the substrate; forming a gate dielectric layer on the first metal layer; Forming an oxide semiconductor layer on the gate dielectric layer above the active region and the pixel region; performing a processing step on the oxide semiconductor layer above the pixel region to make it conductive, wherein the semiconductor layer on the active region Used as an active layer, the treated oxide semiconductor layer above the pixel region is used as a pixel electrode; and a second metal layer is formed to connect the active layer and the pixel electrode; a protective layer is deposited to expose the substrate An oxide semiconductor layer above the pixel region; and a processing step on the oxide semiconductor layer above the pixel region to make it electrically conductive, wherein the semiconductor layer on the active region is used as an active layer, above the pixel region The treated oxide semiconductor layer is used as a pixel electrode.

In an embodiment of the invention, the substrate further includes a peripheral region, and the second metal layer is connected to the first metal layer via the first opening in the peripheral region.

In an embodiment of the invention, performing a processing step on the oxide semiconductor layer above the pixel region is a plasma processing step.

In an embodiment of the invention, before forming the second metal layer, forming an etch stop layer on the oxide semiconductor layer above the active region is further included, wherein the etch stop layer comprises an opening.

In an embodiment of the invention, performing a processing step on the oxide semiconductor layer above the pixel region includes: depositing a protective layer on the second metal layer, the etch stop layer, and the gate dielectric layer above the active region of the substrate Exposing an oxide semiconductor layer over the pixel region of the substrate; and performing a plasma processing step.

In an embodiment of the present invention, before forming the second metal layer, forming an etch stop layer over the substrate above the active region, the pixel region, and the peripheral region, wherein the etch stop layer includes a first opening in the active region. The pixel region includes a second opening and the third region includes a third opening.

In an embodiment of the invention, performing a processing step on the oxide semiconductor layer above the pixel region includes: forming a protective layer on the second metal layer of the active region and the peripheral region to expose the oxide semiconductor of the pixel region a layer; and performing a plasma treatment step.

In an embodiment of the invention, performing a processing step on the oxide semiconductor layer above the pixel region includes: forming a photoresist layer on the oxide semiconductor layer and the gate dielectric layer; using a half-transmissive mask ( Half-tone mask), performing an exposure and development process such that the thickness of the photoresist layer in the active region is the thickest, the thickness of the photoresist layer above the pixel region is second, and the region where the oxide semiconductor layer is to be removed is not photoresist. a patterned photoresist layer is used as a mask to perform an etching process to pattern the oxide semiconductor layer; and a photoresist ashing process is performed to remove the photoresist layer above the pixel region, and above the active region The photoresist layer still retains a portion of the thickness; and a plasma processing step is performed.

In an embodiment of the invention, the method further comprises forming an etch stop layer over the substrate of the active region, the pixel region and the peripheral region; forming a photoresist layer on the etch stop layer; performing a lithography step, patterning the photoresist a layer, the photoresist layer includes a first opening on the active region, a second opening on the pixel region, and a third opening on the peripheral region; and the first etching of the etch stop layer is performed by using the photoresist layer as a mask a step of transferring the pattern of the first opening, the second opening, and the third opening of the photoresist layer; and performing a second etching step, etching the stop layer as a mask, and etching the layer to the oxide semiconductor layer The etch rate is lower, but the etch rate of the gate dielectric layer is higher, so that this step further etches the gate dielectric layer of the peripheral region to form a third opening exposing the first metal layer.

In an embodiment of the invention, the plasma treatment step is hydrogen plasma treatment, reducing atmosphere treatment or direct plasma bombardment, and the oxide semiconductor layer is an ion-bonded oxide semiconductor such as indium gallium zinc oxide (InGaZnO) _x ).

The invention provides a display panel comprising: a substrate comprising an active region and a pixel region; a first metal layer on the substrate; a gate dielectric layer on the first metal layer; and an oxide semiconductor a layer on the gate dielectric layer above the active region and the pixel region, wherein the oxide semiconductor layer of the pixel region is electrically conductive, and the semiconductor layer on the active region is used as an active layer, and oxidation over the pixel region The semiconductor layer is used as a pixel electrode; and a second metal layer is connected to the active layer and the pixel electrode.

In an embodiment of the invention, a protective layer is further disposed on the second metal layer, and the oxide semiconductor layer is an ion-bonded oxide semiconductor such as indium gallium zinc oxide (InGaZnO _x ).

In order to make the features of the present invention more comprehensible, the following detailed description of the embodiments and the accompanying drawings

The following detailed discussion discloses an implementation of the embodiments. However, it will be appreciated that the embodiments provide many applicable inventive concepts that can be implemented in a wide variety of variations. The specific embodiments discussed are merely illustrative of specific ways of using the embodiments and are not intended to limit the scope of the disclosure.

The present invention provides a display panel including an oxide semiconductor material and a method of fabricating the same. The present invention utilizes the characteristics that the conductive characteristics of the oxide semiconductor material can be changed according to process conditions, and the characteristics of the film include semiconductor or conductor characteristics, and the oxidation is performed. The semiconductor material is simultaneously used in the pixel electrode and the active layer of the display panel to omit the subsequent plating and the step of defining the transparent conductive film.

1A to 1E are views showing a method of manufacturing a display panel according to an embodiment of the present invention, and FIGS. 1A to 1D are cross-sectional views showing an intermediate step of a display panel according to an embodiment of the present invention, and FIG. 1E is a view showing a manufacturing of a display panel according to an embodiment of the present invention. Method of Final Steps First, please refer to FIG. 1A to provide a substrate 102. In an embodiment of the invention, the substrate 102 may be a glass, plastic or germanium wafer. A gate electrode layer 104 is formed on the substrate 102. The material of the gate electrode 104 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the method of forming the gate electrode 104 may include depositing a first metal material, performing a first lithography, and etching steps to form a gate electrode 104 on the active region. Subsequently, an insulating layer 106 is formed on the gate electrode 104 and the substrate 102. In an embodiment of the invention, the insulating layer 106 may comprise an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride, an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. The insulating layer 106 is preferably composed of yttria. Then, a second lithography and etching step is performed to form a first opening (not shown) in the insulating layer 106 of the peripheral region (also referred to as a routing region or a transition region) of the display panel to expose the gate. Polar electrode 104. Subsequently, referring to FIG. 1B, an oxide semiconductor layer 116 is formed on the active region 112 and the pixel region 114 of the display panel. The method of forming the oxide semiconductor layer 116 may include depositing an oxide semiconductor material, performing a third lithography, and etching step. In an embodiment of the invention, the oxide semiconductor material may be indium gallium zinc oxide (InGaZnO _x , IGZO for short), zinc oxide (ZnO), indium zinc oxide (InZnOx), gallium zinc oxide (GaZnOx), indium. Tin zinc oxide (InSnZnOx), indium antimony zinc oxide (HfInZnOx) or other suitable oxide semiconductor material. Referring to FIG. 1C, a source electrode and a drain electrode 118 are formed on the oxide semiconductor layer 116 and the gate dielectric layer 106, and the active region 112 and the oxide semiconductor layer 116 of the pixel region 114 are connected. The material of the source electrode and the drain electrode 118 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the source electrode and the method of forming the drain electrode 118 may include depositing a second metal material, performing a fourth lithography, and etching step. In addition, the second metal layer is connected to the first metal layer via a first opening (not shown) in a peripheral region (not shown). Please refer to FIG. 1D and FIG. 1E. FIG. 1D is a cross section of FIG. 1EAA′ (FIG. 1E is a plan view showing a final step of a method for manufacturing a display panel according to an embodiment of the present invention), and a protective layer 120 is formed on the display panel. The source electrode of the region 112 and the gate electrode 118 and the oxide semiconductor layer 116, in particular, the protective layer 120 exposes the oxide semiconductor layer 116 of the pixel region 114. The protective layer 120 may be an oxide such as cerium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as cerium oxynitride or a coating type organic or inorganic insulating layer material. The method of forming the protective layer 120 may include depositing an insulating material, performing a fifth lithography, and etching steps. Subsequently, the surface of the oxide semiconductor layer 116 exposed by the pixel region 114 is subjected to a surface treatment step to change its conductive property to have a conductive property for use as a pixel electrode, and the unexposed oxide layer of the active region 112 is used as a film. The channel layer of the transistor. In this embodiment, the surface treatment step may be a plasma treatment step, particularly a hydrogen plasma treatment step.

2A to 2H are views showing a method of manufacturing a display panel according to an embodiment of the present invention, and the method uses a boundary electric field to switch a structure of a wide viewing angle (FFS). Referring to FIG. 2A, a substrate 202 is provided. In an embodiment of the invention, the substrate 202 can be a glass, plastic or germanium wafer. A gate electrode 204 is formed on the substrate 202. The material of the gate electrode 204 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the method of forming the gate electrode 204 may include depositing a first metal material, performing a first lithography, and etching steps. Subsequently, an insulating layer 206 is formed on the gate electrode 204 and the substrate 202. In an embodiment of the invention, the insulating layer 206 may comprise an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. The insulating layer 206 is preferably composed of yttria. Referring to FIG. 2B, an oxide semiconductor layer 214 is formed on the active region 208 and the pixel region 210 of the display panel. The method of forming the oxide semiconductor 214 may include depositing an oxide semiconductor material, performing a second lithography, and etching step. In an embodiment of the invention, the oxide semiconductor material is indium gallium zinc oxide or other suitable oxide semiconductor material. It should be noted that in the second lithography step, the exposure and development process is performed using a half-tone mask to define the photoresist layer of the oxide semiconductor layer 214. The thickness of the active region 208 is the thickest, the thickness of the photoresist layer 212 of the pixel region 210 is second, and the region of the oxide semiconductor layer is removed without the photoresist layer 212. Thereafter, an etching process is performed using the patterned photoresist layer 212 as a mask to pattern the oxide semiconductor layer 214. Subsequently, please refer to FIG. 2C to perform a photoresist ashing process, so that the photoresist layer 212 on the pixel region 210 is removed, and the photoresist layer 212 on the active region 208 is only thinned, but still retains part. A photoresist layer 212 of thickness. Subsequently, a surface treatment step is performed on the exposed oxide semiconductor layer 214 of the pixel region 210, and its conductive property is changed to have a conductive property to be used as a pixel electrode, and the active region 208 is covered by the photoresist layer 212. The oxide layer acts as a channel layer for the thin film transistor. In this embodiment, the surface treatment step may be a plasma treatment step, particularly a hydrogen plasma treatment step. Next, please refer to FIG. 2D to remove the remaining photoresist layer 212 above the active region 208. Referring to FIG. 2E, a source electrode and a drain electrode 216 are formed on the oxide semiconductor layer 214 and the insulating layer 206, and the active region 208 and the oxide semiconductor layer 214 of the pixel region 210 are connected. The material of the source electrode and the drain electrode 216 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the method of forming the source electrode and the drain electrode 216 may include depositing a second metal material, performing a third lithography, and etching step. Referring to FIG. 2F, a protective layer 218 is formed on the display panel active region 208 and the second metal layer of the pixel region 210 and the oxide semiconductor layer 214. The protective layer 218 may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. The method of forming the protective layer 218 can include depositing an insulating material. In addition, a fourth lithography and etching step is performed, and openings (not shown) are formed at the peripheral lines of the peripheral regions (not shown). Referring to FIG. 2G and FIG. 2H, FIG. 2G is a cross section of FIG. 2HAA′ (a plan view of a final step of the method for manufacturing a display panel according to an embodiment of the present invention), forming a transparent conductive layer 222 on the display panel active region 208 and The protective layer 218 of the pixel area 210 is filled in the above opening of the peripheral area (not shown) to connect the peripheral traces. The method of forming the transparent conductive layer 222 includes performing a fifth lithography process and an etching step.

3A to 3F are views showing a method of manufacturing a display panel according to an embodiment of the present invention, and the method particularly uses an etching stop layer (ESL) technique. Referring first to FIG. 3A, a substrate 302 is provided. In one embodiment of the invention, the substrate 302 can be a glass, plastic or germanium wafer. A gate electrode 304 is formed on the substrate 302. The material of the gate electrode 304 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the method of forming the gate electrode 304 may include depositing a metal material, performing a first lithography, and etching step. Subsequently, an insulating layer 306 is formed on the gate electrode 304 and the substrate 302. In an embodiment of the invention, the insulating layer 306 may comprise an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. The insulating layer 306 is preferably composed of yttria. Subsequently, a second lithography and etching step is performed to form a first opening (not shown) in the insulating layer 306 in a peripheral region (not shown) of the display panel to expose the first metal layer. Subsequently, referring to FIG. 3B, an oxide semiconductor layer 310 is formed on the active region 312 and the pixel region 314 of the display panel. The method of forming the oxide semiconductor layer 310 may include depositing an oxide semiconductor material, performing a third lithography, and etching step. In an embodiment of the invention, the oxide semiconductor material is indium gallium zinc oxide or other suitable oxide semiconductor material. Referring to FIG. 3C, an etch stop layer 316 is formed on the oxide semiconductor layer 310 and the insulating layer 306 of the active region 312, wherein the etch stop layer 316 includes a second opening 318, which can protect the active region. The oxide semiconductor layer is damaged by a chemical or plasma atmosphere, and thus the device characteristics are better. In an embodiment of the invention, the etch stop layer material may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. . The method of forming the etch stop layer 316 may include depositing an etch stop layer material, performing a fourth lithography and etching step, removing the etch stop layer 316 other than the active region 312, and forming a second opening 318 in the etch stop layer 316. . Subsequently, referring to FIG. 3D, a source electrode and a drain electrode 320 are formed on the etch stop layer 316, the gate dielectric layer 306 and the oxide semiconductor layer 310, and the active region 312 and the oxide of the pixel region 314 are connected. Semiconductor layer 310. The material of the source electrode and the drain electrode 320 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof, and a method of forming the source electrode and the drain electrode 320 may include A metal material is deposited, and a fifth lithography and etching step is performed. It should be noted that, in the peripheral region (not shown), the second metal layer is connected to the first metal genus via the first opening (not shown) formed by the above steps. Referring to FIGS. 3E and 3F, FIG. 3E is a cross section of FIG. 3FAA′ (a plan view of a final step of the method for manufacturing a display panel according to an embodiment of the present invention), and a protective layer 322 is formed on the active region 312 and the peripheral region ( The second metal layer (not shown) exposes the pixel region 314 oxide semiconductor layer 310, and the protective layer 322 may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or nitrogen oxide. For example, the ruthenium oxynitride or the coated organic or inorganic insulating layer material, the protective layer 322 may be formed by depositing a protective layer material, performing a sixth lithography and etching step, and removing the protective layer 322 over the pixel region 314. . Subsequently, a surface treatment step is performed on the exposed oxide semiconductor layer 310 of the pixel region 314, and its conductive property is changed to have a conductive property to be used as a pixel electrode, and the unexposed oxide layer of the active region 312 is used as a thin film. The channel layer of the transistor. In this embodiment, the surface treatment step may be a plasma treatment step, particularly a hydrogen plasma treatment step.

Another embodiment of the present invention performs a different process to form a display panel (a technique using an etch stop layer). The following is a description of the subsequent flow of the third embodiment. Referring to FIG. 3G, an etch stop layer 324 is formed on the display panel. In the region, the active region 312 includes a second opening 326. The pixel region 314 includes a third opening 328 to connect the pixel electrodes, and includes a fourth opening (not shown) in the peripheral region (not shown). To provide a layer of transfer. The etch stop layer 324 may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material, and the etch stop layer 324 is formed. The method can include depositing an etch stop layer material, performing a fourth lithography, and etching steps. The etch stop layer 324 can protect the oxide semiconductor layer on the active region from damage by chemicals or plasma atmosphere, and thus the device characteristics are better. Referring to FIG. 3H, a source electrode and a drain electrode 332 are formed on the etch stop layer 324, the insulating layer 306, and the oxide semiconductor layer 310, and the active region 312 and the oxide semiconductor layer 310 of the pixel region 314 are connected. The material of the source electrode and the drain electrode 332 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof, and a method of forming the source electrode and the drain electrode 332 may include A metal material is deposited, and a fifth lithography and etching step is performed. It should be noted that, in the peripheral region (not shown), the second metal layer is connected to the first metal layer via a fourth opening (not shown) formed by the above steps. Please refer to FIG. 3I and FIG. 3J. FIG. 3I is a cross section of FIG. 3JAA′ (a plan view of a final step of the method for manufacturing a display panel according to an embodiment of the present invention), and a protective layer 334 is formed on the active region 312 and the peripheral region ( The second metal layer (not shown) exposes the pixel region 314 oxide semiconductor layer 310, and the protective layer 334 may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or nitrogen oxide. For example, the ruthenium oxynitride or the coated organic or inorganic insulating layer material, the protective layer 334 may be formed by depositing a protective layer material, performing a sixth lithography and etching step, and removing the protective layer 334 over the pixel region 314. . Subsequently, a surface treatment step is performed on the exposed oxide semiconductor layer 310 of the pixel region 314, and its conductive property is changed to have a conductive property to be used as a pixel electrode, and the unexposed oxide layer of the active region 312 is used as a thin film. The channel layer of the transistor. In this embodiment, the surface treatment step may be a plasma treatment step, particularly a hydrogen plasma treatment step.

4A to 4G are views showing a method of manufacturing a display panel according to an embodiment of the present invention. This method uses an etching stop layer (ESL) technique, and the difference from the first two embodiments is that the periphery of this embodiment is The patterning of the third opening of the region and the etch stop layer is completed in the same lithography etching step, so only five masks are used. Referring first to FIG. 4A, a substrate 402 is provided. In one embodiment of the invention, the substrate 402 can be a glass, plastic or germanium wafer. A gate electrode 404 is formed on the substrate 402. The material of the gate electrode 404 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof. In an embodiment of the invention, the method of forming the gate electrode 404 may include depositing a metal material, performing a first lithography, and etching steps. Subsequently, an insulating layer 406 is formed on the gate electrode 404 and the substrate 402. In an embodiment of the invention, the insulating layer 406 may comprise an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or an oxynitride such as hafnium oxynitride or a coated organic or inorganic insulating layer material. The insulating layer 406 is preferably composed of yttria. Referring to FIG. 4B, an oxide semiconductor layer 408 is formed on the active region 410 and the pixel region 412 of the display panel. The method of forming the oxide semiconductor layer 408 may include depositing an oxide semiconductor material, performing a second lithography, and etching step. In an embodiment of the invention, the oxide semiconductor material is indium gallium zinc oxide, or other suitable oxide semiconductor material. Referring to FIG. 4C, an etch stop layer 416 is formed on the oxide semiconductor layer 408 and the insulating layer 406 of the active region 410. Subsequently, a photoresist layer 418 is formed to perform a third lithography step to pattern the photoresist layer. 418, the photoresist layer 418 includes a first opening 420 on the active region 410, a second opening 422 on the pixel region 412, and a third opening (not shown) on the peripheral region. Using the photoresist layer 418 as a mask, the etching stops The stop layer 416 performs an etching step to transfer the pattern of the first opening 420, the second opening 422, and the third opening of the photoresist layer 418. Next, referring to FIG. 4D, another etching step is performed, and the etch stop layer 416 is etched downward as a mask, where selective etching can be performed, so that the etching rate of the etching step on the oxide semiconductor layer 408 is low. However, the etching rate of the insulating layer 406 is high. Therefore, this step can be etched downward for the third opening (not shown) of the peripheral region (not shown), so that the third opening (not shown) exposes the gate. The electrode 404, the etch stop layer 416 can protect the oxide semiconductor layer on the active region from damage by chemical or plasma atmosphere, and thus the device characteristics are better. Referring to FIG. 4E, a source electrode and a drain electrode 426 are formed on the etch stop layer 416, the gate dielectric layer 406 and the oxide semiconductor layer 408, and the active semiconductor region 410 and the oxide semiconductor layer of the pixel region 412 are connected. 408. The material of the source electrode and the drain electrode 426 may be a single layer or a multilayer structure of a metal such as Mo, Ti, Al, Cu, Ag, Au, ITO or an alloy thereof, and a method of forming the source electrode and the drain electrode 426 may include A metal material is deposited, and a fourth lithography and etching step is performed. It should be noted that, in the peripheral region (not shown), the second metal layer is connected to the first metal layer via a third opening (not shown) formed by the above steps. Referring to FIG. 4F and FIG. 4G, FIG. 4F is a cross section of FIG. 4GAA′ (a plan view of a final step of the method for manufacturing a display panel according to an embodiment of the present invention), and a protective layer 428 is formed on the active region 410 and the peripheral region ( The second metal layer (not shown) exposes the pixel region 412 oxide semiconductor layer 408, and the protective layer 428 may be an oxide such as hafnium oxide, aluminum oxide or a nitride such as tantalum nitride or nitrogen oxide. For example, a ruthenium oxynitride or a coated organic or inorganic insulating layer material, the formation of the protective layer 428 may include depositing a protective layer material, performing a fifth lithography and etching step, and removing the protective layer 428 over the pixel region 412. . Subsequently, a surface treatment step is performed on the exposed oxide semiconductor layer 408 of the pixel region 412, and its conductive property is changed to have a conductive property to be used as a pixel electrode, and the unexposed oxide layer of the active region 410 is used as a thin film. The channel layer of the transistor. In this embodiment, the surface treatment step may be a plasma treatment step, particularly a hydrogen plasma treatment step.

According to the above, the display panel and the manufacturing method thereof provided by the present invention have the following advantages: the present invention uses the oxide semiconductor layer material simultaneously in the pixel region and the active region of the display panel, wherein the oxide semiconductor layer of the pixel region is After the treatment, it has a conductive property and can be used as a pixel electrode, and the subsequent steps of plating and defining a transparent conductive film are omitted.

Although the present invention has been described above in terms of the preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

102. . . Substrate

104. . . Gate electrode

106‧‧‧Insulation

112‧‧‧active area

114‧‧‧Photo District

116‧‧‧Oxide semiconductor layer

118‧‧‧Source electrode and drain electrode

120‧‧‧Protective layer

202‧‧‧Substrate

204‧‧‧gate electrode

206‧‧‧Insulation

208‧‧‧active area

210‧‧‧Photo District

212‧‧‧ photoresist layer

214‧‧‧Oxide semiconductor

216‧‧‧Second metal

218‧‧‧protection layer

222‧‧‧Transparent conductive layer

302‧‧‧Substrate

304‧‧‧gate electrode

306‧‧‧Insulation

310‧‧‧Oxide semiconductor layer

312‧‧‧active area

314‧‧‧Photo District

316‧‧‧etch stop layer

318‧‧‧ second opening

320‧‧‧Source electrode and drain electrode

322‧‧‧Protective layer

324‧‧‧etch stop layer

326‧‧‧ second opening

328‧‧‧ third opening

332‧‧‧Source electrode and drain electrode

334‧‧‧Protective layer

402‧‧‧Substrate

404‧‧‧gate electrode

406‧‧‧Insulation

408‧‧‧Oxide semiconductor layer

410‧‧‧active area

412‧‧‧Photo area

416‧‧‧etch stop layer

418‧‧‧ photoresist layer

420‧‧‧ first opening

422‧‧‧ second opening

426‧‧‧Source electrode and drain electrode

428‧‧‧Protective layer

1A to 1D are cross-sectional views showing intermediate steps of a method of manufacturing a display panel display panel according to an embodiment of the present invention.

Fig. 1E is a plan view showing the final steps of a method of manufacturing a display panel in accordance with an embodiment of the present invention.

2A to 2G are cross-sectional views showing intermediate steps of a method of manufacturing a display panel display panel according to an embodiment of the present invention.

Fig. 2H is a plan view showing the final steps of the method of manufacturing the display panel in accordance with an embodiment of the present invention.

3A to 3E are cross-sectional views showing intermediate steps of a method of manufacturing a display panel of a display panel according to an embodiment of the present invention.

Fig. 3F is a plan view showing the final steps of the method of manufacturing the display panel in accordance with an embodiment of the present invention.

3G to 3I are cross-sectional views showing intermediate steps of a method of manufacturing a display panel of a display panel according to an embodiment of the present invention.

Fig. 3J is a plan view showing the final steps of the method of manufacturing the display panel in accordance with an embodiment of the present invention.

4A to 4F are cross-sectional views showing intermediate steps of a method of manufacturing a display panel of a display panel according to an embodiment of the present invention.

Fig. 4G is a plan view showing the final steps of the method of manufacturing the display panel in accordance with an embodiment of the present invention.

102. . . Substrate

104. . . Gate electrode

106. . . Insulation

112. . . Active zone

114. . . Graphic area

116. . . Oxide semiconductor layer

118. . . Source electrode and drain electrode

120. . . The protective layer

Claims (10)

A method for manufacturing a display panel, comprising: providing a substrate, comprising an active region and a pixel region; forming a first metal layer on the substrate; forming a gate dielectric layer on the first metal layer; Forming an oxide semiconductor layer on the gate dielectric layer above the active region and the pixel region; forming an etch stop layer on the oxide semiconductor layer above the active region, wherein the etch stop layer includes at least An opening; forming a second metal layer connecting the active region and the oxide semiconductor layer above the pixel region; depositing a protective layer on the second metal layer above the active region of the substrate, the etch stop layer And exposing the oxide semiconductor layer above the pixel region of the substrate to the gate dielectric layer; and performing a plasma processing step on the oxide semiconductor layer above the pixel region to make the conductive layer The oxide semiconductor layer on the active region is used as an active layer, and the treated oxide semiconductor layer above the pixel region is used as a pixel electrode. The method of manufacturing the display panel of claim 1, wherein the substrate further comprises a peripheral region, and the second metal layer is in the peripheral region via the gate dielectric layer located in the peripheral region A first opening connects the first metal layer. The method of manufacturing the display panel of claim 1, wherein the substrate comprises a peripheral region, and the etch stop layer is located above the active region, the pixel region and the substrate above the peripheral region, wherein the etching The stop layer includes a first opening in the active region, a second opening in the pixel region, and a third opening in the peripheral region. The method for fabricating a display panel according to claim 3, wherein the protective layer is located on the active metal region and the second metal layer of the peripheral region to expose the oxide semiconductor layer of the pixel region. The method of manufacturing the display panel of claim 1, wherein the substrate comprises a peripheral region, and the method for fabricating the display panel further comprises: forming the etch stop layer in the active region, the pixel region, and the periphery a photoresist layer is formed on the etch stop layer; a lithography step is performed to pattern the photoresist layer, and the photoresist layer includes a first opening on the active region in the pixel region The second opening is included in the peripheral region, and the third opening is formed on the peripheral region; the first etching step is performed on the etch stop layer by using the photoresist layer as a mask, and the first opening and the second opening of the photoresist layer are Transferring the pattern of the third opening; and performing a second etching step, etching the etch stop layer as a mask, the etching step is lower for the oxide semiconductor layer, but the gate is dielectrically The etch rate of the layer is higher, such that the step further etches the gate dielectric layer of the peripheral region and exposes the third opening to the first metal layer. The method for manufacturing a display panel according to claim 1, wherein the plasma processing step is hydrogen plasma treatment. The method for fabricating a display panel according to claim 1, wherein the oxide semiconductor layer is zinc oxide (ZnO), indium zinc oxide (InZnOx), gallium zinc oxide (GaZnOx), indium tin zinc oxide. (InSnZnOx), indium antimony zinc oxide (HfInZnOx) or indium gallium zinc oxide (InGaZnO _x ). A display panel comprising: a substrate comprising an active region, a pixel region and a peripheral region; a first metal layer on the substrate; a gate dielectric layer on the first metal layer; An oxide semiconductor layer is disposed on the gate dielectric layer above the active region and the pixel region, wherein the oxide semiconductor layer of the pixel region is electrically conductive, and the oxide semiconductor layer on the active region is used as an active a layer, an oxide semiconductor layer above the pixel region is used as a pixel electrode; and a second metal layer connecting the active layer and the pixel electrode, wherein the second metal layer is located in the peripheral region An opening in the gate dielectric layer of the peripheral region connects the first metal layer. The display panel of claim 8, further comprising a protective layer between the active layer and the second metal layer. The display panel according to claim 8, wherein the oxide semiconductor layer is zinc oxide (ZnO), indium zinc oxide (InZnOx), gallium zinc oxide (GaZnOx), indium tin zinc oxide (InSnZnOx). ), indium antimony zinc oxide (HfInZnOx) or indium gallium zinc oxide (InGaZnO _x ).