CN104240763B - Electric fuse circuit - Google Patents

Electric fuse circuit Download PDF

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Publication number
CN104240763B
CN104240763B CN201310232136.0A CN201310232136A CN104240763B CN 104240763 B CN104240763 B CN 104240763B CN 201310232136 A CN201310232136 A CN 201310232136A CN 104240763 B CN104240763 B CN 104240763B
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electric fuse
diode
input
output end
control unit
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CN201310232136.0A
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CN104240763A (en
Inventor
廖淼
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Semiconductor Manufacturing International Shanghai Corp
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Semiconductor Manufacturing International Shanghai Corp
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Abstract

The present invention provides a kind of electric fuse circuit, including:Control unit and electric fuse, described control unit include:Diode with first input end and the first output end, the first phase inverter with the second input and the second output end, the diode includes the diode of multiple electrical connections;The first input end is electrically connected with second input, and first output end is electrically connected with second output end, and one end of the electric fuse is electrically connected with the first input end or the first output end.The electric fuse circuit provided using the present invention, can reduce the area occupied of electric fuse circuit in the chips.

Description

Electric fuse circuit
Technical field
The invention belongs to semiconductor applications, more particularly to a kind of electric fuse circuit.
Background technology
In integrated circuits, fuse(Fuse)Refer to the connecting line that resistance can be significantly alterred(From low resistance state to High-impedance state changes), or the connecting line that can be fused.Initially, fuse is for connecting the redundant circuit in integrated circuit, one Denier detection finds that integrated circuit has defect, just utilizes fuse reparation or the defective circuit of substitution.Fuse is except can be Using outer in redundant circuit, also applied with wider, such as:Built-in self-test(Build in self test, abbreviation BIST) Technology, self-repair technology, one-time programming(One Time Program, abbreviation OTP)Chip, on-chip system(System On Chip, abbreviation SoC)Etc..Fuse is generally divided into laser fuse(Laser Fuse)And electric fuse(Electrical Fuse, letter Claim E-fuse)Two kinds.With the development of semiconductor technology, electric fuse gradually instead of laser fuse.
General, electric fuse can use metal(Aluminium, copper etc.)Or silicon is made, a kind of typical electric fuse shape in the prior art Into fleet plough groove isolation structure in the semiconductor substrate(STI)On, electric fuse includes anode and negative electrode, and positioned at anode and the moon The filament being connected between pole with both.When moment is by larger current between anode and negative electrode, the resistance of electric fuse can be sent out Life is significantly alterred or electric fuse can be blown.Therefore, electric fuse has can realize the spy that low-resistance is converted to high resistant by electric current Property.
With reference to Fig. 1, electric fuse circuit is by electric fuse 13 and control unit(Programme Device)12 compositions, control is single The whole fusing process of member control electric fuse.In the prior art, control unit 12 is CMOS transistor unit, CMOS transistor list Member includes showing a CMOS transistor in several CMOS transistors in parallel, figure.Fig. 2 is the operating voltage of CMOS transistor With the characteristic curve diagram of operating current.Abscissa represents the operating voltage of CMOS transistor, and ordinate represents CMOS transistor Operating current, can know from the operating voltage and the indicatrix of operating current in Fig. 2:The operating current of CMOS transistor with The growth trend of operating voltage is slower, therefore, and the control unit of prior art needs more CMOS transistor in parallel, ability Obtain larger by electric fuse 13(With reference to Fig. 1)The blowout current of fusing.Therefore, more CMOS transistor takes in the chips Area it is larger so that electric fuse circuit area occupied on chip is larger.
The content of the invention
The problem of present invention is solved is that electric fuse circuit of the prior art area occupied on chip is larger.
To solve the above problems, the invention provides a kind of electric fuse circuit, including:Control unit and electric fuse:It is described Control unit includes:Diode with first input end and the first output end, is exported with the second input and second First phase inverter at end, the diode includes the diode of multiple electrical connections;
The first input end is electrically connected with second input, first output end and second output end electricity Connection,
One end of the electric fuse is electrically connected with the first input end or the first output end.
Optionally, described control unit also includes:
Buffer, is made up of the inverter series of even number second, with the 3rd input and the 3rd output end;
The first input end and the second input are electrically connected by the buffer, the 3rd input and described the Two inputs are electrically connected, and the 3rd output end is electrically connected with the first input end.
Optionally, it is described to electrically connect as parallel connection.
Optionally, first phase inverter is CMOS inverter.
Optionally, second phase inverter is CMOS inverter.
Optionally, the buffer includes two second phase inverters.
Optionally, first phase inverter is identical with the type of second phase inverter.
Compared with prior art, technical scheme has advantages below:
In the present invention, the operating current of diode is exponentially increased with the growth of operating voltage, when by multiple electrical connections When the diode of diode composition is switched on as control unit, moment can produce very big conducting electric current, therefore, use Less diode just can produce the blowout current that electric fuse fuses.When using control electricity of the diode as electric fuse Lu Shi, can reduce the area occupied of control unit in the chips, and then can reduce the occupancy of electric fuse circuit in the chips Area.
In addition, in the present invention, the first phase inverter can be such that the current potential moment of the output end of diode first reaches electricity The potential value of fuse failure, so as to shorten the time that electric fuse is blown.
Brief description of the drawings
Fig. 1 is the electric fuse circuit schematic diagram of prior art;
Fig. 2 is the operating voltage of CMOS transistor and the characteristic curve diagram of operating current;
Fig. 3 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention one;
Fig. 4 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention two;
Fig. 5 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention three;
Fig. 6 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention four;
Fig. 7 is the cross-sectional view of diode in the embodiment of the present invention;
Fig. 8 is the operating voltage of diode and the characteristic curve diagram of operating current.
Embodiment
The problem of area occupied is larger on chip in order to solve electric fuse circuit of the prior art, is inventor provided A kind of electric fuse circuit.
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with the accompanying drawings to the present invention Embodiment be described in detail.
Embodiment one
Fig. 3 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention one.It is specific as follows:
Electric fuse circuit 30 includes control unit and electric fuse 33, and control unit is connected with electric fuse 33.Control unit bag Include:With first input end and the diode of the first output end 32, first with the second input and the second output end Phase inverter 34.Wherein, diode 32 is formed by several diodes in parallel, and a diode is shown in figure.The present embodiment In, diode 32 is in parallel with the first phase inverter 34, specially the first input end of diode 32 and the first phase inverter 34 the second input electrical connection, the first output end of diode 32 and the second output end of the first phase inverter 34 are electrically connected Connect.
In the present embodiment, the first end of electric fuse 33 is electrically connected with the first output end of diode 32, electric fuse 33 The second end ground connection.The first input end of diode 32 is used to receive input signal 31.
In the present embodiment, electric fuse circuit and programmed circuit(It is not shown)Connection, programmed circuit is in the outer of electric fuse circuit Enclose, for output signal.With reference to Fig. 3, programmed circuit output signal is the input signal 31 of electric fuse circuit, the input signal 31 be a series of electric impulse signal of gauss changes, and the change of correspondence 0 and 1, its size is determined by programmed circuit.
Embodiment two
Fig. 4 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention two.With reference to Fig. 4, electric fuse circuit 40 and reality Apply being distinguished as example one:The first end of electric fuse 43 is electrically connected with the first input end of diode 42, and the of electric fuse 43 Two ends are used to receive input signal 41.First output end of diode 42 is used to be grounded.
Embodiment three
Fig. 5 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention three.With reference to Fig. 5, electric fuse circuit 50 and reality Apply being distinguished as example one, two:The control unit of the present embodiment also includes buffer 56, the first input end and the second input Electrically connected by the buffer.Buffer 56 is composed in series by two the second phase inverters 57, with the 3rd input and the 3rd Output end.Wherein, the first phase inverter 54 is identical with the type of the second phase inverter 57.3rd input of buffer 56 and first anti- The second input electrical connection of phase device 54, the 3rd output end and the first input end of diode 52 of buffer 56 are electrically connected Connect.
The first end of electric fuse 53 is electrically connected with the second output end of the first phase inverter 54, the second termination of electric fuse 53 Ground.Second input of the first phase inverter 54 is used to receive input signal 51.
Buffer 56 in the present embodiment is in series by two the second phase inverters 57, can't change 56 liang of buffer The voltage-phase at end.In other embodiments, buffer can be made up of other even number of inverters, such as 4,6 etc..
Example IV
Fig. 6 is the circuit structure diagram of electric fuse circuit in the embodiment of the present invention four.With reference to Fig. 6, electric fuse circuit 60 and reality Apply being distinguished as example three:The first end of electric fuse 63 is electrically connected with the second input of the first phase inverter 64, and the of electric fuse 63 Two ends are used to receive input signal 61, and the second output end of the first phase inverter 64 is used to be grounded.
Fig. 7 for the present invention diode in diode cross-sectional view.With reference to Fig. 7, diode tool There are n traps 71, p-type heavily doped region 73, n traps 71 and the formation PN junction of p-type heavily doped region 73 are formed in n traps 71.Formed in n traps 71 N-type heavily doped region 72 picks out area as n traps.
It should be noted that the forming method of the diode in the present embodiment is:With reference to Fig. 7, n traps are formed in substrate 71, patterned polysilicon layer 74 is then formed on substrate, the patterned polysilicon layer 74 and the grid in CMOS transistor Pole shape is identical;Afterwards, it is mask with patterned polysilicon layer 74, ion implanting is carried out to substrate, in patterned polycrystalline N-type heavily doped region 72, p-type heavily doped region 73 are formed in the substrate of the both sides of silicon layer 74.Due to, patterned polysilicon layer 74 with Gate shapes in CMOS transistor are identical, therefore, the grid one that the patterned polysilicon layer 74 can be with CMOS transistor Rise and formed, the formation process of such diode can be compatible with the technique of CMOS transistor.
The first phase inverter and the second phase inverter in the present invention are CMOS inverter, are by two enhanced MOS field-effects Transistor is constituted.Nmos pass transistor is driving transistor, and PMOS transistor is load pipe.First phase inverter can will input first The phasing back 180 degree of signal in phase inverter.Therefore, in the present embodiment, on diode one in parallel it is first anti-phase Device, can reach for the first of diode the output terminal potential moment the potential value needed for fusing electric fuse, so as to so that Electric fuse two ends moment produces larger blowout current, saves the time that electric fuse is blown.
In other embodiments, other kinds of phase inverter is also applied for the present invention.
In the present embodiment, diode applications had into advantages below in a control unit:
Fig. 8 is the operating voltage of diode and the characteristic curve diagram of operating current.Abscissa represents the work electricity of diode Pressure, ordinate represents the operating current of diode, can known from the operating voltage and the indicatrix of operating current in Fig. 8: Operating current is exponentially increased with the growth of operating voltage, therefore, when the diode conducts, can produce larger conducting electric current. If by diode applications in control unit, the blowout current that electric fuse fuses can be just produced using less diode. It is thereby possible to reduce the area of the occupancy of control unit in the chips, and then the occupancy of fuse circuit in the chips can be reduced Area.
If control unit is only constituted by a diode, for the control unit being only made up of CMOS transistor, electricity The fusing time of fuse can extend.Reason is as follows:Diode is a PN junction, and carrier is from a doped regions in addition In the motion process of the doped region of one concentration, larger parasitic capacitance can be produced.For CMOS transistor, source electrode and Turned between drain electrode by raceway groove, the parasitic capacitance that this mode is formed is smaller.Therefore, the parasitic capacitance of diode is much larger than The parasitic capacitance of CMOS transistor.Therefore, the speed of service for the control unit being only constituted by a diode is less than only by CMOS crystal The speed of service of the control unit of pipe composition.But, in invention, control unit is in parallel by diode and the first phase inverter Form, the first phase inverter diode first can be exported terminal potential moment reach fusing electric fuse needed for potential value, So as to so that electric fuse two ends moment produce larger blowout current, to reduce the time of electric fuse fusing.
It is higher in the input impedance of control unit with reference to Fig. 3 in embodiment one, influence the speed of service of control unit.Cause For, diode parasitic capacitance than larger, therefore, the parasitic capacitance of diode 32 is also than larger so that diode The node capacitor of 32 first input ends is than larger, so that the input impedance of control unit is higher.The control of embodiment three In unit, with reference to Fig. 5, a buffer 56 of having been connected at the first input end of diode 52 is then anti-with first again Phase device 54 is composed in parallel.Buffer 56 is in series by two the second phase inverters 57, and the second phase inverter 57 is also CMOS anti-phase Device.Now the input impedance of control unit is relatively low.Because, in the second phase inverter 57 in CMOS transistor and the first phase inverter 54 The parasitic capacitance of CMOS transistor is all relatively low so that the node capacitor of the input of buffer 56 the 3rd in control unit compared with It is low, and then cause the input impedance in control unit than relatively low, relative to embodiment one, embodiment improves control unit The speed of service, can further reduce the fusing time of electric fuse 53.
Although the present invention is disclosed as above with preferred embodiment, it is not for limiting the present invention, any this area Technical staff without departing from the spirit and scope of the present invention, may be by the methods and techniques content of the disclosure above to this hair Bright technical scheme makes possible variation and modification, therefore, every content without departing from technical solution of the present invention, according to the present invention Any simple modifications, equivalents, and modifications made to above example of technical spirit, belong to technical solution of the present invention Protection domain.

Claims (6)

1. a kind of electric fuse circuit, it is characterised in that including:Control unit and electric fuse;
Described control unit includes:Diode with first input end and the first output end, with the second input and First phase inverter of the second output end, the diode includes the diode of multiple electrical connections in parallel;
The first input end is electrically connected with second input, and first output end is electrically connected with second output end Connect,
One end of the electric fuse is electrically connected with the first input end or the first output end.
2. electric fuse circuit according to claim 1, it is characterised in that described control unit also includes:
Buffer, is made up of the inverter series of even number second, with the 3rd input and the 3rd output end;
The first input end and the second input are electrically connected by the buffer, the 3rd input and described second defeated Enter end electrical connection, the 3rd output end is electrically connected with the first input end.
3. electric fuse circuit according to claim 1, it is characterised in that first phase inverter is CMOS inverter.
4. electric fuse circuit according to claim 2, it is characterised in that second phase inverter is CMOS inverter.
5. electric fuse circuit according to claim 2, it is characterised in that the buffer include two it is described second anti-phase Device.
6. electric fuse circuit according to claim 2, it is characterised in that first phase inverter and second phase inverter Type it is identical.
CN201310232136.0A 2013-06-09 2013-06-09 Electric fuse circuit Active CN104240763B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310232136.0A CN104240763B (en) 2013-06-09 2013-06-09 Electric fuse circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310232136.0A CN104240763B (en) 2013-06-09 2013-06-09 Electric fuse circuit

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CN104240763B true CN104240763B (en) 2017-09-22

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6169393B1 (en) * 1999-05-28 2001-01-02 Fujitsu Limited Trimming circuit
CN1637926A (en) * 2003-12-19 2005-07-13 惠普开发有限公司 Addressing circuit for a cross-point memory array including cross-point resistive elements
CN102339645A (en) * 2010-07-20 2012-02-01 台湾积体电路制造股份有限公司 Electrical fuse memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098491B2 (en) * 2003-12-30 2006-08-29 Taiwan Semiconductor Manufacturing Company, Ltd. Protection circuit located under fuse window

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6169393B1 (en) * 1999-05-28 2001-01-02 Fujitsu Limited Trimming circuit
CN1637926A (en) * 2003-12-19 2005-07-13 惠普开发有限公司 Addressing circuit for a cross-point memory array including cross-point resistive elements
CN102339645A (en) * 2010-07-20 2012-02-01 台湾积体电路制造股份有限公司 Electrical fuse memory

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