CN104239135A - Hybrid task scheduling method of directed acyclic graph (DGA) based reconfigurable system - Google Patents

Abstract

The invention discloses a hybrid task scheduling method of a directed acyclic graph (DGA) based reconfigurable system. The hybrid task scheduling method includes decomposing an application into multiple tasklets described by DGA, and scheduling the tasklets through a scheduler; allowing software tasks to enter a queue Q1, and calculating the software tasks in the queue Q1 according to CPU idling condition and scheduling priority after the software tasks are managed through a task manager; allowing hardware tasks to enter a queue Q2, and further allowing the hardware tasks to enter a queue Q3 if the hardware tasks in the queue Q2 are capable of reutilizing a reconfigurable resource, otherwise, keeping the hardware tasks queuing up in the queue Q2 according to the priority and then configuring and loading through a loader; completing the process of configuring and loading or allowing the tasks in the queue Q3 to enter a queue Q4, allowing the tasks in the queue Q4 to enter a queue Q5 after the tasks are managed via the task manager, then running the tasks according to the priority, sequentially circulating until finishing running of all the tasks, and finally feeding back the total running time. The Q1 refers to the software task queue, the Q2 refers to the preconfigured hardware task queue, the Q3 refers to the configuration reuse queue, the Q4 refers to the configuration completion queue, and the Q5 refers to the running task queue. Configuration frequency is reduced by a configuration reuse strategy, so that the overall scheduling overhead is reduced.

Description

The hybrid tasks scheduling method of the reconfigurable system of directed acyclic graph

Technical field

The present invention relates to Reconfigurable Computation field, specifically a kind of dynamic reconfigurable method for scheduling task.

Background technology

Reconfigurable Computation had both maintained traditional hardware based execution efficiency, maintained again variable architecture, can adapt to the multi-demands in practical application, was current a kind of cutting edge technology.It has broken the boundary line between software and hardware, and its performance, between microprocessor and special IC, is widely used at high-performance computing sector.

The exploitation of research to reconfigurable logic device of Reconfigurable Computing Technology has extremely strong dependence, be that the dynamic reconfigurable device inside of representative is made up of a series of configurable logic block CLBs (Configurable Logic Blocks) with FPGA, this ability of partial reconfigurable that made it possess.It can do corresponding allotment according to application to the resource on reconfigurable logic device, particularly carries out new configuration to the idling-resource of the device that existing task normally performs.In order to make full use of restructural resource, improving the executed in parallel ability of system, needing effectively to manage hardware task and restructural resource.

Existing reconfigurable system can be reduced to and be made up of host CPU and reconfigurable device (FPGA), as Fig. 1, CPU are formed primarily of scheduler, placer and loader, is responsible for the scheduling of reconfigurable task, placement and configuration respectively and loads.Take FPGA as the reconfigurable system of representative exists restructuring procedure and layoutprocedure delay when actual motion, and the data access that repeatedly layoutprocedure is a large amount of, cause the energy consumption of FPGA very large.

A practical application can be divided into software task and hardware task according to certain algorithm.Usually, software task is assigned with and performs on a processor, and hardware task refers to inner comprehensive, width, highly fixing, possess specific function and non-rotatable logic module, could perform on hardware resource after needing configuration, therefore setup time is indispensable.The setup time of reconfigurable hardware task is hidden in the execution time of previous task, it is dispatched.The data that identical logic cell processes is different may be used in the application of many computation-intensives.Therefore, for the task of identical type, by the logical block configured before reusing, can reduce configured number like this, reduce configuration overhead, greatly improve the dispatching efficiency of reconfigurable task.

Summary of the invention

The problem that the present invention is directed to prior art proposes a kind of based on directed acyclic graph (Directed Acyclic Graph, and the reconfigurable task dispatching method of pre-configured priority DAG), application DAG improves pre-configured priority, is specially a kind of hybrid tasks scheduling method of reconfigurable system of directed acyclic graph.

A hybrid tasks scheduling method for the reconfigurable system of directed acyclic graph, described method is as follows: by application decomposition be DAG describe multiple little task through scheduler schedules, software task enters Q ₁, Q ₁in software task after task manager according to CPU whether idle and dispatching priority calculate; And hardware task enters Q ₂, work as Q ₂in hardware task can reuse restructural resource, then enter Q ₃, otherwise continue to remain on Q ₂according to priority queue up, and by loader configuration load; Complete configuration to load or Q ₃in task enter Q ₄, Q ₄in task enter Q through task manager ₅run according to priority, circulate successively, until the whole end of run of task, return total working time; Wherein Q ₁: software task queue, Q ₂: pre-configured hardware task queue, Q ₃: reconfiguration reuse queue, Q ₄: configure queue, Q ₅: operation task queue.

Described task adopts five-tuple { w _i, h _i, c _i, e _i, s _ibe described, w _i, h _iexpression task takies the wide and high of restructural resource, c _ithe setup time of expression task, e _ithe working time of expression task, s _irepresent task type, if software task, then make w _i, h _i, c _ibe zero.

Described dispatching priority is as follows:

$p_i=\mathrm{\α}*\frac{b\_\mathrm{level}+t\_\mathrm{level}}{l_{\max }}+\mathrm{\α}*(1-\frac{w_i+h_i}{S})$

Wherein α is weight system, w _i, h _irepresent the wide, high of task respectively, S represents reconfigurable device rectangular area, and namely t_level value from the top layer of DAG figure, calculates from source node to task T _ithe time overhead of longest path consuming time before node; B_level then from the bottom of DAG figure, calculates from sink nodes to task T _ithe time overhead of the longest path consuming time of node, l _maxrefer to longest path length, l _max=t_level+b_level.

During described calculating t_level, the node listing of building topology order, to the configuration overhead of each father node of list interior joint and run expense and compare, maximal value is wherein as t_level value.

Compared with prior art, advantage of the present invention is:

The present invention utilizes DAG to describe restructural software and hardware task, clearly shows the related communication between each task and precedence relationship.In reconfigurable system structure, scheduler utilizes pre-configured and reconfiguration reuse, first according to considering that the improvement priority affecting task scheduling factor calculates pre-configuration task, by pre-configured part subsequent tasks hidden parts configuration and time delay, configured number can also be reduced by reconfiguration reuse strategy, and then reduce integrated scheduling expense.

Accompanying drawing explanation

Fig. 1 is reconfigurable system simplified model;

Fig. 2 is t_level calculation flow chart;

Fig. 3 is b_level calculation flow chart;

Fig. 4 is the hybrid tasks scheduling model of reconfigurable structures;

Fig. 5 is method flow diagram.

Embodiment

The method comprises scheduler, loader and layout device, scheduler comprises task replacement policy judge module, provisioning module and reconfiguration reuse module, the task that scheduler describes according to DAG and task type, dispatch task respectively and enter software task queue and pre-configured hardware task queue.For the task in software task queue, will according to CPU whether idle and priority calculate; For the task in pre-configured hardware task queue, first apply reconfiguration reuse strategy and judge, if can reuse, then enter reconfiguration reuse queue; If cannot reuse, then utilize pre-configured priority computing method, consider the influence factor to task scheduling length, task less with area in priority scheduling critical path is conducive to reducing time delay, shortens scheduling time length.According to priority size is waited for pre-configured, after task run terminates, does not regain the restructural resource that it takies immediately, but allow it continue to keep, can directly perform when new task is identical with its type, when new task does not have resource available, then least recently used algorithm is used to replace.Layout device adopts Bazargan placement algorithm to carry out layout.

Q safeguarded by scheduler ₁: software task queue, Q ₂: pre-configured hardware task queue, Q ₃: reconfiguration reuse queue, Q ₄: configure queue, Q ₅: operation task queue, HTL: hardware task list and FRL: idle rectangle list.

For each new task, with five-tuple { w _i, h _i, c _i, e _i, s _ibe described, w _i, h _iexpression task takies the wide and high of restructural resource, c _ithe setup time of expression task, e _ithe working time of expression task, s _irepresent task type, if software task, then make w _i, h _i, c _ibe zero.

1, reconfigurable task model

With directed acyclic graph (Directed Acyclic Graph, DAG), software and hardware task is described: G=(T, E), T represent set of tasks all in application and | T|=n, directed edge collection E=T × T and | E|=m, E (T _i, T _j) represent T _iand T _jbetween there is data dependence relation.Without loss of generality, regulation DAG of the present invention only comprises unique source node and convergent point.DAG clearly can show communication between each task and precedence relationship, and each node on behalf software/hardware task, directed edge represents the precedence relationship between task, and the weight on limit represents communication overhead.

If T _ioperation result can to T _joperation have an impact, namely at T _iafter end of run, T _jjust can run, claim T _ibe called task T _jpredecessor task, T _jbe called task T _isubsequent tasks.Namely only have predecessor task to be finished, subsequent tasks just can perform.If total task-set is T, T=T _soft∪ T _hard, T _softthe set of all software tasks, T _hardit is the set of all hardware task.For any T _i∈ T, can use five-tuple { w _i, h _i, c _i, e _i, s _i(1≤i≤n) be described, w _i, h _iexpression task takies the wide and high of restructural resource, c _ithe setup time of expression task, ei represents the working time of task, and si represents task type, if T _i∈ T _soft, then w is made _i, h _i, c _ibe zero.

2, pre-configured strategy

Reconfigurable task configuration is downloaded by single passage to implement, and downloads and carry out in a serial fashion.Adopt the pre-configured strategy hiding setup time, namely while previous task run, a rear task is configured, and then the overall operation time can be shortened.The setup time of certain each task is hidden in the working time of previous task all completely, just a kind of ideal situation.On the basis adopting pre-configured strategy, rational option and installment order can reduce time loss substantially.Critical path and task size are the factors affecting task scheduling length, and task less with area in priority scheduling critical path is conducive to reducing time delay, shortens scheduling time length.

3, dispatching priority strategy

According to pre-configured strategy of the present invention, the task in priority scheduling critical path and the less task of area, can shorten the integrated scheduling time.Therefore the calculating of the present invention to dispatching priority improves, and increasing the priority of task and the less task of area in critical path, is below concrete computing formula:

$p_i=\mathrm{\α}*\frac{b\_\mathrm{level}+t\_\mathrm{level}}{l_{\max }}+\mathrm{\α}*(1-\frac{w_i+h_i}{S})$

Wherein α is weight system, gets 0.5, w _i, h _irepresent the wide, high of task respectively, S represents reconfigurable device rectangular area, and the front and rear part of priority expression formula have expressed node path and size respectively on the impact of task scheduling.

Namely t_level value from the top layer of DAG figure, calculates from source node to task T _ithe time overhead of longest path consuming time before node; B_level then from the bottom of DAG figure, calculates from sink nodes to task T _ithe time overhead of the longest path consuming time of node.L _maxrefer to longest path length, l _max=t_level+b_level.

The calculating of t_level and b_level relates to the weights of task image directed edge, the communication overhead namely between task.When calculating t_level, need the node listing of building topology order, to the configuration overhead of each father node of list interior joint and run expense and compare, maximal value is wherein as t_level value; When calculating b_level, need to set up the node listing of opposite topology order, to setup time of each child node of list interior joint and working time and compare calculating.Fig. 2, Fig. 3 sets forth applicable t_level and b_level calculation flow chart of the present invention.

4, reconfiguration reuse strategy

The logical block configured before can utilizing for the task of identical type is reused, and can save setup time like this, improves the dispatching efficiency of reconfigurable task greatly.

The strategy that the present invention takes is after a hardware task is complete, do not regain the restructural resource shared by it immediately, but allow it continue to keep, can directly perform when new task is identical with its type, when new task does not have resource available, least recently used algorithm (Least Recently Used, LRU) is then used to replace.Whether the task that namely first checks before configuration, on hardware task list HTL, if exist, then improves priority, its priority scheduling is performed.

5, method flow

As Fig. 4, it is the hybrid tasks scheduling model based on reconfigurable structures that the present invention proposes.Be the multiple little task that DAG describes by application decomposition, through scheduler schedules, software task enters Q ₁, according to CPU whether idle and priority calculate; And hardware task enters Q ₂, judge Q by replacement policy ₂in task can reuse restructural resource, if can reuse, enter Q ₃if, can not, continue to remain on Q ₂according to priority queue up, and configuration load, complete configuration or Q ₃task enter Q ₄, run according to priority, circulate successively, until the whole end of run of task, return total working time.

Input: DAG exports: the execution time of task

Fig. 5 is the process flow diagram of whole reconfigurable method

Step1: initialization Q ₁, Q ₂, Q ₃, Q ₄, Q ₅, HTC.

The source node of Step2:DAG is T ₁,

If T ₁∈ T _soft, T ₁enter CPU to calculate, return working time, T ₁child node enter Q by type ₁or Q ₂, leave out T ₁node, release T ₁the cpu resource taken.

Else T ₁enter Q ₂, from FRL, select a rectangle to T ₁configuration, enters Q after configuration ₄, then enter Q ₅moving calculation, returns working time, T ₁enter HTL list, T ₁child node enter Q by type ₁or Q ₂, leave out T ₁.

Step3: if CPU is idle, selects Q ₁the task T that medium priority is the highest _i.T _ienter CPU to calculate, return working time, T _ichild node enter Q by type ₁or Q ₂, leave out T _i, release T _ithe cpu resource taken.

Step4: if FRL non-NULL, selects Q ₂the task T that medium priority is the highest _j,

If T _j∈ HTL, T ₁enter Q ₃, after priority+1, arrive Q ₄,

Else T _jq is entered after configuration ₄.

Step5:Q ₄middle in-degree be 0 task enter Q ₅moving calculation, returns working time, and task enters HTL list, and the child node of this task is entered Q by type ₁or Q ₂, leave out this task.

Step6: repeat Step2 ~ Step5, until Q ₁, Q ₂for sky, return total working time.

Claims (4)

1. a hybrid tasks scheduling method for the reconfigurable system of directed acyclic graph, is characterized in that described method is as follows: by application decomposition be DAG describe multiple little task through scheduler schedules, software task enters Q ₁, Q ₁in software task after task manager according to CPU whether idle and dispatching priority calculate; And hardware task enters Q ₂, work as Q ₂in hardware task can reuse restructural resource, then enter Q ₃, otherwise continue to remain on Q ₂according to priority queue up, and by loader configuration load; Complete configuration to load or Q ₃in task enter Q ₄, Q ₄in task enter Q through task manager ₅run according to priority, circulate successively, until the whole end of run of task, return total working time; Wherein Q ₁: software task queue, Q ₂: pre-configured hardware task queue, Q ₃: reconfiguration reuse queue, Q ₄: configure queue, Q ₅: operation task queue.

2. the hybrid tasks scheduling method of the reconfigurable system of a kind of directed acyclic graph according to claim 1, is characterized in that described task adopts five-tuple { w _i, h _i, c _i, e _i, s _ibe described, w _i, h _iexpression task takies the wide and high of restructural resource, c _ithe setup time of expression task, e _ithe working time of expression task, s _irepresent task type, if software task, then make w _i, h _i, c _ibe zero.

3. the hybrid tasks scheduling method of the reconfigurable system of a kind of directed acyclic graph according to claim 1, is characterized in that described dispatching priority is as follows:

$p_i=\mathrm{\α}*\frac{b\_\mathrm{level}+t\_\mathrm{level}}{l_{\max }}+\mathrm{\α}*(1-\frac{w_i+h_i}{S})$

Wherein α is weight system, w _i, h _irepresent the wide, high of task respectively, S represents reconfigurable device rectangular area, and namely t_level value from the top layer of DAG figure, calculates from source node to task T _ithe time overhead of longest path consuming time before node; B_level then from the bottom of DAG figure, calculates from sink nodes to task T _ithe time overhead of the longest path consuming time of node, l _maxrefer to longest path length, l _max=t_level+b_level.

4. the hybrid tasks scheduling method of the reconfigurable system of a kind of directed acyclic graph according to claim 3, when it is characterized in that described calculating t_level, the node listing of building topology order, to the configuration overhead of each father node of list interior joint and run expense and compare, maximal value is wherein as t_level value.