CN104237983A - Method for efficiently producing high-precision multistep microlens array - Google Patents
Method for efficiently producing high-precision multistep microlens array Download PDFInfo
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- CN104237983A CN104237983A CN201410519354.7A CN201410519354A CN104237983A CN 104237983 A CN104237983 A CN 104237983A CN 201410519354 A CN201410519354 A CN 201410519354A CN 104237983 A CN104237983 A CN 104237983A
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Abstract
The invention relates to a method for efficiently producing a high-precision multistep microlens array. The method includes that the step array to be produced is divided into multiple groups including a first group and a second group, the first group and the second group are connected end to end, and steps of each group are continuous in depth; the steps of the first group and the second group are synchronously produced to form two groups of steps identical in corresponding depth; the steps in the second group are integrally etched by certain depth and form the step array continuous in depth with the steps in the first group. By the method, the steps in different groups are created synchronously, so that producing efficiency is greatly improved, and cost is saved.
Description
Technical field
The present invention relates to a kind of method making multiple stage rank microlens array.
Background technology
The microminiature lens of microlens array to be a series of diameter be millimeter, micron dimension are by the array necessarily rearranged.Lenticule manufactured by micro-optic technology and microlens array little, lightweight with its volume, be convenient to the advantages such as integrated, array, become new scientific research development direction.
Along with the fast development of modern information technologies, lenticule is increasingly extensive in the application of every field.At present, lenticule militarily or on civilian all plays very important effect.In some developed countries such as Japan and the United States, English, morals, lenticular research is caused to the great attention of government department, competitively invest money in developing this optics Disciplinary Frontiers and militarily, as operation when infrared acquisition, precise guidance, scouting, search and early warning and night and inclement weather such as to assist at the application of aspect.At civil area, lenticule has also been applied in duplicating machine, image analyzer, facsimile recorder, camera and medical sanitary apparatus.Utilize lenticule can converge light, improve the factor of filling a vacancy of device, solve the continuous reduction because planar array detector pixel dimension requires and the optics cross-talk, the fill factor, curve factor that occur are not high and degradation problem under detection sensitivity.
Diffraction microlens is according to Fresnel zone plate principle design, make circular step, each circular step is centered by optical axis, each annulus is equivalent to an independently plane of refraction, these circular band all can make incident ray converge to same focus. and number of steps is more, and its diffraction efficiency is higher.
Microlens array often adopts the method for making of chemical wet etching.Since binary optical proposes, alignment law technology is particularly suitable for the making of diffraction microlens array, and wherein lenticular border is easily accomplished neat and sharp-pointed, and activity coefficient can reach 100%, and lightweight, cost is low, be easy to microminiaturized, array.
Its precision of traditional method for making is ensured by mask plate.Due to problems such as the impact of exposure accuracy in a photolithographic process, alignment precision and development precision and errors, lenticule cumulative errors is larger, seriously reduces the optical properties such as its diffraction efficiency.So utilize traditional method for making to be difficult to make high-precision lenticule.
Summary of the invention
The object of this invention is to provide a kind of method making multiple stage rank microlens array, in order to solve the problem that existing method for making Production Time is long, cost is high.
For achieving the above object, the solution of the present invention comprises:
The method of efficient making high precision multiple stage rank microlens array, substrate is produced the step of initial depth at equal intervals, then step array to be produced is divided into some groups, comprise first group, second group, first group end to end with second group, and each step often organized is degree of depth continuous print; Synchronous making first group and each step of second group, form identical two the organizing a performance rank of the corresponding degree of depth; Second group of step integral is etched certain degree of depth, to organize a performance rank Formation Depth continuous print step array with first.
The method of described making multiple stage rank microlens array is applicable to sacrifice layer production method or back-exposure production method; In operation, adopt barrier bed or do not adopt barrier bed.
In manufacturing process, the stepped area etched is protected, non-protection zone is etched; In operation, adopt barrier bed or do not adopt barrier bed.
Described sacrifice layer production method is: make sacrifice layer at making layer upper surface, barrier bed is made at sacrifice layer upper surface, at barrier bed upper surface spin coating photoresist, non-lithographic region is blocked with mask plate, only expose the first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, 15 patterned area, to described first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, after 15 patterned area removes barrier bed and sacrifice layer, etch, obtain and have the first concordant table top, 3rd accurate table top, 5th accurate table top, 7th table top, 9th table top, tenth table top surely, 13 accurate table top, first semi-manufacture of the 15 accurate table top,
Photoresist is made at described first semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the neighboring region of the 3rd patterned area and described 3rd patterned area, the neighboring region of the 7th patterned area and described 7th patterned area, 11 patterned area and the described neighboring region of the 11 patterned area and the neighboring region of the 15 patterned area and described 15 patterned area, remove the 3rd patterned area and the 3rd patterned area neighboring region photomask surface glue, the photoresist on the neighboring region surface of the 7th patterned area and described 7th patterned area, the photoresist on the neighboring region surface of the 11 patterned area and described 11 patterned area, and the 15 photoresist on neighboring region surface of patterned area and described 15 patterned area, to the 3rd patterned area, 7th patterned area, 11 patterned area and the 15 patterned area etch, obtain three table top lower than the first table top, 7th accurate table top, tenth table top and the 15 accurate table top surely, remove remaining photoresist, obtain the second semi-manufacture,
Make protective seam at described second semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the second semi-manufacture, and except the first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, the protective seam of the 13 accurate table top and the 15 accurate table top upper surface, at reservation first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, second semi-manufacture upper surface of the protective seam of the 13 accurate table top and the 15 accurate table top upper surface makes sacrifice layer, barrier bed is made at sacrifice layer upper surface, photoresist is made at barrier bed upper surface, block non-lithographic region with mask plate, only expose the second patterned area and the second patterned area neighboring region, 6th patterned area and the 6th patterned area neighboring region, tenth patterned area and the tenth patterned area neighboring region and the 14 patterned area and the 14 patterned area neighboring region, to described second patterned area, 6th patterned area, after tenth patterned area and the 14 patterned area remove barrier bed and sacrifice layer, etch, obtain the second lower than the first table top and higher than the 3rd table top table top, 6th accurate table top, tenth accurate table top and the 14 accurate table top, remove remaining protective seam, obtains the 3rd semi-manufacture,
Photoresist is made at described 3rd semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 5th table top reduced successively, 6th table top, 7th table top, 13 accurate table top, 4th semi-manufacture of the 14 accurate table top and the 15 accurate table top,
Make protective seam at described 4th semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the 4th semi-manufacture, and except the 4th table top, the protective seam of the 12 table top upper surface, at reservation second table top, 3rd table top, 5th table top, 6th table top, 7th table top, 8th table top, 9th table top, tenth table top, 11 table top, 13 table top, 14 table top, 4th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes sacrifice layer, barrier bed is made at sacrifice layer upper surface, photoresist is made at barrier bed upper surface, non-lithographic region is blocked with mask plate, only expose the 4th patterned area and the 4th patterned area neighboring region, 12 patterned area and the 12 patterned area neighboring region, to described 4th patterned area, after 12 patterned area removes barrier bed and sacrifice layer, etch, obtain four table top low and higher than the 5th table top than the 3rd table top, the ten two accurate table top low and higher than the 13 table top than the 11 table top, obtain the 5th semi-manufacture,
Photoresist is made at described 5th semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 9th table top reduced successively, tenth table top, 11 table top, 12 table top, 13 table top, 6th semi-manufacture of the 14 table top and the 15 table top,
Protective seam is made at described 6th semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the 5th semi-manufacture, and remove the protective seam of the 9th table top upper surface, at reservation first table top, second, 3rd table top, 4th table top, 5th table top, 6th table top, 7th table top, 9th table top, tenth table top, 11 table top, 12 table top, 13 table top, 14 table top, 6th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes photoresist, non-lithographic region is blocked with mask plate, only expose the 8th patterned area and the 8th patterned area neighboring region, 8th patterned area is etched, obtain eight table top low and higher than the 9th table top than the 7th table top, remove remaining protective seam, obtain the making layer that upper surface has 16 ladder table tops.
Described sacrifice layer adopts polyimide or photoresist, and described barrier bed adopts chromium, and described protective seam adopts silicon dioxide.
Making layer is quartz, silicon, germanium.
Described back-exposure mode is: make barrier bed at making layer upper surface, at barrier bed upper surface spin coating positive photoresist, non-lithographic region is blocked with mask plate, only expose the first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, 15 patterned area, to described first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, after 15 patterned area removes barrier bed, etch, obtain and have the first concordant table top, 3rd accurate table top, 5th accurate table top, 7th table top, 9th table top, tenth table top surely, 13 accurate table top, first semi-manufacture of the 15 accurate table top,
Positive photoresist is made at described first semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the neighboring region of the 3rd patterned area and described 3rd patterned area, the neighboring region of the 7th patterned area and described 7th patterned area, 11 patterned area and the described neighboring region of the 11 patterned area and the neighboring region of the 15 patterned area and described 15 patterned area, remove the positive photoresist on the 3rd patterned area and the 3rd patterned area neighboring region surface, the positive photoresist on the neighboring region surface of the 7th patterned area and described 7th patterned area, the positive photoresist on the neighboring region surface of the 11 patterned area and described 11 patterned area, and the 15 positive photoresist on neighboring region surface of patterned area and described 15 patterned area, to the 3rd patterned area, 7th patterned area, 11 patterned area and the 15 patterned area etch, obtain three table top lower than the first table top, 7th accurate table top, tenth table top and the 15 accurate table top surely, remove remaining positive photoresist, obtain the second semi-manufacture,
Protective seam is made at described second semi-manufacture upper surface, by back-exposure development reservation first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, second semi-manufacture upper surface of the protective seam of the 13 accurate table top and the 15 accurate table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the second patterned area and the second patterned area neighboring region, 6th patterned area and the 6th patterned area neighboring region, tenth patterned area and the tenth patterned area neighboring region and the 14 patterned area and the 14 patterned area neighboring region, to the second patterned area, 6th patterned area, after tenth patterned area and the 14 patterned area remove barrier bed, etch, obtain the second lower than the first table top and higher than the 3rd table top table top, 6th accurate table top, tenth accurate table top and the 14 accurate table top, remove remaining protective seam, obtain the 3rd semi-manufacture,
Positive photoresist is made at described 3rd semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 5th table top reduced successively, 6th table top, 7th table top, 13 accurate table top, 4th semi-manufacture of the 14 accurate table top and the 15 accurate table top,
Protective seam is made at described 4th semi-manufacture upper surface, reservation second table top is developed in by back-exposure, 3rd table top, 5th table top, 6th table top, 7th table top, 8th table top, 9th table top, tenth table top, 11 table top, 13 table top, 14 table top, 4th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the 4th patterned area and the 4th patterned area neighboring region, 12 patterned area and the 12 patterned area neighboring region, to the 4th patterned area, after 12 patterned area removes barrier bed, etch, obtain four table top low and higher than the 5th table top than the 3rd table top, the ten two accurate table top low and higher than the 13 table top than the 11 table top, obtain the 5th semi-manufacture,
Positive photoresist is made at described 5th semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area, 15 patterned area and the 16 patterned area, to described 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area, 15 patterned area and the 16 patterned area etch, obtain the 9th table top reduced successively, tenth table top, 11 table top, 12 table top, 13 table top, 6th semi-manufacture of the 14 table top the 15 table top and the 16 table top,
Protective seam is made at described 6th semi-manufacture upper surface, reservation first table top is developed in by back-exposure, second, 3rd table top, 4th table top, 5th table top, 6th table top, 7th table top, 9th table top, tenth table top, 11 table top, 12 table top, 13 table top, 14 table top, 15 table top, 6th semi-manufacture upper surface of the protective seam of the 16 table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the 8th patterned area and the 8th patterned area neighboring region, after barrier bed is removed to the 8th patterned area, etch, obtain eight table top low and higher than the 9th table top than the 7th table top, remove protective seam and positive photoresist, obtain the making layer that upper surface has 16 ladder table tops.
Described protective seam adopts negative polyimide or negative photoresist, and described barrier bed adopts chromium.
Described making layer is the quartz of ultraviolet light material.
Adopt method of the present invention, packet synchronization makes, and greatly improves make efficiency, provides cost savings.As for 16 steps, by process optimization, reticle quantity is optimized minimizing, makes making 16 step high precision microlens array only need seven pieces of versions, greatly save cost of manufacture.
In addition; the present invention is by protecting etch areas; non-protection zone is etched; the region of the non-etching of effective stop; etch areas needed for accurate etching; solving the error problem of lenticule making because very easily occurring in the operations such as mask aligning, photoetching, etching dexterously, meeting high-precision requirement in lenticule manufacturing process, effectively ensureing and improve the optical properties such as lenticule diffraction benefit.
Accompanying drawing explanation
Fig. 1 ~ Figure 10 is that the present invention adopts sacrificial layer technology to make 16 step microlens array process schematic; Fig. 1 is the present invention's etching process schematic diagram; Fig. 2 is the secondarily etched process schematic of the present invention; Fig. 3 is that the present invention once peels off sacrifice layer protection process schematic; Fig. 4 is the present invention's three etching process schematic diagram; Fig. 5 is the present invention's four etching process schematic diagram; Fig. 6 is that secondary of the present invention peels off sacrifice layer protection process schematic; Fig. 7 is the present invention's five etching process schematic diagram; Fig. 8 is the present invention's six etching process schematic diagram; Fig. 9 is that the present invention peels off sacrifice layer protection process schematic for three times; Figure 10 is the present invention's seven etching process schematic diagram;
Wherein: a1 is making layer; A2 is sacrifice layer; A3 is barrier bed; A4 is positive photoresist; A501, a502, a503, a504, a505, a506, a507 are multiple stage rank diffraction microlens mask plates; A6 is protective seam;
Figure 11 ~ Figure 20 is that the present invention adopts back-exposure fabrication techniques 16 step microlens array process schematic; Figure 11 is the present invention's etching process schematic diagram; Figure 12 is the secondarily etched process schematic of the present invention; Figure 13 is the present invention's back-exposure protection process schematic; Figure 14 is the present invention's three etching process schematic diagram; Figure 15 is the present invention's four etching process schematic diagram; Figure 16 is the secondary back side of the present invention exposure protection process schematic; Figure 17 is the present invention's five etching process schematic diagram; Figure 18 is the present invention's six etching process schematic diagram; Figure 19 is the present invention's three back-exposure protection process schematic; Figure 20 is the present invention's seven etching process schematic diagram;
Wherein: b1 is making layer; B2 is barrier bed; B3 is positive photoresist; B4 protective seam; B501, b502, b503, b504, b505, b506, b507 are multiple stage rank microlens array mask plates.
Figure 21 is the 16 step lenticule schematic diagram that the present invention makes.
Embodiment
Below in conjunction with accompanying drawing, the present invention will be further described in detail.
Embodiment 1
The invention provides the method for a kind of ingenious making multiple stage rank microlens array, be applied to 16 step microlens arrays, specific embodiment comprises:
1.1.1, once etch, see Fig. 1.
1) cleaned up by silicon chip a1, spin coating one deck sacrifice layer a2, has then grown chromium film a3, last spin coating one deck positive photoresist a4;
2) carry out photoetching development with mask plate a501, mask plate a501 comprises eight endless belt herein, and photoresist exposure imaging region is equal with dry etching region;
3) silicon chip a1 surface chromium film a3 is removed, cleaning positive photoresist a4;
4) etching sacrificial layer a2, exposes the region needing to carry out dry etching, adopts dry etching technology once to etch, takes out silicon chip a1 after etching.
1.1.2, secondarily etched, refer to Fig. 2.
1) silicon chip a1 is first cleaned up, spin coating one deck positive photoresist a4;
2) corrosion of aligning photoetching development is carried out with mask plate a502, mask plate a502 comprises four endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopt dry etching technology to carry out secondarily etched silicon chip a1, take out silicon chip 1 after etching, remove remaining photoresist.
1.1.3, etch for three times, see Fig. 3, Fig. 4.
1) silicon chip a1 is cleaned up, make protective seam a6;
2) chromium film a3 is removed while removing sacrifice layer a2 with stripping means, the region that remaining protective seam need protect first two steps etched;
3) spin coating one deck sacrifice layer a2 on silicon chip a1, has then grown chromium film a3;
4) at silicon chip a1 surface spin coating one deck positive photoresist a4, carry out photoetching development corrosion with mask plate a503, expose the region needing to carry out dry etching.Mask plate a503 comprises four endless belt herein, and photoresist exposure imaging region is greater than dry etching region, because of the existence of protective seam, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
5) remove silicon chip a1 surface chromium film a3, etching sacrificial layer a2, exposes the region needing to carry out dry etching;
6) adopt dry etching technology to carry out three etchings, after etching, take out silicon chip; Photoresist remaining for silicon chip a1 surface is removed.
1.1.4, etch for four times, refer to Fig. 5.
1) silicon chip a1 is made positive photoresist a4;
2) corrosion of aligning photoetching development is carried out with mask plate a504, mask plate a504 comprises six endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopted by silicon chip a1 dry etching technology to carry out four etchings, take out silicon chip 1 after etching, remove remaining photoresist.
1.1.5, etch for five times, see Fig. 6, Fig. 7.
1) silicon chip a1 is made protective seam a6;
2) chromium film a3 is removed while removing sacrifice layer a2 with stripping means, the region that remaining protective seam need protect front four steps etched;
3) spin coating one deck sacrifice layer a2 on a silicon substrate, has then grown chromium film a3;
4) make positive photoresist a4 on silicon chip a1 surface, carry out photoetching development corrosion with mask plate a505, expose the region needing to carry out dry etching.Mask plate a505 comprises two endless belt herein, photoresist exposure imaging region is greater than dry etching region, principle is the same, because of the existence of sacrifice layer, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
5) remove silicon chip a1 surface chromium film a3, etching sacrificial layer a2, exposes the region needing to carry out dry etching;
6) adopt dry etching technology to carry out five etchings, after etching, take out silicon chip; Photoresist remaining for silicon chip a1 surface is removed.
1.1.6, etch for six times, refer to Fig. 8.
1) silicon chip a1 is made positive photoresist a4;
2) corrosion of aligning photoetching development is carried out with mask plate a506, mask plate a506 comprises seven endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopted by silicon chip a1 dry etching technology to carry out six etchings, take out silicon chip 1 after etching, remove remaining photoresist.
1.1.7, etch for seven times, see Fig. 9, Figure 10, Figure 21.
1) silicon chip a1 is made protective seam a6;
2) remove chromium film a3 while removing sacrifice layer a2 with stripping means, remaining protective seam need protect the first six to walk etched region;
3) make positive photoresist a4 on silicon chip a1 surface, carry out photoetching development corrosion with mask plate a507, expose the region needing to carry out dry etching.Mask plate a507 comprises an endless belt herein, photoresist exposure imaging region is greater than dry etching region, principle is the same, because of the existence of sacrifice layer, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
4) adopted by silicon chip a1 dry etching technology to carry out seven etchings, after etching, take out silicon chip a1; Photoresist remaining for silicon chip a1 surface and protective seam are removed.
The present invention adopts sacrificial layer technology, is not only applicable to the materials such as the quartz of ultraviolet light, and is applicable to not saturating ultraviolet light but the material such as silicon, germanium that matching is higher, cost is low.Above embodiment have employed barrier bed, relative to not adopting barrier bed, and better effects if.
Embodiment 2
The invention provides the method for a kind of ingenious making multiple stage rank microlens array, be applied to 16 step fused silica microlens, specific embodiment comprises:
2.1.1, once etch, see Figure 11.
1) quartz substrate b1 is cleaned up, grown chromium film b2, then spin coating one deck positive photoresist b4;
2) carry out photoetching development with mask plate b501, mask plate b501 comprises eight endless belt herein, and photoresist exposure imaging region is equal with dry etching region;
3) quartz substrate b1 surface chromium film b2 is removed, cleaning positive photoresist b3;
4) adopting dry etching technology once to etch needing the region of carrying out dry etching, after etching, taking out quartz substrate b1.
2.1.2, secondarily etched, refer to Figure 12.
1) quartz substrate b1 is first cleaned up, spin coating one deck positive photoresist b3;
2) corrosion of aligning photoetching development is carried out with mask plate b502, mask plate b502 comprises four endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopt dry etching technology to carry out secondarily etched quartz substrate b1, take out quartz substrate b1 after etching, remove remaining photoresist.
2.1.3, etch for three times, see Figure 13, Figure 14.
1) quartz substrate b1 is cleaned up, make protective seam b4;
2) use back-exposure technology, chromium film b2 serves as reticle, the region that remaining protective seam need protect first two steps etched;
3) at quartz substrate b1 surface spin coating one deck positive photoresist b3, carry out photoetching development corrosion with mask plate b503, expose the region needing to carry out dry etching.Mask plate b503 comprises four endless belt herein, and photoresist exposure imaging region is greater than dry etching region, because of the existence of protective seam, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
4) quartz substrate b1 surface chromium film b2 is removed;
5) adopted by quartz substrate b1 dry etching technology to carry out three etchings, after etching, take out quartz substrate b1; Photoresist remaining for quartz substrate b1 surface is removed.
2.1.4, etch for four times, refer to Figure 15.
1) quartz substrate b1 is made positive photoresist b3;
2) corrosion of aligning photoetching development is carried out with mask plate b504, mask plate b504 comprises six endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopted by quartz substrate b1 dry etching technology to carry out four etchings, take out quartz substrate 1 after etching, remove remaining photoresist.
2.1.5, etch for five times, see Figure 16, Figure 17.
1) quartz substrate b1 is made protective seam b4;
2) use back-exposure technology, chromium film b2 serves as reticle, the region that remaining protective seam need protect front four steps etched;
3) make positive photoresist b3 on quartz substrate b1 surface, carry out photoetching development corrosion with mask plate b505, expose the region needing to carry out dry etching.Mask plate b505 comprises two endless belt herein, photoresist exposure imaging region is greater than dry etching region, principle is the same, because of the existence of sacrifice layer, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
4) quartz substrate b1 surface chromium film b2 is removed;
5) adopted by quartz substrate b1 dry etching technology to carry out five etchings, after etching, take out quartz substrate b1; Photoresist remaining for quartz substrate b1 surface and protective seam are removed.
2.1.6, etch for six times, refer to Figure 18.
1) quartz substrate b1 is made positive photoresist b3;
2) corrosion of aligning photoetching development is carried out with mask plate b506, mask plate b506 comprises seven endless belt herein, photoresist exposure imaging region is greater than dry etching region, reduce the requirement of mask plate alignment precision on the one hand, during etching, photoresist and chromium film work as etching barrier layer jointly on the other hand, etching precision is ensured by both, and during etching, chromium film can compensate positive photoresist photoetching development and aim at the error caused;
3) adopted by quartz substrate b1 dry etching technology to carry out six etchings, take out quartz substrate b1 after etching, remove remaining photoresist.
2.1.7, etch for seven times, see Figure 19, Figure 20, Figure 21.
1) quartz substrate b1 is made protective seam b4;
2) use back-exposure technology, chromium film b2 serves as reticle, the region that remaining protective seam need protect front four steps etched;
3) make positive photoresist b3 on quartz substrate b1 surface, carry out photoetching development corrosion with mask plate b507, expose the region needing to carry out dry etching.Mask plate b507 comprises an endless belt herein, photoresist exposure imaging region is greater than dry etching region, principle is the same, because of the existence of sacrifice layer, form a kind of self aligned mode, reduce the accuracy requirement in alignment procedures, but well ensure that the precision of etching, etching precision is ensured by protective seam;
4) quartz substrate b1 surface chromium film b2 is removed;
5) adopted by quartz substrate b1 dry etching technology to carry out seven etchings, after etching, take out quartz substrate b1; Photoresist remaining for quartz substrate b1 surface and protective seam are removed.
The present invention adopts back-exposure technology, is applicable to the materials such as the quartz of ultraviolet light.Above embodiment have employed barrier bed, relative to not adopting barrier bed, and better effects if.
Embodiment 3
The invention provides the method for a kind of ingenious making multiple stage rank microlens array, be applied to 11 step microlens arrays, only need retain 11 steps and with the manufacture craft of getting out of a predicament or an embarrassing situation, manufacture crafts more than 11 steps be removed.In particular embodiments, in once etching, mask plate 501a or 501b only includes five endless belt; Secondarily etched middle mask plate 502a or 502b only includes two endless belt; In three etchings, mask plate 503a or 503b only includes three endless belt; In four etchings, mask plate 504a or 504b only includes three endless belt; In five etchings, mask plate 505a or 505b only includes an endless belt; In six etchings, mask plate 506a or 506b only includes two endless belt; In seven etchings, mask plate 507a or 507b only includes an endless belt, and other techniques and embodiment 1 are roughly the same.
Be presented above concrete embodiment, but the present invention is not limited to described embodiment.
Sum up, basic scheme of the present invention is: first, and substrate is produced the step of initial depth at equal intervals; And then on interval on the step of each initial depth and between each step, etch, form the step of set depth.Then step to be produced is divided into several groups end to end successively, namely each step is degree of depth continuous print in each group; That is, first group and second group must be comprised.As embodiment 1, embodiment 2, first, by 16 steps (d1, d2, d3 ... d16) be divided into two resistances, often organize 8 steps, d1-d8 is first group, and d9-d16 is second group.
Then to these several groups, synchronously make, make each group to form one group of continuous step, the corresponding step depth of each group is identical.As embodiment 1, synchronously make, until state shown in Fig. 7.
Finally, the more overall etching of other groups that will do not complete, until the step array required by being formed.As embodiment 1, rank that second in Fig. 7 is organized a performance (its degree of depth is identical with first group, is d1-d8) entirety etching, Formation Depth d9-d16.
As other embodiments, to organize a performance rank, as d17-d24 if also have the 3rd, the rank that then need to organize a performance three all etch step into the continuous degree of depth of d1-d8, then by second group of step integral etching, to reach d8-d16, again by the 3rd group of step integral etching, to reach degree of depth d17-d24.Also can by second group, the 3rd group simultaneously entirety etch into degree of depth d8-d16, finally overall etching the 3rd rank of organizing a performance reach degree of depth d17-d24 again.That is, in this stage, can etch a group do not completed by Integratively, the degree of depth of overall etching is relevant to corresponding group of step depth; Also at every turn overallly can etch all groups do not completed, overall etching depth is identical.
Further, in the present invention, after dividing into groups, in each group, also again can divide into groups, then operate according to above-mentioned basic scheme.As in embodiment 1, d1-d8 is 4 steps before this is grouped into, rear four steps, and then synchronous operation, overall etching Formation Depth d1-d8.
Can be found out by embodiment 3, the numbers of steps that the solution of the present invention is respectively divided into groups is not must be identical.
Basic ideas of the present invention are above-mentioned basic scheme, and for those of ordinary skill in the art, according to instruction of the present invention, designing the model of various distortion, formula, parameter does not need to spend creative work.The change carried out embodiment without departing from the principles and spirit of the present invention, amendment, replacement and modification still fall within the scope of protection of the present invention.
Claims (9)
1. the efficient method making high precision multiple stage rank microlens array, it is characterized in that, substrate is produced the step of initial depth at equal intervals, then step array to be produced is divided into some groups, comprise first group, second group, first group end to end with second group, and each step often organized is degree of depth continuous print; Synchronous making first group and each step of second group, form identical two the organizing a performance rank of the corresponding degree of depth; Second group of step integral is etched certain degree of depth, to organize a performance rank Formation Depth continuous print step array with first.
2. method according to claim 1, is characterized in that, the method for described making multiple stage rank microlens array is applicable to sacrifice layer production method or back-exposure production method; In operation, adopt barrier bed or do not adopt barrier bed.
3. method according to claim 2, is characterized in that, in manufacturing process, protects the stepped area etched, etches non-protection zone; In operation, adopt barrier bed or do not adopt barrier bed.
4. method according to claim 3, it is characterized in that, described sacrifice layer production method is: make sacrifice layer at making layer upper surface, barrier bed is made at sacrifice layer upper surface, at barrier bed upper surface spin coating photoresist, non-lithographic region is blocked with mask plate, only expose the first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, 15 patterned area, to described first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, after 15 patterned area removes barrier bed and sacrifice layer, etch, obtain and have the first concordant table top, 3rd accurate table top, 5th accurate table top, 7th table top, 9th table top, tenth table top surely, 13 accurate table top, first semi-manufacture of the 15 accurate table top,
Photoresist is made at described first semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the neighboring region of the 3rd patterned area and described 3rd patterned area, the neighboring region of the 7th patterned area and described 7th patterned area, 11 patterned area and the described neighboring region of the 11 patterned area and the neighboring region of the 15 patterned area and described 15 patterned area, remove the 3rd patterned area and the 3rd patterned area neighboring region photomask surface glue, the photoresist on the neighboring region surface of the 7th patterned area and described 7th patterned area, the photoresist on the neighboring region surface of the 11 patterned area and described 11 patterned area, and the 15 photoresist on neighboring region surface of patterned area and described 15 patterned area, to the 3rd patterned area, 7th patterned area, 11 patterned area and the 15 patterned area etch, obtain three table top lower than the first table top, 7th accurate table top, tenth table top and the 15 accurate table top surely, remove remaining photoresist, obtain the second semi-manufacture,
Make protective seam at described second semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the second semi-manufacture, and except the first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, the protective seam of the 13 accurate table top and the 15 accurate table top upper surface, at reservation first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, second semi-manufacture upper surface of the protective seam of the 13 accurate table top and the 15 accurate table top upper surface makes sacrifice layer, barrier bed is made at sacrifice layer upper surface, photoresist is made at barrier bed upper surface, block non-lithographic region with mask plate, only expose the second patterned area and the second patterned area neighboring region, 6th patterned area and the 6th patterned area neighboring region, tenth patterned area and the tenth patterned area neighboring region and the 14 patterned area and the 14 patterned area neighboring region, to described second patterned area, 6th patterned area, after tenth patterned area and the 14 patterned area remove barrier bed and sacrifice layer, etch, obtain the second lower than the first table top and higher than the 3rd table top table top, 6th accurate table top, tenth accurate table top and the 14 accurate table top, remove remaining protective seam, obtains the 3rd semi-manufacture,
Photoresist is made at described 3rd semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 5th table top reduced successively, 6th table top, 7th table top, 13 accurate table top, 4th semi-manufacture of the 14 accurate table top and the 15 accurate table top,
Make protective seam at described 4th semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the 4th semi-manufacture, and except the 4th table top, the protective seam of the 12 table top upper surface, at reservation second table top, 3rd table top, 5th table top, 6th table top, 7th table top, 8th table top, 9th table top, tenth table top, 11 table top, 13 table top, 14 table top, 4th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes sacrifice layer, barrier bed is made at sacrifice layer upper surface, photoresist is made at barrier bed upper surface, non-lithographic region is blocked with mask plate, only expose the 4th patterned area and the 4th patterned area neighboring region, 12 patterned area and the 12 patterned area neighboring region, to described 4th patterned area, after 12 patterned area removes barrier bed and sacrifice layer, etch, obtain four table top low and higher than the 5th table top than the 3rd table top, the ten two accurate table top low and higher than the 13 table top than the 11 table top, obtain the 5th semi-manufacture,
Photoresist is made at described 5th semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 9th table top reduced successively, tenth table top, 11 table top, 12 table top, 13 table top, 6th semi-manufacture of the 14 table top and the 15 table top,
Protective seam is made at described 6th semi-manufacture upper surface, peel off remaining sacrifice layer and barrier bed on the 5th semi-manufacture, and remove the protective seam of the 9th table top upper surface, at reservation first table top, second, 3rd table top, 4th table top, 5th table top, 6th table top, 7th table top, 9th table top, tenth table top, 11 table top, 12 table top, 13 table top, 14 table top, 6th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes photoresist, non-lithographic region is blocked with mask plate, only expose the 8th patterned area and the 8th patterned area neighboring region, 8th patterned area is etched, obtain eight table top low and higher than the 9th table top than the 7th table top, remove remaining protective seam, obtain the making layer that upper surface has 16 ladder table tops.
5. method according to claim 4, is characterized in that, described sacrifice layer adopts polyimide or photoresist, and described barrier bed adopts chromium, and described protective seam adopts silicon dioxide.
6. method according to claim 4, is characterized in that, making layer is quartz, silicon, germanium.
7. method according to claim 3, it is characterized in that, described back-exposure mode is: make barrier bed at making layer upper surface, at barrier bed upper surface spin coating positive photoresist, non-lithographic region is blocked with mask plate, only expose the first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, 15 patterned area, to described first patterned area, 3rd patterned area, 5th patterned area, 7th patterned area, 9th patterned area, 11 patterned area, 13 patterned area, after 15 patterned area removes barrier bed, etch, obtain and have the first concordant table top, 3rd accurate table top, 5th accurate table top, 7th table top, 9th table top, tenth table top surely, 13 accurate table top, first semi-manufacture of the 15 accurate table top,
Positive photoresist is made at described first semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the neighboring region of the 3rd patterned area and described 3rd patterned area, the neighboring region of the 7th patterned area and described 7th patterned area, 11 patterned area and the described neighboring region of the 11 patterned area and the neighboring region of the 15 patterned area and described 15 patterned area, remove the positive photoresist on the 3rd patterned area and the 3rd patterned area neighboring region surface, the positive photoresist on the neighboring region surface of the 7th patterned area and described 7th patterned area, the positive photoresist on the neighboring region surface of the 11 patterned area and described 11 patterned area, and the 15 positive photoresist on neighboring region surface of patterned area and described 15 patterned area, to the 3rd patterned area, 7th patterned area, 11 patterned area and the 15 patterned area etch, obtain three table top lower than the first table top, 7th accurate table top, tenth table top and the 15 accurate table top surely, remove remaining positive photoresist, obtain the second semi-manufacture,
Protective seam is made at described second semi-manufacture upper surface, by back-exposure development reservation first table top, 3rd table top, 5th accurate table top, 7th accurate table top, 9th accurate table top, tenth table top surely, second semi-manufacture upper surface of the protective seam of the 13 accurate table top and the 15 accurate table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the second patterned area and the second patterned area neighboring region, 6th patterned area and the 6th patterned area neighboring region, tenth patterned area and the tenth patterned area neighboring region and the 14 patterned area and the 14 patterned area neighboring region, to the second patterned area, 6th patterned area, after tenth patterned area and the 14 patterned area remove barrier bed, etch, obtain the second lower than the first table top and higher than the 3rd table top table top, 6th accurate table top, tenth accurate table top and the 14 accurate table top, remove remaining protective seam, obtain the 3rd semi-manufacture,
Positive photoresist is made at described 3rd semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area, to described 5th patterned area, 6th patterned area, 7th patterned area, 13 patterned area, 14 patterned area and the 15 patterned area etch, obtain the 5th table top reduced successively, 6th table top, 7th table top, 13 accurate table top, 4th semi-manufacture of the 14 accurate table top and the 15 accurate table top,
Protective seam is made at described 4th semi-manufacture upper surface, reservation second table top is developed in by back-exposure, 3rd table top, 5th table top, 6th table top, 7th table top, 8th table top, 9th table top, tenth table top, 11 table top, 13 table top, 14 table top, 4th semi-manufacture upper surface of the protective seam of the 15 table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the 4th patterned area and the 4th patterned area neighboring region, 12 patterned area and the 12 patterned area neighboring region, to the 4th patterned area, after 12 patterned area removes barrier bed, etch, obtain four table top low and higher than the 5th table top than the 3rd table top, the ten two accurate table top low and higher than the 13 table top than the 11 table top, obtain the 5th semi-manufacture,
Positive photoresist is made at described 5th semi-manufacture upper surface, non-lithographic region is blocked with mask plate, only expose the 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area, 15 patterned area and the 16 patterned area, to described 9th patterned area, tenth patterned area, 11 patterned area, 12 patterned area, 13 patterned area, 14 patterned area, 15 patterned area and the 16 patterned area etch, obtain the 9th table top reduced successively, tenth table top, 11 table top, 12 table top, 13 table top, 6th semi-manufacture of the 14 table top the 15 table top and the 16 table top,
Protective seam is made at described 6th semi-manufacture upper surface, reservation first table top is developed in by back-exposure, second, 3rd table top, 4th table top, 5th table top, 6th table top, 7th table top, 9th table top, tenth table top, 11 table top, 12 table top, 13 table top, 14 table top, 15 table top, 6th semi-manufacture upper surface of the protective seam of the 16 table top upper surface makes positive photoresist, non-lithographic region is blocked with mask plate, only expose the 8th patterned area and the 8th patterned area neighboring region, after barrier bed is removed to the 8th patterned area, etch, obtain eight table top low and higher than the 9th table top than the 7th table top, remove protective seam and positive photoresist, obtain the making layer that upper surface has 16 ladder table tops.
8. method according to claim 7, is characterized in that, described protective seam adopts negative polyimide or negative photoresist, and described barrier bed adopts chromium.
9. method according to claim 7, is characterized in that, described making layer is the quartz of ultraviolet light material.
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107275194A (en) * | 2017-06-29 | 2017-10-20 | 杭州士兰集成电路有限公司 | The manufacture method of hierarchic structure |
CN111300163A (en) * | 2020-02-29 | 2020-06-19 | 湖南大学 | Manufacturing method of ion beam polished large-area monolithic integrated Fabry-Perot cavity color filter |
CN111421390A (en) * | 2020-02-29 | 2020-07-17 | 湖南大学 | Ion beam polishing processing method for manufacturing micro-nano step array structure |
CN114744065A (en) * | 2022-03-23 | 2022-07-12 | 中国电子科技集团公司第十一研究所 | Non-contact photoetching method for mesa structure chip |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001296416A (en) * | 2000-04-14 | 2001-10-26 | Canon Inc | Method for manufacturing device or method for manufacturing diffraction optical device, and die for manufacture of diffraction optical device, diffraction optical device and optical system such as optical appliance by that method for manufacturing diffraction optical device |
JP2002311220A (en) * | 2001-04-18 | 2002-10-23 | Alps Electric Co Ltd | Optical member and optical device which uses the same |
CN1402047A (en) * | 2002-07-13 | 2003-03-12 | 华中科技大学 | Process for mfg. multi-phase diffraction optic element |
JP2004341395A (en) * | 2003-05-19 | 2004-12-02 | Alps Electric Co Ltd | Optical element |
CN1877372A (en) * | 2005-06-08 | 2006-12-13 | 冲电气工业株式会社 | Diffraction optical element and production method thereof |
CN101885466A (en) * | 2010-06-13 | 2010-11-17 | 东南大学 | Method for manufacturing and packaging MEMS (Micro-electromechanical System) infrared detector by binary optical glass lens |
-
2014
- 2014-09-30 CN CN201410519354.7A patent/CN104237983B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001296416A (en) * | 2000-04-14 | 2001-10-26 | Canon Inc | Method for manufacturing device or method for manufacturing diffraction optical device, and die for manufacture of diffraction optical device, diffraction optical device and optical system such as optical appliance by that method for manufacturing diffraction optical device |
JP2002311220A (en) * | 2001-04-18 | 2002-10-23 | Alps Electric Co Ltd | Optical member and optical device which uses the same |
CN1402047A (en) * | 2002-07-13 | 2003-03-12 | 华中科技大学 | Process for mfg. multi-phase diffraction optic element |
JP2004341395A (en) * | 2003-05-19 | 2004-12-02 | Alps Electric Co Ltd | Optical element |
CN1877372A (en) * | 2005-06-08 | 2006-12-13 | 冲电气工业株式会社 | Diffraction optical element and production method thereof |
CN101885466A (en) * | 2010-06-13 | 2010-11-17 | 东南大学 | Method for manufacturing and packaging MEMS (Micro-electromechanical System) infrared detector by binary optical glass lens |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107275194A (en) * | 2017-06-29 | 2017-10-20 | 杭州士兰集成电路有限公司 | The manufacture method of hierarchic structure |
CN107275194B (en) * | 2017-06-29 | 2020-01-24 | 杭州士兰集成电路有限公司 | Method for manufacturing stepped structure |
CN111300163A (en) * | 2020-02-29 | 2020-06-19 | 湖南大学 | Manufacturing method of ion beam polished large-area monolithic integrated Fabry-Perot cavity color filter |
CN111421390A (en) * | 2020-02-29 | 2020-07-17 | 湖南大学 | Ion beam polishing processing method for manufacturing micro-nano step array structure |
CN111421390B (en) * | 2020-02-29 | 2021-10-12 | 湖南大学 | Ion beam polishing processing method for manufacturing micro-nano step array structure |
CN114744065A (en) * | 2022-03-23 | 2022-07-12 | 中国电子科技集团公司第十一研究所 | Non-contact photoetching method for mesa structure chip |
CN114744065B (en) * | 2022-03-23 | 2024-06-14 | 中国电子科技集团公司第十一研究所 | Non-contact photoetching method for mesa structure chip |
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