CN104224157B - It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device - Google Patents
It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device Download PDFInfo
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- CN104224157B CN104224157B CN201410507204.4A CN201410507204A CN104224157B CN 104224157 B CN104224157 B CN 104224157B CN 201410507204 A CN201410507204 A CN 201410507204A CN 104224157 B CN104224157 B CN 104224157B
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/02—Detecting, measuring or recording pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography or electroauscultation; Heart catheters for measuring blood pressure
- A61B5/024—Detecting, measuring or recording pulse rate or heart rate
Abstract
The invention discloses a kind of rhythm of the heart identification circuit of the highly reliable low amount of calculation being applied to wearable device and method, it includes at least one software filter, one normally opened software phase-lock loop, at least one standby software phase-lock loop and a control logic unit K, each standby software phase-lock loop is in parallel with normally opened software phase-lock loop respectively, the signal output part of described software filter is connected with normally opened software phase-lock loop and standby software phase-lock loop respectively, described normally opened software phase-lock loop and each standby software phase-lock loop all include rhythm signal outfan and frequency overflow indicator outfan, rhythm signal outfan and frequency overflow indicator outfan are connected with control logic unit K respectively.The present invention is less demanding to the signal to noise ratio of signal, and robustness is good, and identification range is very wide, and the requirement to processor for the method is extremely low, low in energy consumption, and high reliability is high, amount of calculation low it is adaptable to wearable device.
Description
Technical field
The present invention relates to a kind of rhythm of the heart identification circuit of the highly reliable low amount of calculation being applied to wearable device and method.
Background technology
With social progress and growth in the living standard, people for healthy demand also more and more higher, traditional pin
People are not adapted to for the ill Health Management Mode seen a doctor healthy is needed further exist for, people are more desirable to obtain
To beautiful environment, body and mind is comfortable, green is harmless, comprehensively accurate, economical convenient, and the new detection meanss that can prevent trouble before it happens.
In wearable health monitoring device, it is typically necessary from electrocardio（ECG）Signal, photoplethysmographic are traced
Method（PPG）The rhythm of the heart is calculated, in new daily wearable device, because human motion in signal, resistance volumetric method signal
With the reason environmental disturbances, primary signal is often mixed into substantial amounts of interference signal, and method often requires that amount of calculation is high, causes
Power consumption is high.
Content of the invention
It is an object of the invention to overcoming the deficiencies in the prior art, provide that a kind of signal to noise ratio to signal is less demanding, Shandong
Highly reliable, the low amount of calculation being applied to wearable device that rod is good, identification range is very wide, the requirement to processor for the method is extremely low
Rhythm of the heart identification circuit and method.
The purpose of the present invention is achieved through the following technical solutions：It is applied to the highly reliable low calculating of wearable device
The rhythm of the heart identification circuit of amount, it includes at least one software filter, normally opened software phase-lock loop, at least one a standby software
Phaselocked loop and a control logic unit K, each standby software phase-lock loop software in parallel with normally opened software phase-lock loop respectively, described
The signal output part of wave filter is connected with normally opened software phase-lock loop and standby software phase-lock loop respectively, described normally opened software phlase locking
Ring and each standby software phase-lock loop all include rhythm signal outfan and frequency overflow indicator outfan, rhythm signal outfan and
Frequency overflow indicator outfan is connected with control logic unit K respectively, and described control logic unit K is used for receiving normally opened software
Rhythm signal and frequency overflow indicator signal that phaselocked loop and standby software phase-lock loop are exported, and believed according to frequency overflow indicator
Number start corresponding frequencies scope standby software phase-lock loop.
Described software filter is made up of software filter F1 and software filter F2, and software filter F1 and software are filtered
Ripple device F2 connects, and described software filter F1 is low pass filter, and described software filter F2 is high pass filter.
Described normally opened software phase-lock loop and standby software phase-lock loop also include signal quality outfan.
Described normally opened software phase-lock loop and standby software phase-lock loop include two software voltage controlled oscillator C1 and C2, four
Software low pass filter F3, F4, F5 and F6, a high pass filter F7, arc tangent circuit, peaker, integrating circuit, amplitude limit
Agitator and absolute value circuit, the input signal of software phase-lock loop is divided into I, Q respectively after software voltage controlled oscillator C1 and C2
Two-way, then inputted to arc tangent circuit by software low pass filter F3 and F4 respectively, the output of arc tangent circuit connects differential
Circuit, a road output of peaker connects software low pass filter F5, and the output of software low pass filter F5 connects integration electricity
Road, a road output of integrating circuit connects amplitude limiting oscillation device, and another road output frequency overflow indicator OF of integrating circuit connects control
Logical block K processed, amplitude limiting oscillation Qi mono- road output frequency f connects control logic unit K, another road output point of amplitude limiter circuit
Not with software voltage controlled oscillator C1, by 90oPhase-shift circuit is connected with software voltage controlled oscillator C2, and another road of peaker is defeated
Go out to connect high pass filter F7, the output of high pass filter F7 connects absolute value circuit and connects, and the output of absolute value circuit connects
Low pass filter F6, low pass filter F6 export quality signal QS.
It is applied to the rhythm of the heart recognition methodss of the highly reliable low amount of calculation of wearable device, it comprises the following steps：
S1：Input signal completes to filter by software filter；
S2：To normally opened filtering phaselocked loop, normally opened filtering phaselocked loop calculates the rhythm of the heart to filtered signal input, and exports the rhythm of the heart
Frequency, signal quality and frequency overflow indicator signal are to control logic unit K；
S3：Control logic unit K differentiates to input signal, if the non-break bounds of frequency of filtering phaselocked loop, exports the heart
Rule frequency resultant simultaneously terminates；If the frequency break bounds of normally opened filtering phaselocked loop, enter step S4；
S4：Control logic unit K opens original standby filtering phaselocked loop and signal is identified, and calculates the rhythm of the heart,
And export rhythm of the heart frequency, signal quality and frequency overflow indicator signal to control logic unit K, return to step S3.
The calculating rhythm of the heart described in step S2 or step S3 includes following sub-step：
S01：Input signal respectively with two softwares voltage controlled oscillator C1, C2 are multiplied, and are divided into I, Q two-way, then pass through respectively
Software low pass filter；
S02：Carry out arc tangent transformation calculations and go out phase contrast；
S03：Phase contrast is carried out differential and obtains frequency difference；
S04：The frequency difference that step S03 is obtained is divided into two-way, leads up to low pass filter elimination wink step noise and enters
Enter step S05, another road exports to high pass filter the fluctuation obtaining frequency difference, then calculates by absolute value and low-pass filtering
Device quality of output signals QS；
S05：The data that step S04 is obtained is integrated：
S06：The result of integration is divided into two-way, a road output frequency overflow indicator OF, and another road output result is shaken to amplitude limit
Swing device；
S07：Amplitude limiting oscillation Qi mono- road output frequency f, the output of another road is controlled to software voltage controlled oscillator.
The invention has the beneficial effects as follows：The present invention first carries out low-pass filtering and high-pass filtering respectively to input signal, then
Input and calculated to normally opened filtering phaselocked loop, if the non-break bounds of frequency, output result, if frequency break bounds, open standby filtering
Phaselocked loop is calculated；The present invention is less demanding to the signal to noise ratio of signal, and robustness is good, and identification range is very wide, and method is to process
The requirement of device is extremely low, is suitable for the system of low-power consumption.
Brief description
Fig. 1 is present configuration block diagram；
Fig. 2 is phase-locked loop structures block diagram；
Fig. 3 is the inventive method flow chart.
Specific embodiment
Technical scheme is described in further detail below in conjunction with the accompanying drawings：As shown in figure 1, F1 be low pass filter,
F2 is high pass filter, and K is control logic, and P2 is normally opened software phase-lock loop, and P2 covers the common rhythm of the heart scope of human body（Every point
Clock 60-90 time）, P1, P3, P4 are standby software phase-lock loop, and normally opened software phase-lock loop and standby software phase-lock loop effectively lock frequency
Rate scope covers the possible rhythm of the heart scope of whole human body（45-200 time per minute）.Each phaselocked loop except output the rhythm of the heart in addition to,
Also export effective locking signal intensity and frequency overflow indicator.Each phaselocked loop can also independently enable, and control logic can be closed
Break or open each phaselocked loop.
P2 phaselocked loop can not turn off, and is always running, and in most cases, only P2 phaselocked loop is running, other locks
Phase ring is closed.In the case of P2 frequency break bounds, control logic can according to circumstances be opened other phaselocked loops and signal is known
Not.Control logic exports effective rhythm of the heart value according to following state diagram.
Each software phase-lock loop P1, P2, P3 and P4 is as shown in Fig. 2 described normally opened software phase-lock loop and standby software locks
Phase ring includes two software voltage controlled oscillator C1 and C2, four softwares low pass filter F3, F4, F5 and F6, a high-pass filtering
Device F7, arc tangent circuit, peaker, integrating circuit, amplitude limiting oscillation device and absolute value circuit, the input signal of software phase-lock loop
It is divided into I, Q two-way after software voltage controlled oscillator C1 and C2 respectively, then passes through software low pass filter F3 and F4 respectively and input
To arc tangent circuit, the output of arc tangent circuit connects peaker, and a road output of peaker connects software low-pass filtering
The output of device F5, software low pass filter F5 connects integrating circuit, and a road output of integrating circuit connects amplitude limiting oscillation device, integration
Another road output frequency overflow indicator OF of circuit connects control logic unit K, and amplitude limiting oscillation Qi mono- road output frequency f connects
Control logic unit K, another road output of amplitude limiter circuit respectively with software voltage controlled oscillator C1, pass through 90oPhase-shift circuit with soft
Part voltage controlled oscillator C2 connects, and another road output of peaker connects high pass filter F7, and the output of high pass filter F7 is even
Connect absolute value circuit to connect, the output of absolute value circuit connects low pass filter F6, and low pass filter F6 exports quality signal QS.
Input signal obtains I, Q two-way after being multiplied with software voltage controlled oscillator respectively first, then passes through software low pass respectively
Wave filter, then carries out arc tangent transformation calculations and goes out phase contrast, then carry out differential to phase contrast obtaining frequency difference.Frequency difference
Eliminated by low pass filter and wink walk noise, control software voltage controlled oscillator after integration, amplitude limit.Integrating circuit also exports one
Frequency overflow indicator OF, oscillator output frequencies f.Frequency difference draws the fluctuation of frequency difference by high pass filter, then leads to
Signal quality QS is drawn after crossing absolute value calculating and low pass filter.Frequency f, signal quality QS and frequency overflow indicator OF are defeated
Enter and differentiated to control logic.
As shown in Figure 3 it is adaptable to the rhythm of the heart recognition methodss of the highly reliable low amount of calculation of wearable device, it includes following step
Suddenly：
S1：Input signal completes to filter by software filter；
S2：To normally opened filtering phaselocked loop, normally opened filtering phaselocked loop calculates the rhythm of the heart to filtered signal input, and exports the rhythm of the heart
Frequency, signal quality and frequency overflow indicator signal are to control logic unit K；
S3：Control logic unit K differentiates to input signal, if the non-break bounds of frequency of filtering phaselocked loop, exports the heart
Rule frequency resultant simultaneously terminates；If the frequency break bounds of normally opened filtering phaselocked loop, enter step S4；
S4：Control logic unit K opens original standby filtering phaselocked loop and signal is identified, and calculates the rhythm of the heart,
And export rhythm of the heart frequency, signal quality and frequency overflow indicator signal to control logic unit K, return to step S3.
The calculating rhythm of the heart described in step S2 or step S3 includes following sub-step：
S01：Input signal respectively with two softwares voltage controlled oscillator C1, C2 are multiplied, and are divided into I, Q two-way, then pass through respectively
Software low pass filter；
S02：Carry out arc tangent transformation calculations and go out phase contrast；
S03：Phase contrast is carried out differential and obtains frequency difference；
S04：The frequency difference that step S03 is obtained is divided into two-way, leads up to low pass filter elimination wink step noise and enters
Enter step S05, another road exports to high pass filter the fluctuation obtaining frequency difference, then calculates by absolute value and low-pass filtering
Device quality of output signals QS；
S05：The data that step S04 is obtained is integrated：
S06：The result of integration is divided into two-way, a road output frequency overflow indicator OF, and another road output result is shaken to amplitude limit
Swing device；
S07：Amplitude limiting oscillation Qi mono- road output frequency f, the output of another road is controlled to software voltage controlled oscillator.
Signal initially enters P2 and carries out rhythm of the heart calculating, if P2 frequency break bounds control logic unit is opened P1 and carried out rhythm of the heart meter
Calculate, if P1 frequency break bounds control logic unit is opened P3 and carried out rhythm of the heart calculating, if P3 frequency break bounds control logic unit opens P4
Carry out rhythm of the heart calculating, by that analogy.
Claims (3)
1. be applied to the rhythm of the heart identification circuit of the highly reliable low amount of calculation of wearable device it is characterised in that：It includes at least one
Individual software filter, normally opened software phase-lock loop, at least one standby software phase-lock loop and a control logic unit K, respectively
Standby software phase-lock loop is in parallel with normally opened software phase-lock loop respectively, the signal output part of described software filter respectively with normally opened
Software phase-lock loop and standby software phase-lock loop connect, and described normally opened software phase-lock loop and each standby software phase-lock loop all include the heart
Rate signal output part and frequency overflow indicator outfan, heart rate signal outfan and frequency overflow indicator outfan respectively with control
Logical block K connects, and described control logic unit K is used for receiving normally opened software phase-lock loop and standby software phase-lock loop is exported
Heart rate signal and frequency overflow indicator signal, and the standby software according to frequency overflow indicator signal enabling corresponding frequencies scope
Phaselocked loop；
Described normally opened software phase-lock loop and standby software phase-lock loop include two software voltage controlled oscillator C1 and C2, four softwares
Low pass filter F3, F4, F5 and F6, a high pass filter F7, arc tangent circuit, peaker, integrating circuit, amplitude limiting oscillation
Device and absolute value circuit, the input signal of software phase-lock loop is divided into I, Q two-way respectively after software voltage controlled oscillator C1 and C2,
Inputted to arc tangent circuit by software low pass filter F3 and F4 respectively again, the output of arc tangent circuit connects peaker,
One tunnel output of peaker connects software low pass filter F5, and the output of software low pass filter F5 connects integrating circuit, amasss
One tunnel output of parallel circuit connects amplitude limiting oscillation device, and another road output frequency overflow indicator OF of integrating circuit connects control logic
Unit K, amplitude limiting oscillation Qi mono- road output frequency f connects control logic unit K, another road output of amplitude limiter circuit respectively with soft
Part voltage controlled oscillator C1, pass through 90oPhase-shift circuit is connected with software voltage controlled oscillator C2, and another road output of peaker connects
The output of high pass filter F7, high pass filter F7 connects absolute value circuit, and the output of absolute value circuit connects low pass filter
F6, low pass filter F6 export quality signal QS.
2. the rhythm of the heart identification circuit of the highly reliable low amount of calculation being applied to wearable device according to claim 1, it is special
Levy and be：Described software filter is made up of software filter F1 and software filter F2, and software filter F1 and software are filtered
Ripple device F2 connects, and described software filter F1 is low pass filter, and described software filter F2 is high pass filter.
3. be applied to the rhythm of the heart recognition methodss of the highly reliable low amount of calculation of wearable device it is characterised in that：It includes following step
Suddenly：
S1：Input signal completes to filter by software filter；
S2：To normally opened filtering phaselocked loop, normally opened filtering phaselocked loop calculates heart rate to filtered signal input, and exports heart rate, letter
Number quality and frequency overflow indicator signal are to control logic unit K；
S3：Control logic unit K differentiates to input signal, if the non-break bounds of frequency of filtering phaselocked loop, output heart rate knot
Fruit is simultaneously terminated；If the frequency break bounds of normally opened filtering phaselocked loop, enter step S4；
S4：Control logic unit K opens original standby filtering phaselocked loop and signal is identified, and calculates heart rate, and defeated
Go out heart rate, signal quality and frequency overflow indicator signal to control logic unit K, return to step S3；
Calculating heart rate described in step S2 or step S4 includes following sub-step：
S01：Input signal respectively with two softwares voltage controlled oscillator C1, C2 are multiplied, and are divided into I, Q two-way, then pass through software respectively
Low pass filter；
S02：Carry out arc tangent transformation calculations and go out phase contrast；
S03：Phase contrast is carried out differential and obtains frequency difference；
S04：The frequency difference that step S03 is obtained is divided into two-way, leads up to low pass filter and eliminates wink step noise entrance step
Rapid S05, another road exports to high pass filter the fluctuation obtaining frequency difference, then is calculated defeated with low pass filter by absolute value
Go out signal quality QS；
S05：The data that step S04 is obtained is integrated：
S06：The result of integration is divided into two-way, a road output frequency overflow indicator OF, and another road output result is to amplitude limiting oscillation device；
S07：Amplitude limiting oscillation Qi mono- road output frequency f, the output of another road is controlled to software voltage controlled oscillator.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410507204.4A CN104224157B (en) | 2014-09-28 | 2014-09-28 | It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device |
| PCT/CN2015/086182 WO2016045455A1 (en) | 2014-09-28 | 2015-08-05 | Highly reliable and low computational load heart rhythm recognition circuit and method applicable in wearable device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201410507204.4A CN104224157B (en) | 2014-09-28 | 2014-09-28 | It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device |
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| CN104224157A CN104224157A (en) | 2014-12-24 |
| CN104224157B true CN104224157B (en) | 2017-03-01 |
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| CN104224157B (en) * | 2014-09-28 | 2017-03-01 | 成都维客亲源健康科技有限公司 | It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3811428A (en) * | 1971-12-30 | 1974-05-21 | Brattle Instr Corp | Biological signals monitor |
| CN201612606U (en) * | 2010-01-27 | 2010-10-27 | 尹淑华 | Respiration body temperature heart rate data acquisition system in ward |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5843632A (en) * | 1981-09-01 | 1983-03-14 | テクトロニツクス・インコ−ポレイテツド | Phase fixing circuit |
| CN102946249A (en) * | 2012-12-10 | 2013-02-27 | 北京中科飞鸿科技有限公司 | Frequency synthesizer |
| US10292594B2 (en) * | 2013-03-15 | 2019-05-21 | Rochester Institute Of Technology | Method and system for contactless detection of cardiac activity |
| CN103584847B (en) * | 2013-11-06 | 2015-04-22 | 中国人民解放军第三军医大学 | Non-contact magnetic induction heart rate and respiration rate synchronous detection method and system |
| CN103948381B (en) * | 2014-04-09 | 2015-11-04 | 浙江大学 | A kind of for great dynamic range Doppler bio signal formation method |
| CN104224157B (en) * | 2014-09-28 | 2017-03-01 | 成都维客亲源健康科技有限公司 | It is applied to rhythm of the heart identification circuit and the method for the highly reliable low amount of calculation of wearable device |
-
2014
- 2014-09-28 CN CN201410507204.4A patent/CN104224157B/en active Active
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- 2015-08-05 WO PCT/CN2015/086182 patent/WO2016045455A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3811428A (en) * | 1971-12-30 | 1974-05-21 | Brattle Instr Corp | Biological signals monitor |
| CN201612606U (en) * | 2010-01-27 | 2010-10-27 | 尹淑华 | Respiration body temperature heart rate data acquisition system in ward |
Non-Patent Citations (1)
| Title |
|---|
| 应用锁相环IC设计心率显示报警电路;赵毅;《临床医学工程》;20051231;第29卷(第6期);全文 * |
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| WO2016045455A1 (en) | 2016-03-31 |
| CN104224157A (en) | 2014-12-24 |
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Address after: 610000 Sichuan city of Chengdu province high tech Zone (West Tianmu Road) No. 77 poly champagne international unit 1 Building No. 512 10 Applicant after: CHENGDU VCARE QINYUAN HEALTH TECHNOLOGY CO., LTD. Address before: High tech Zone Renhe street Chengdu city Sichuan province 610000 No. 39 1 1 storey building No. 6 Applicant before: CHENGDU JINHAI DINGSHENG SCIENCE & TECHNOLOGY CO., LTD. |
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Address after: 610000 Sichuan city of Chengdu province high tech Zone (West Tianmu Road) No. 77 poly champagne international unit 1 Building No. 512 10 Patentee after: Chengdu weikexin Microelectronics Co., Ltd Address before: 610000 Sichuan city of Chengdu province high tech Zone (West Tianmu Road) No. 77 poly champagne international unit 1 Building No. 512 10 Patentee before: CHENGDU VCARE QINYUAN HEALTH TECHNOLOGY CO., LTD. |