CN104221348B - Integrated circuit, electronic circuit and system for communication interface - Google Patents
Integrated circuit, electronic circuit and system for communication interface Download PDFInfo
- Publication number
- CN104221348B CN104221348B CN201380019336.6A CN201380019336A CN104221348B CN 104221348 B CN104221348 B CN 104221348B CN 201380019336 A CN201380019336 A CN 201380019336A CN 104221348 B CN104221348 B CN 104221348B
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- Prior art keywords
- circuit
- voltage
- integrated circuit
- modem
- signal
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/056—Programming the PLC
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/50—Systems for transmission between fixed stations via two-conductor transmission lines
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25232—DCS, distributed control system, decentralised control unit
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Dc Digital Transmission (AREA)
Abstract
Provide a mean for the system that communication interface is communicated.Integrated circuit includes the circuit for being used to monitor the electric current flowed between two terminals of integrated circuit.Integrated circuit also includes voltage driver circuits, for the voltage between two terminals of IC of modulating.Voltage driver modulates the voltage across two terminals of integrated circuit according to high-speed channel addressable remote transducer agreement, to be encoded to data.
Description
Background technology
Presently disclosed subject matter is related to the communication by voltage modulated and current sense.
Programmable logic controller (PLC) (PLC), dcs (DCS) and auxiliary facility (BOP) are usually using at a high speed
Passage addressable remote transducer (HART) agreement is communicated.Therefore, HART protocol is frequently utilized in asset management.For example,
HART is used for continually scanning for device and acquisition operations data in power plant.The receiver dress communicated based on HART protocol
Put the ability for requiring that the terminal voltage between two terminals is modulated while the loop current flowed between monitoring terminal.Typically
For, HART communication device applies voltage using transformer, without changing electric current.But, using transformer to for example in collection
The solid-state design realized into circuit (such as application specific integrated circuit (ASIC)) is unpractical.To this kind of larger discrete
Relying on for component is hindered in HART protocol realization to the switch block of asic chip.
The content of the invention
Some embodiments that scope matches with initial claimed invention are summarized below.These embodiments are not intended to
Limit the scope of claimed invention, these embodiments but the general introduction of the only estimated possibility form that the present invention is provided.It is real
On border, the present invention can include diversified forms that can be similar or different from examples set forth below.
In the first embodiment, integrated circuit includes being configured to the electricity that monitoring is flowed between two terminals of integrated circuit
The circuit of stream.In addition, integrated circuit includes voltage driver（voltage driver）, it is configured to modulation across integrated circuit
Voltage between two terminals, while being maintained at the electric current flowed between two terminals of integrated circuit.Voltage driver according to
High-speed channel addressable remote transducer (HART) agreement modulates the voltage across two terminals.
One additional embodiment includes a kind of system, including by forming what the wire of current loop was electrically coupled together
Transmitter and receiver.Receiver includes a kind of ASIC, and it includes：It is designed to monitor the circuit for flowing through current loop；And electricity
Driver is pressed, voltage of the modulation across two terminals of current loop is designed to, while being maintained to flow through the electric current of current loop.Transmitting
Device flows through the electric current of current loop by modulating to receiver transmission information, and receiver is by modulating two across current loop
The voltage of individual terminal is to transmitter transmission information.
In an additional embodiment, electronic circuit includes resistor, and it is designed to that the electric current on flowing through current loop comes
Form the voltage across its terminal.Current loop is formed between electronic circuit and radiating circuit.Electronic circuit is also put including difference
Big device, it is designed to the voltage formed on resistor to generate signal.The signal transmission (is adjusted to modulator-demodulator
Modulator-demodulator) and analog-digital converter (ADC) confession processing.In addition, electronic circuit includes Voltag driving circuit, it is from modem
Receive signal, and based on modulating the voltage across the terminal of current loop from modem received signal.
Brief description of the drawings
Read described in detail below by referring to accompanying drawing, it will be best understood from these and other feature, the side of the present invention
In face and advantage, accompanying drawing, similar label represents similar component in the whole text in the accompanying drawings, and accompanying drawing includes：
Fig. 1 shows the HART transmitters and HART receivers being electrically coupled according to an embodiment, with current loop；
Fig. 2 is the voltage for showing according to an embodiment, flowing through the electric current of current loop and the terminal across current loop
Chart；
Fig. 3 is shown according to an embodiment, as the HART receivers for the voltage driver connected with current-sense resistor
The example of circuit；
Fig. 4 shows the circuit-level sketch of HART acceptor circuits shown in Fig. 3；And
Fig. 5 is shown according to an embodiment, using the HART receivers of the voltage driver in parallel with current-sense resistor
The example of circuit.
Embodiment
One or more specific embodiments of the present invention are described below.In the mistake for the brief description for providing these embodiments
May be without the actual all features realized of description in Cheng Zhong, this specification.It should be appreciated that opening in any this actual realization
In hair, as in any engineering or design object, it is necessary to carry out the specific judgement of many realizations to realize developer
Specific objective, for example meet the related limitation related to business of system, these, which are limited, to change to each realize.In addition, should
Work as understanding, this development is probably complicated and time-consuming, but still be benefit from the disclosure technical staff carry out set
Meter, the routine matter for making and manufacturing.
When introducing the element of each embodiment of the present invention, determiner " one ", " one ", "the" and " described " estimated table
Show there are the one or more of element.Term "comprising", " comprising " and " having " are estimated to be included, and represents may be present to remove
Add ons outside listed elements.
Discuss as discussed, the present embodiment, which is related to, to be designed to by high-speed channel addressable remote transducer (HART)
The circuit for the receiver that agreement is communicated.In order to be communicated, voltage driver circuits modulate the terminal voltage of HART receivers,
The loop current that current sensing circuit monitoring simultaneously is flowed between terminal.So, voltage driver circuits keep HART transmittings
The current value that device is provided, while changing the magnitude of voltage of signal as needed.Circuit with these characteristics can be referred to as electric current again
Follower.In certain embodiments, the circuit of HART receivers is made up of discrete assembly, and in other embodiments, the circuit
It is the part of integrated circuit (such as application specific integrated circuit (ASIC)).
In view of the above, an embodiment of HART acceptor circuit of the description for example shown in Fig. 1 can be useful.Institute
Show in embodiment, HART transmitters 10 are electrically coupled to the current loop wire 12 to be formed with the current loop of HART receivers 14.
In order to send information to HART receivers 14, HART transmitters 10 can utilize HART communication protocol.Bell can be used in HART protocol
202 frequency shift keyings (FSK) standard, so as to change the frequency of current signal, so as to which digit order number is adjusted in signal.Current signal
Can be in cycles of 4 mA into 20 mA scopes and sinusoidal low bandwidth direct current (DC) to 25Hz signals.Because HART protocol is
It is semiduplex, so the only electric current of the modulated process current loop wire 12 of HART transmitters 10, or HART receivers 14 can
The voltage of across current loop terminal 13 is modulated in preset time.
The electric current modulated by HART transmitters 10 can flow through current loop wire 12 and flow through HART receivers 14
Current-sense resistor R1.In certain embodiments, current-sense resistor R1 can have 250 Ω value, and implement other
In example, current-sense resistor can have other appropriate resistance values.When electric current flows through current-sense resistor R1, voltage is inclined
Putting can form in current-sense resistor R1 either side.Difference amplifier 16, which can have, is electrically coupled to current-sense resistor R1
Two of either side inputs, and may be designed to generate current signal on the voltage bias across two inputs.When bigger
When electric current flows through current-sense resistor R1, larger voltage bias is formed across either side, and difference amplifier generates larger electricity
Flow signal.The current signal generated by difference amplifier 16 can pass to analog-digital converter (ADC) 18 and HART modulation device-
Demodulator (modem) 20.Analog current signal produced by difference amplifier 16 can be converted to digital letter by ADC 18
Number, it can be explained by communication logic circuit 22.Similarly, HART modem 20 can be to the information entrained by current signal
It is demodulated, and passes information to communication logic circuit 22.In the embodiment shown, capacitor C1 can be in current signal quilt
DC components are filtered from current signal before passing to HART modem 20.Such as the institute of spacing block 24 in HART receivers 14
Show, the circuit of HART receivers 14 provides the electric isolution between HART acceptor circuits and communication logic circuit 22.
In addition to the electric current to flowing through current loop is demodulated, the end of the also modulated current loop of HART receivers 14
Voltage, to transmit information to HART transmitters 10.Communication logic circuit 22 can send information to HART modem 20, with
Just voltage signal is converted to.Summing circuit 26 can receiving voltage signal, and the electric current for flowing through current loop is added into, to adjust
The terminal voltage of current loop processed.It should be noted that summing circuit can add voltage signal, to modulate the terminal voltage of current loop, but
It is that the electric current for flowing through current loop can not changed by the circuit of HART receivers 14.Summing circuit 26 can be referred to as voltage driving again
Device 27.
As described above, in order that communicated with HART protocol, the modulated electricity for flowing through current loop of HART transmitters 10
Stream, and the modulated terminal 13 across current loop of HART receivers 14 voltage.Fig. 2 is to show HART transmitters 10 and HART
The current signal and the chart of voltage signal that may be present in communication between receiver 14.First waveform 40 can represent current-modulation
Signal, and the second waveform 42 can represent voltage modulation signal.As described with it is shown, first waveform 40 can be in 4 mA to 20
Low bandwidth DC in mA scopes is to 25 Hz signals.Information bit can be encoded to current-modulation letter by changing the frequency of signal
Numbers 40.For example, in order to be encoded to digital " 1 ", the set of frequency of current modulated 40 can be 23 by HART transmitters 10
Hz, and in order to be encoded to digital " 0 ", the set of frequency of signal can be 10 Hz by HART transmitters 10.As described, right
This method that information bit is encoded is referred to as frequency shift keying (FSK).
In the same way, FSK can be used to be encoded on voltage modulation signal to information for HART receivers 14.
In illustrated embodiment, voltage modulation signal is 10 modulated using many higher periodicity pitch (500-1000 Hz) Hz weeks
Phase is sinusoidal.If seeing, the modulating frequency of signal is changed, and digit order number is encoded into signal.During the period 44,
The frequency of voltage modulation signal can higher (1000 Hz), so as to be encoded to digital " 1 ".In latter time period 46, frequency
Rate can be with relatively low (500 Hz), so as to be encoded to digital " 0 ".It should be noted that other frequencies can be used to carry out digit order number
Coding, is enough to be distinguished by the circuit of HART transmitters 10 or HART receivers 14 as long as they are fully different.HART launches
Device 10 can couple terminal voltage by device after filtering and demodulator AC, to sense the tone encoded to digital information.
Fig. 3 shows an alternative of HART transmitters shown in Fig. 1 14 circuit.As previously described, launched by HART
The electric current that device 10 is modulated can flow through current loop wire 12 and flow through current-sense resistor R1.Difference amplifier 16 can have
There are two inputs of the either side for being electrically coupled to current-sense resistor R1, with inclined on the voltage across current-sense resistor R1
Put to generate output signal.In the fig. 3 embodiment, the signal generated by difference amplifier 16 can be delivered to ADC 18
Pass through low pass filter 60 before.Low pass filter 60 can remove exchange (AC) component of signal so that ADC 18 receives direct current
(DC) signal.
As shown in figure 1, HART receivers 14 may include HART modem 20, so as to for from the institute of HART transmitters 10
The signal of reception is demodulated, and modulates the terminal voltage of current loop terminal 13.But, the voltage driving of Fig. 3 embodiment
Device 27 may include transistor 62, to form common collector buffer.Shown transistor 62 is PNP bipolar junction transistors (BJT), but
It is that other embodiments may include NPN BJT, p-type metal oxide semiconductor (PMOS) transistor or N-shaped metal oxide half
Conductor (NMOS) transistor.The bias from transistor 62 can be allowed on reflux line 64, wherein summing circuit 26 can be provided
Output voltage for the modulation of terminal voltage.So, the end electricity of the modulated current loop of voltage driver 27 of Fig. 3 embodiment
Pressure, is encoded with pair estimated information for HART transmitters 10.
Fig. 4 circuit diagram shows the circuit of the embodiment of the HART receivers 14 described in Fig. 3 with additional detail.Such as above institute
State, the circuit includes difference amplifier 16, and it is designed to generate signal on flowing through current-sense resistor R1 electric current.Should
Signal travels to ADC 18 and HART modem 20 as shown in Figure 3 in outlet line 67.Resistor R2, R3, R4 and R5
The input and output of difference amplifier 16 can be electrically coupled to, to set the operating parameter of amplifier.In certain embodiments, resistance
Device R2 and R4 can have 100 k Ω value, and resistor R3 and R5 can have 400 k Ω value.In other embodiments, it is other
Resistance is suitably adapted for resistor R2, R3, R4 and R5.In addition, in the embodiment shown, the electric current of outflow HART transmitters 10 is by electricity
Stream source 66 is modeled, because the electric current that flows through current loop is permanent in the terminal voltage of the positively-modulated current loop of HART receivers 14
Fixed.
In the fig. 4 embodiment, it should be noted that the transistor 62 of voltage driver 27 is PMOS transistor, but also may be used
To be PNP BJT transistors or any other appropriate transistor, such as BJT (NPN or PNP), CMOS are partly
Conductor (CMOS) transistor or nmos pass transistor.The summing circuit 26 of voltage driver may include difference amplifier 68, and it is being returned
The bias from transistor 62 is received on Flow Line 64, to provide differential output voltage to the grid of transistor 62.In crystal
During pipe 62 is some embodiments of PNP JBT transistors, difference amplifier can provide difference output electricity to the base stage of transistor 62
Pressure.When the voltage for the base stage or grid for being applied to transistor 62 changes, the impedance of transistor can also change, so as to effectively adjust
Voltage bias between the terminal 13 of current loop processed.
In addition, the difference amplifier 68 of summing circuit 26 can (it be it is determined that be applied to from HART modem output 70
The base stage of transistor 62 or the differential output voltage of grid and therefore also have terminal voltage modulation in terms of work) receive modulation
Signal.In certain embodiments, voltage source can offset the modulated signal from HART modem output 70, to protect all the time
Hold the correct bias on transistor.Correct bias can ensure that to be enough to keep by crystalline substance across the grid of transistor 62 and the voltage of source electrode
The electric current of body pipe 62.Resistor R6, R7, R8, R9 and R10 can be electrically coupled to difference amplifier 68, to set the operation of amplifier
Parameter.In certain embodiments, resistor R6, R8, R9 and R10 can have 100 k Ω value, and resistor R7 can have 1000
K Ω value.In other embodiments, other resistance can be selected for resistor R6, R7, R8, R9 and R10, to permit using HART
The communication of receiver 14.Resistor R11 can represent the resistance of the current loop wire of the return path of HART transmitters 10.
In illustrated embodiment, resistor R11 can have 50 Ω value, and in other embodiments, resistor R11, which can have, represents electricity
Flow any other proper resistor of the resistance of loop wires 12.In addition, some embodiments may include transistor 62 grid or
The ground capacitor C2 of base stage, in order to stabilize the relatively small oscillation that is supplied in the signal of the grid of transistor 62 or base stage or across
The voltage of difference amplifier 68.Capacitor C2 can have 80 pF electric capacity or any other appropriate electric capacity.
Another embodiment of the circuit of HART receivers 14 figure 5 illustrates.The present embodiment includes and Fig. 1, Fig. 3 and Fig. 4
The embodiment identical is used for the circuit for monitoring loop current.But, although Fig. 1, Fig. 3 and Fig. 4 demonstration have and electric current sense
The embodiment of the voltage driver 27 of measuring resistance device R1 series connection, but Fig. 5 implementation is exemplified according to parallel configuration including coupling
Capacitor C3 voltage driver 27.In general, coupled capacitor device is used for the DC components of block signal, while allowing AC components
Pass through.So, when summing circuit 26 from reflux line 64 and HART modem 20 receives signal and to coupled capacitor device
When C3 exports modulated signal, coupled capacitor device C3 modulates the terminal voltage of current loop, and the electric current of loop is flowed through without changing.
It should be noted that coupled capacitor device C3 comparable size is practicable big many to integrated circuit.Bulky capacitor
It can be used to the relatively Low ESR of driving current loop.Coupled capacitor device C3 capacity ratio is practicable to integrated circuit will be big
In the case of, coupled capacitor device C3 can be the outside of the remainder of integrated circuit, and can consume two additional encapsulations and draw
Pin, for integrated circuit is connected into larger circuit.
The technique effect of embodiment includes HART acceptor circuits, and it is designed to the electricity that monitoring is flowed in current loop
Stream, while modulating the terminal voltage of current loop.In certain embodiments, voltage driver circuits and current-sense resistor string
Connection.Difference amplifier can amplify the voltage difference across current-sense resistor, and by signal transmission to HART modem and
Analog-digital converter, to be decoded to HART transmitter transmitted informations.HART modem and from transistor
Feedback signal is summed by summing circuit, and is applied to the grid or base stage of transistor, with modulate current loop terminal it
Between voltage so that effectively to HART transmitters transmit information.The other embodiments of HART acceptor circuits drive voltage
Device circuit is arranged in parallel with current-sense resistor.Coupled capacitor device and feedback driving summing circuit and HART modem
Use cooperatively, to modulate the terminal voltage of current loop, to transmit information to HART transmitters.In embodiments, the circuit
It can be realized in the case where not using transformer, so that HART circuits can be placed on integrated circuit.
This written description uses examples to disclose the present invention, including optimal mode, and also makes the technology of this area
Personnel can implement the present invention, including make and using any device or system and the method that performs any combination.The present invention
The scope of the claims defined by claims, and may include the other examples that those skilled in the art expects.If this
Class other examples have the identical construction unit of word language with claim, or if they include having and power
The equivalent structure unit of the insubstantial difference for the word language that profit is required, then be expected that they are within the scope of the claims.
Claims (20)
1. a kind of integrated circuit for communication interface, including：
Circuit, is configured to the electric current that monitoring is flowed between two terminals of the integrated circuit；
Difference amplifier, signal is generated according to the voltage between the two of integrated circuit terminals；
Modem, is configured to receive the signal generated by the difference amplifier and generates output signal；And
Voltage driver, is configured to be modulated according to the output signal generated by modem across described in the integrated circuit
Voltage between two terminals, while being maintained at the electric current flowed between described two terminals of the integrated circuit；
Wherein described voltage driver is modulated across described integrated according to high-speed channel addressable remote transducer (HART) agreement
The voltage of described two terminals of circuit, to be encoded to data.
2. integrated circuit as claimed in claim 1, wherein, it is provided with electricity between two inputs of the difference amplifier
Hinder device, be configured to be generated according to the electric current flowed between described two terminals of the integrated circuit across two terminal it
Between voltage.
3. integrated circuit as claimed in claim 2, wherein, the voltage driver is arranged to and the resistor in series.
4. integrated circuit as claimed in claim 2, wherein, the voltage driver is arranged to and the capacitor in parallel.
5. a kind of system for communication interface, including：
Transmitter；And
Receiver, including integrated circuit, and the transmitter is electrically coupled to by forming the wire of current loop, it is described integrated
Circuit includes：
Circuit, is configured to monitor the electric current for flowing through the current loop；
Difference amplifier, signal is generated according to the voltage between the two of integrated circuit terminals；
Modem, is configured to receive the signal generated by the difference amplifier and generates output signal；And
Voltage driver, is configured to modulate two across the current loop according to the output signal generated by modem
The voltage of terminal, while being maintained to flow through the electric current of the current loop；
Wherein described transmitter, which is configured to transmit to the receiver by the electric current that modulation flows through the current loop, to be believed
Cease, and the receiver is passed by the voltage modulated across described two terminals of the current loop to the transmitter
Pass information.
6. system as claimed in claim 5, wherein, the modem is configured to for from described in the transmitter
The electric current of modulation is demodulated and modulates the voltage across described two terminals of the current loop.
7. system as claimed in claim 6, including communication logic circuit, it is configured to send information to the modem
To be modulated, and demodulating information is received from the modem.
8. system as claimed in claim 5, wherein, the circuit of the integrated circuit provide the circuit of the integrated circuit with it is outer
Electric isolution between portion's circuit.
9. a kind of electronic circuit for communication interface, including：
Resistor, is configured to carry out shape for flowing through the electric current of the current loop formed between the electronic circuit and radiating circuit
Into the voltage across its terminal；
Difference amplifier, is configured to the voltage that is formed for the resistor to generate signal, wherein by the signal
Modulator-demodulator (modem) and analog-digital converter are passed to for processing；
Modem, is configured to receive the signal generated by the difference amplifier and generates output signal, and
Voltag driving circuit, is configured to receive the output signal generated by the modem, and based on by the modulation
The output signal of demodulator generation modulates the voltage across the terminal of the current loop.
10. electronic circuit as claimed in claim 9, wherein, the electronic circuit carrys out shape entirely as the part of integrated circuit
Into.
11. electronic circuit as claimed in claim 9, wherein, the electronic circuit includes at least one discrete assembly.
12. electronic circuit as claimed in claim 9, wherein, the Voltag driving circuit is arranged to and the resistor in series.
13. electronic circuit as claimed in claim 12, wherein, the Voltag driving circuit includes：
Transistor, is configured to the signal based on the grid for being applied to the transistor to modulate across the end of the current loop
The voltage of son；And
Summing circuit, is configured to the output signal generated from the modem be added the letter for flowing through the transistor
Number, and produced signal is applied to the grid of the transistor.
14. electronic circuit as claimed in claim 13, wherein, the transistor includes bipolar junction transistor (BJT).
15. electronic circuit as claimed in claim 13, wherein, the transistor includes metal oxide semiconductor transistor
(MOSFET)。
16. electronic circuit as claimed in claim 12, wherein, the Voltag driving circuit includes summing circuit, and it is configured to
The output signal generated from the modem is added the signal for flowing through the current loop, to modulate across the electric current
The voltage of the terminal of loop.
17. electronic circuit as claimed in claim 9, wherein, the Voltag driving circuit is arranged to and the capacitor in parallel.
18. electronic circuit as claimed in claim 17, wherein, the Voltag driving circuit includes：
Summing circuit, is configured to the output signal generated from the modem be added the electricity for flowing through the current loop
Stream, to generate produced signal；And
Coupled capacitor device, is configured to make exchange (AC) component of the produced signal from the summing circuit to pass through, with
Modulate the voltage across the terminal of the current loop.
19. electronic circuit as claimed in claim 9, including low pass filter, its be configured to by the signal transmission to institute
The high fdrequency component for the signal that the difference amplifier is generated is filtered out before stating analog-digital converter.
20. electronic circuit as claimed in claim 9, wherein, the electronic circuit does not include transformer.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2013/072847 WO2014146243A1 (en) | 2013-03-19 | 2013-03-19 | Current loop voltage modulator for communication interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104221348A CN104221348A (en) | 2014-12-17 |
| CN104221348B true CN104221348B (en) | 2017-07-18 |
Family
ID=51579267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380019336.6A Expired - Fee Related CN104221348B (en) | 2013-03-19 | 2013-03-19 | Integrated circuit, electronic circuit and system for communication interface |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP2832071A4 (en) |
| CN (1) | CN104221348B (en) |
| WO (1) | WO2014146243A1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016082840A1 (en) * | 2014-11-28 | 2016-06-02 | Pr Electronics A/S | Low-power hart transmitter |
| JP7113677B2 (en) * | 2018-06-19 | 2022-08-05 | 三菱重工業株式会社 | Signal processor and signal processing module |
| US20200162076A1 (en) * | 2018-11-16 | 2020-05-21 | Analog Devices Global Unlimited Company | Communication transmitter interface for current-loop circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101147181A (en) * | 2005-03-31 | 2008-03-19 | 罗斯蒙德公司 | Process control loop current verification |
| WO2011119892A1 (en) * | 2010-03-24 | 2011-09-29 | Mark Sinreich | Power management circuit for a wireless communication device and process control system using same |
| CN102736513A (en) * | 2011-03-29 | 2012-10-17 | 通用电气公司 | Hart channel interface component including redundancy |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6850973B1 (en) * | 1999-09-29 | 2005-02-01 | Fisher-Rosemount Systems, Inc. | Downloadable code in a distributed process control system |
| US7262693B2 (en) * | 2004-06-28 | 2007-08-28 | Rosemount Inc. | Process field device with radio frequency communication |
| US8786128B2 (en) * | 2010-05-11 | 2014-07-22 | Rosemount Inc. | Two-wire industrial process field device with power scavenging |
| CN102538904A (en) * | 2010-12-08 | 2012-07-04 | 上海自动化仪表股份有限公司 | HART (Highway Addressable Remote Transducer)-communication-based capacitive level transmitter and working method thereof |
-
2013
- 2013-03-19 CN CN201380019336.6A patent/CN104221348B/en not_active Expired - Fee Related
- 2013-03-19 WO PCT/CN2013/072847 patent/WO2014146243A1/en active Application Filing
- 2013-03-19 EP EP13878673.6A patent/EP2832071A4/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101147181A (en) * | 2005-03-31 | 2008-03-19 | 罗斯蒙德公司 | Process control loop current verification |
| WO2011119892A1 (en) * | 2010-03-24 | 2011-09-29 | Mark Sinreich | Power management circuit for a wireless communication device and process control system using same |
| CN102736513A (en) * | 2011-03-29 | 2012-10-17 | 通用电气公司 | Hart channel interface component including redundancy |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104221348A (en) | 2014-12-17 |
| EP2832071A1 (en) | 2015-02-04 |
| WO2014146243A1 (en) | 2014-09-25 |
| EP2832071A4 (en) | 2015-11-18 |
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