CN104221286A - Apparatus and method for non-latching, bi-directional communication over an electrically isolated data link - Google Patents
Apparatus and method for non-latching, bi-directional communication over an electrically isolated data link Download PDFInfo
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- CN104221286A CN104221286A CN201380017997.5A CN201380017997A CN104221286A CN 104221286 A CN104221286 A CN 104221286A CN 201380017997 A CN201380017997 A CN 201380017997A CN 104221286 A CN104221286 A CN 104221286A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/01759—Coupling arrangements; Interface arrangements with a bidirectional operation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01843—Coupling arrangements; Interface arrangements using bipolar transistors only with a bidirectional operation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/14—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/20—Repeater circuits; Relay circuits
- H04L25/26—Circuits with optical sensing means, i.e. using opto-couplers for isolation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Electronic Switches (AREA)
- Optical Communication System (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Dc Digital Transmission (AREA)
Abstract
An isolation apparatus and method are provided for bi-directional communication over a single wire link without circuit latch up. The isolation is provided by two identical but independent switching circuits designed to eliminate latch up while controlling two optical isolators in a bi-directional mode of operation.
Description
Technical field
The present invention relates generally to a kind of bi-directional data circuit, and relates more specifically to the isolation of the bi-directional data circuit in charger.
Background technology
The electric isolution of bidirectional traffic is needed especially in the communication system adopting single line link.But the two-way buffer circuit used in the past will in the face of the problem of locking.Such as, locking situation can be there is when becoming low level at receive logic passage and exported to by this input low level it exports, this output and then be detected as low level, and this low level signal is back to input, causes original input to be dragged down/be blocked as low level.Even if also can keep this locking situation of not wishing to exist when removing outside low level drive singal.
Charger, such as those chargers for charging for the battery of portable radio apparatus, usually adopt the two-way circuit of the electric isolution being used for data flow, and therefore can run into the locking problem of above-mentioned discussion.Such as in multi-part charger, the noise coupling from a charger casket to another can cause locking situation.Similarly, when computer is coupled to multi-part charger, such as data retrieval and programming, grounded circuit can cause locking situation.The locking situation of charger can cause abnormal charging and/or bring error condition to indicate to user.
Therefore, a kind of two-way circuit of improvement is needed.This circuit will be of value to various electronic device, such as battery charger.
Accompanying drawing explanation
Identical reference marker in the accompanying drawings in each schematic diagram refers to identical or intimate element, accompanying drawing is incorporated to specification and forms its part, for further illustrate according to each embodiment of the present invention and for explaining its each principle and advantage together with hereafter describing in detail.
Fig. 1 is the schematic diagram of the buffer circuit according to each embodiment.
Fig. 2 is the flow chart of the method for isolating bidirectional data line according to each embodiment.
Fig. 3 is the charger operated according to each embodiment.
Those skilled in the art will recognize that element in accompanying drawing is for concise and to the point and clearly illustration purpose and not necessarily drawing in proportion.Such as, in accompanying drawing, the size of some element can be exaggerated relative to other elements, thus contributes to improving the understanding to the embodiment of the present invention.
Embodiment
Before detailed description is according to embodiments of the invention, should be noted that embodiment relates generally to device feature and wherein for isolating the method step of two-way communication on single line link.Therefore, device feature and method step are suitably represented by the conventional sign in accompanying drawing, it only illustrates those details relevant with understanding the embodiment of the present invention, so that not because of will easily apparent details and make present disclosure obscure concerning to benefit from those skilled in the art of illustrating herein.
In brief, there is provided herein a kind of intercommunication system of the effective electric isolution for bidirectional traffic.There is provided a kind of circuit, its two-way communication when not having circuit locking in delimitation order wired link.By being designed to eliminate locking and controlling that two of two optical isolators in the two-way mode of operation are identical but independent switch provides described isolation simultaneously.Each embodiment is very beneficial for the electronic circuit of any product for adopting two-way data/address bus or telecommunication circuit, such as battery charger design.
In this article, such as first and second, the relational terms at top and bottom etc. is only for distinguishing an entity or operation and another entity or operation when not necessarily needing or imply such relation or the order of any reality between these entities or operation.Term " comprises ", " to include " or its any other modification is intended to contain the not exclusive implication comprised, make to comprise the technique of a series of element, method, goods or device and not only comprise those elements, also can comprise clearly do not listed or these techniques, method, goods or device inherence other elements, by " comprising one " carry out the element modified again not more restrictions when do not get rid of another similar elements in technique, method, goods or the device comprising this element.
To recognize that the embodiments of the invention that illustrate can by one or more conventional processors and the stored program instruction controlling the uniqueness that described one or more processor realizes herein, and location sensing circuit and some non-processor circuit, position sensing some, major part or repertoire and storage and share the method composition of the positional information illustrated herein.Non-processor circuit can include but not limited to radio receiver, transmitting set, signal driver, clock circuit, power circuit and user input apparatus.Similarly, these functions can be interpreted as the step of the method that final controlling element position details is shared.Alternatively, some or all of function performs by not having the state machine of stored program instruction or more than one application-specific integrated circuit (ASIC) (ASIC), and wherein some combination of each function or some function is implemented as customized logic.Certainly, the combination of two kinds of methods can be adopted.Therefore, the method and apparatus for these functions has been described in this article.And, although when by concept disclosed herein and guidance of principle, such as pass through effective time, the significant effort that may carry out that current techniques and economic interests are ordered about and multiple design alternative, but it is expected to those skilled in the art easily can generate these software instructions and program and IC with minimal experiment.
Fig. 1 is the schematic diagram of the circuit 100 operated according to each embodiment.Circuit 100 is provided for by independently powering and ground connection V1, the independent circuits 170 of GND1 and V2, GND2 operation, the bidirectional data line (D1) 102 in 180 and the isolated data chain of (D2) 104.Data wire D1 102 and D2 104 is operating as Single-wire data chain.When data wire D1 102 is operating as input, data wire D2 104 is operating as output.When data wire D2 104 is operating as input, data wire D1 102 is operating as output.In the present embodiment, circuit 100 comprises the first and second optical couplers 110 and 120.Each optical coupler 110,120 comprise light-emitting diode (LED) 112 respectively, 122, light-emitting diode (LED) 112,122 are coupled with integrated photo detector switch optical, integrated photo detector switch is made up of the optical diode 114,124 be integrated in respectively on chip and high speed transistor 116,126.The emitter-coupled of the transistor 116 of optical coupler 110 is to GND2.The emitter 126 of the transistor 126 of optical coupler 120 is coupled to GND1.According to embodiment as herein described, circuit 100 eliminates the locking situation that the LED 112,122 that caused due to grounded circuit and noise coupling in circuit in the past connects simultaneously.In interchangeable embodiment configuration, optical coupler 110,120 such as can be substituted by suitable optics RF device, such as laser diode and receiver, pin diode and other reflectors and receiver.
According to embodiment, circuit 100 comprises four open-drain devices (or alternatively open collector device) 130,140,150,160.The drains collectors no load device 130,140 of circuit 170 is by pullup resistor (R1) 132, and (R2) 142 is coupled respectively to power supply V1.The drains collectors no load device 150,160 of circuit 180 is by pullup resistor (R3) 152, and (R4) 162 is coupled respectively to power supply V2.Using concise and to the point with reference to the device 130,140 as open-drain device or buffer, 150,160 carry out residue explanation.
For open-drain device 130,140,150,160, such as, the high-speed cmos buffer such as provided by 74HC07 integrated circuit etc. can be used to realize.For open collector device, such as, 74LS07 integrated circuit etc. can be used to realize.Also discrete transistor can be adopted to realize this logic function.
The pullup resistor (R2) 142 of circuit 170 is for for driving the LED1112 of optical coupler 110 to provide current limliting.The pullup resistor (R3) 152 of circuit 180 is for for driving the LED2 122 of optical coupler 120 to provide current limliting.Pullup resistor (R5) 172 is coupled to the collector electrode of the transistor of optical coupler 120.Pullup resistor (R6) 182 is coupled to the collector electrode of the transistor 116 of optical coupler 110.
Data wire D1 102 and D2 104 is coupled respectively to buffer 106,108.Buffer 106,108 is for conversion LED 112, the high-speed buffer switched on and off of 122.Buffer 106,108 is the interior resistance having polarity output type buffer (non-open-drain) and comprise the scheduled current being enough to be driven through LED.Such as, 74HC08CMOS buffer can be used for the electric current of the about 25mA being driven through LED.Discrete transistor can also be adopted to realize this logic function.
According to embodiment, circuit 100 allows at two electric isolating circuits 170, and the signal that between 180, (D1 or D2) transmits reaches preset frequency.Such as, the application for the numerical data in high-speed cmos bus can be done in the drilling of single line link under 2 to 6 volt range and 50 megahertzes or higher frequency scope.The detailed operation of circuit 100 is below provided.
d1: high level is to low level
When data wire D1 102 is operating as input, data wire D2 is operating as output.The input of buffer 106 is set to low level by the low level inputing to D1, and this output at buffer 106 produces low level.The negative electrode of LED1 112 drags down by the low level of the output of buffer 106.Therefore LED1 connects by the pullup resistor R2 142 at the anode place of LED1.The LED1 112 be switched on causes the transistor 116 of optical coupler 110 to be connected.Along with the connection of transistor 116, the collector electrode of transistor 116 is dragged down.The collector coupled of transistor 116 is to buffer 150, and the open-drain of 160 input, and become low level, buffer 150 along with the collector electrode of transistor 116, the input of 160 also becomes low level.These input to buffer 150, and the low level of 160 causes buffer 150, and the output of 160 becomes low level.The input of the output of buffer 150 link D2 104 and buffer 108 simultaneously.When the output of buffer 150 becomes low level, the input of D2 and buffer 108 all becomes low level.The low level of the input of buffer 108 causes the low level of the output of buffer 108, itself so that the negative electrode of the LED2 122 of optical coupler 120 is dragged down.According to each embodiment, the output of buffer 160 is coupled to the anode of the LED 2 of optical coupler 122.When the output of buffer 160 becomes low level, the anode 122 of optical coupler 120 is dragged down.This causes the anode of the LED2 keeping LED2 to disconnect and negative electrode place to be low level.Therefore, LED1 connects and LED2 disconnection.
d1: from low level to high level
When the data wire D1 102 being operating as input becomes high level from low level, the input of buffer 106 is set to high level by the high level inputing to D1 102, and this output at buffer 106 produces high level.The negative electrode of LED1 112 is drawn high by the high level of the output of buffer 106.The anode of LED1 112 is disposed as high level by pullup resistor R2 142.The anode of LED1 112 and the high level at negative electrode place keep LED1 to be in off-state.By the disconnection of LED1, the transistor 116 of optical coupler 110 disconnects.The disconnection of the transistor 116 of optical coupler 110 allows collector electrode output to become high level by pullup resistor (R6) 182.The collector electrode becoming the transistor 116 of high level exports and the input of buffer 150 is set to high level, generates high level output thus.The D2104 being operating as output draws high and provides high level for buffer 108 by the high level output of buffer 150.The high level at buffer 108 place generates the high level of the output of buffer 108, and the negative electrode of LED2 122 is drawn high by it.According to each embodiment, the collector electrode becoming the transistor 116 of high level exports and the input of buffer 160 is set to high level, generates high level output thus.Therefore the anode of LED2 122 is also driven high by the high level output of buffer 160.The anode of the LED2 122 of optical coupler 120 and the high level at negative electrode place keep LED2 to disconnect.Therefore LED2 disconnects and LED1 disconnection.
d2: from high level to low level
When D2 104 is operating as input, D1 is operating as output.The low level at D2 place causes the output of buffer 108 to become low level.The negative electrode of LED2 122 drags down by the low level of the output of buffer 108.The pullup resistor R3 152 that the anode of LED2 122 is connected by current limliting and by LED2 122 is driven high.Connect by LED2, transistor 126 is also connected, and is dragged down by its collector electrode thus.The collector electrode of the transistor 126 of optical coupler 120 exports and is attached to buffer 130, the input of 140, and is dragged down by collector electrode, and the input of these buffers is also dragged down.The low level of the input of buffer 130 generates low level in the output of buffer 130, is dragged down by D1 102 thus.D1 102 is coupled to the input of buffer 106.The low level of the input of buffer 106 generates low level in the output of buffer 106.The negative electrode of LED1 112 drags down by the low level of the output of buffer 106.According to each embodiment, the low level of the input of buffer 140 generates low level in the output of buffer 140.The output of buffer 140 is attached to the anode of the LED1 112 of optical coupler 110.The anode of LED1 112 is dragged down by the low level output of buffer 140.The LED1 112 of optical coupler 110 is disconnected by the low level at its anode and negative electrode place.Therefore, LED1 disconnects and LED2 connection.
d2: from low level to high level
When the data wire D2 104 being operating as input becomes high level from low level, the input of buffer 108 is set to high level by the high level inputing to D2 104, causes the output of buffer 108 to become high level.The negative electrode of the LED2 122 of optical coupler 120 is drawn high by the high level of the output of buffer 108.The anode of LED2 122 is driven high via pullup resistor (R3) 152.The anode of the LED2 be driven high and negative electrode keep LED2 to disconnect.The disconnection of LED2 122 causes the transistor 126 of optical coupler 120 to disconnect.Its collector electrode is drawn high via pullup resistor (R5) 172 by the disconnection of transistor 126.The input of buffer 130 and 140 is set to high level by the high level of collector electrode place of transistor 126.The high level of the input of buffer 130 generates high level in the output of buffer 130.The input of D1 102 and buffer 106 is drawn high by the high level of the output of buffer 130 simultaneously.The input of the buffer 106 of high level causes the output of buffer 106 to become high level, this so that the negative electrode of LED1 112 is drawn high.According to each embodiment, the high level of the input of buffer 140 generates high level in the output of buffer 140.Therefore the anode of LED1 112 is driven high via the high level output of buffer 140.Therefore, LED1 112 is disconnected by its anode be driven high and negative electrode.Therefore, LED1 disconnects and LED2 disconnection.
be separated the data wire being used for bidirectional operation
In a word, by for the mask data line D1 102 of bidirectional operation and D2 104, each data wire is all coupled to open-drain device (or open collector device).By adopting open-drain or open collector device, by in operation open-drain or open collector device to convert the negative electrode of the first optical coupler LED to logic low from logic is high, change another open-drain or open collector device so that the anode of same optical coupler LED is converted to logic low from logic is high and prevents locking simultaneously.Repeat this configuration to control the second optical coupler LED and make it possible to carry out bidirectional operation.
Fig. 2 is flow process Figure 200 of the method for isolating the bidirectional data line on single line Data-Link.202, the first and second bidirectional data lines are identical at two but separated between the first and second switching circuits independently.As shown in fig. 1, the first and second switching circuits are all by independently power supply input and GND operate.
204, controlled by the second data wire in response to the first switching circuit, control a LED by the first switching circuit.First switching circuit changes anode and the negative electrode of a LED simultaneously.206, by second switch control circui the 2nd LED, second switch circuit is controlled by the first data wire.Second switch circuit changes anode and the negative electrode of the 2nd LED simultaneously.208, connect a LED by the first switching circuit, and keep the 2nd LED to disconnect by second switch circuit.210, by second switch circuit ON the 2nd LED, and a LED is kept to disconnect by the first switching circuit.
Fig. 3 is formed according to each embodiment and the charger 300 operated.Charger 300 comprises the multiple charger caskets for holding battery pack and/or battery-operated portable radio apparatus.A circuit of each casket is connected to microprocessor by the input that is separated or an independent input, and software is for identifying which casket is in transmission or receive data.
Therefore, for bidirectional data line provides the buffer circuit of improvement.According to the buffer circuit isolation ground connection that each embodiment operates, make to eliminate grounded circuit and noise coupling.When being embodied as many caskets charger, this independently circuit operation prevents the coupled to each other of casket, and the mistake eliminated thus for user indicates.When charger is coupled to computer, read data when the interference caused when not having grounded circuit and the ability of charger of programming is favourable.
The asymmetric of the isolating problem in the face of limiting due to noise and power range and cause still is needed with employing, the circuit of three grades of logics is different, the non-locking on electric isolution Data-Link provided by each embodiment, the apparatus and method of two-way communication can eliminate all these problems.
In the above specification, specific embodiment of the present invention has been described.But, those skilled in the art will recognize that and can carry out various modification and change when not departing from the scope of the present invention set forth in claims.Therefore, specification and accompanying drawing should be considered to illustrative and nonrestrictive, and all these modification all contain within the scope of the invention.Can cause and produce any benefit, advantage or scheme or become more significantly benefit, advantage, the solution of problem should not be understood to the key of any or all claim, required or necessary feature or element.The present invention is only defined by all equivalents of enclose claim and these claims published, is included in the application and does not wind up the case any amendment made in process.
Claims (20)
1. a buffer circuit, comprising:
For the first and second mask data lines of bidirectional operation, wherein two mask data lines all by following open-drain or the open collector device of being coupled to prevent locking: one in operation open-drain or open collector device to convert the negative electrode of optical coupler LED to logic low from logic is high, operate another open-drain or open collector device to convert the anode of described optical coupler LED to logic low from logic is high simultaneously, keep described optical coupler LED to disconnect thus.
2. buffer circuit according to claim 1, wherein that the negative electrode of another optical coupler LED is converted to logic from logic low is high for open-drain or open collector device, operate another open-drain or open collector device is high so that the anode of described another optical coupler LED is converted to logic from logic low simultaneously, keep another LED to disconnect thus.
3. buffer circuit according to claim 1, wherein said buffer circuit operates in the communicator adopting two-way data/address bus.
4. buffer circuit according to claim 1, wherein said communicator comprises charger, and described charger is used for for battery pack or the charging of battery powered portable radio apparatus.
5., for a buffer circuit for communicator, comprising:
First and second optics RF devices;
Be coupled to the first buffer of described first and second optics RF devices, the second buffer, the 3rd buffer and the 4th buffer, described first buffer, described second buffer, described 3rd buffer and described 4th buffer are open-drain or open collector device, wherein:
Described first buffer is coupled to the negative electrode of described first optics RF device;
Described second buffer is coupled to the anode of described first optics RF device;
Described 3rd buffer is coupled to the negative electrode of described second optics RF device;
Described 4th buffer is coupled to the anode of described second optics RF device; And
Described first buffer and described second buffer in data in a first direction between flow periods, by providing logic low for the anode of described first optics RF device and negative electrode and keep described first optics RF device to disconnect; And
Described 3rd buffer and described 4th buffer in data in a second direction between flow periods, by providing logic high for the anode of described second optics RF device and negative electrode and keep described second optics RF device to disconnect.
6. buffer circuit according to claim 5, the anode of the anode of wherein said first optics RF device and negative electrode and described second optics RF device and negative electrode are provided by least two in following: the LED of two optical couplers, the laser diode with receiver or the pin diode with receiver.
7. buffer circuit according to claim 5, wherein said communicator comprises charger.
8. buffer circuit according to claim 5, the two-way communication in wherein said buffer circuit delimitation order wired link.
9. a buffer circuit, comprising:
There is the first optical coupler and second optical coupler (110,120) of a LED and the 2nd LED respectively;
Be coupled to the first buffer of described first optical coupler and described second optical coupler, the second buffer, the 3rd buffer and the 4th buffer (130,140,150,160), described first buffer, described second buffer, described 3rd buffer and described 4th buffer are open-drain or open collector device, wherein:
Described first buffer (130) is coupled to the negative electrode of a described LED;
Described second buffer (140) is coupled to the anode of a described LED;
Described 3rd buffer (150) is coupled to the negative electrode of described 2nd LED;
Described 4th buffer (160) is coupled to the anode of described 2nd LED; And
Described first buffer and described second buffer in data in a first direction between flow periods, by for anode and negative electrode provide logic low and keep a described LED to disconnect; And
Described 3rd buffer and described 4th buffer in data in a second direction between flow periods, by providing logic high for the anode of described 2nd LED and negative electrode and keep described 2nd LED to disconnect.
10. buffer circuit according to claim 9, wherein said buffer circuit operates in the communicator of the two-way communication in delimitation order wired link.
11. buffer circuits according to claim 10, wherein said communicator comprises charger.
12. 1 kinds of buffer circuits, comprising:
As the first optical coupler and second optical coupler of bidirectional isolator, described first optical coupler has the LED1 under the transistor controls of described second optical coupler, and described second optical coupler has the LED2 under the transistor controls of described first optical coupler;
First data wire and the second data wire (D1, D2), be respectively LED1 and LED2 and carry out individual buffer;
First drains collectors no load device (130), for data wire (D1) is converted to GND from supply voltage, is converted to GND by the cathode side of LED1 from supply voltage simultaneously, is operating as output;
Second drains collectors no load device (140), for the anode of LED1 being converted to GND from supply voltage simultaneously, keeping the electrical potential difference on LED1 to be in 0V dc thus, prevents LED1 luminous thus and another circuit of locking;
3rd drains collectors no load device (150), for data wire (D2) is converted to GND from supply voltage, is converted to GND by the cathode side of LED2 from supply voltage simultaneously, is operating as output; And
4th drains collectors no load device (160), for the anode of LED2 being converted to GND from supply voltage simultaneously, keeping the electrical potential difference on LED2 to be in 0V dc thus, prevents LED2 luminous thus and another circuit of locking.
13. buffer circuits according to claim 12, wherein said drains collectors no load device comprises drain no load device or open collector device.
14. buffer circuits according to claim 12, wherein said buffer circuit operates in the communicator of the two-way communication in delimitation order wired link.
15. buffer circuits according to claim 14, wherein said communicator comprises many caskets charger, and described buffer circuit isolation GND, eliminate the grounded circuit in the casket of many caskets charger and noise coupling thus.
16. 1 kinds, for the method for isolated data line, comprising:
Be separated the data wire being used for bidirectional operation, wherein two data wires be separated all by following open-drain or the open collector device of being coupled to prevent locking: one in operation open-drain or open collector device converts logic low with the negative electrode of the optical coupler LED at the first side place by circuit to from logic is high, operates another open-drain or open collector device to convert the anode of optical coupler LED to logic low from logic is high simultaneously; And
In the circuit of independently-powered and ground connection, adopt open-drain or open collector device to make it possible to carry out bidirectional operation.
17. methods according to claim 16, the data wire of the two-way data/address bus of wherein said method isolated communication device.
The method of 18. 1 kinds of bidirectional data lines in delimitation order wired link, comprising:
Identical but be independently separated the first bidirectional data line and the second bidirectional data line between the first switching circuit and second switch circuit at two respectively;
Control a LED by described first switching circuit, described first switching circuit is controlled by described second data wire, and described first switching circuit changes anode and the negative electrode of a described LED simultaneously;
By described second switch control circui the 2nd LED, described second switch circuit is controlled by described first data wire, and described second switch circuit changes anode and the negative electrode of described 2nd LED simultaneously;
Connect a described LED by described first switching circuit, keep described 2nd LED to disconnect by described second switch circuit simultaneously; And
Connect described 2nd LED by described first switching circuit, keep a described LED to disconnect by described first switching circuit simultaneously.
19. methods according to claim 18, wherein said first switching circuit and described second switch circuit each inputted and ground connection (gnd) operation by independently power supply.
20. methods according to claim 19, wherein said first switching circuit and described second switch circuit are within a communication device by independently power supply input and ground connection (gnd) operate.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/434,635 US8803117B2 (en) | 2012-03-29 | 2012-03-29 | Apparatus and method for non-latching, bi-directional communication over an electrically isolated data link |
| US13/434,635 | 2012-03-29 | ||
| PCT/US2013/028876 WO2013148073A1 (en) | 2012-03-29 | 2013-03-04 | Apparatus and method for non-latching, bi-directional communication over an electrically isolated data link |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104221286A true CN104221286A (en) | 2014-12-17 |
| CN104221286B CN104221286B (en) | 2017-06-23 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380017997.5A Active CN104221286B (en) | 2012-03-29 | 2013-03-04 | Apparatus and method for electrically insulating the non-locking two-way communication in data link |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8803117B2 (en) |
| CN (1) | CN104221286B (en) |
| AU (1) | AU2013240457B2 (en) |
| CA (1) | CA2868319C (en) |
| DE (1) | DE112013001731B9 (en) |
| GB (2) | GB2561311A (en) |
| WO (1) | WO2013148073A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104052462B (en) * | 2013-03-14 | 2018-07-10 | 博西华电器（江苏）有限公司 | A kind of isolation telecommunication circuit |
| CN115276642A (en) | 2021-04-29 | 2022-11-01 | 恩智浦美国有限公司 | Optocoupler circuit with level shifter |
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2012
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2013
- 2013-03-04 CN CN201380017997.5A patent/CN104221286B/en active Active
- 2013-03-04 GB GB1808109.1A patent/GB2561311A/en not_active Withdrawn
- 2013-03-04 GB GB1414926.4A patent/GB2514056B/en active Active
- 2013-03-04 WO PCT/US2013/028876 patent/WO2013148073A1/en active Application Filing
- 2013-03-04 AU AU2013240457A patent/AU2013240457B2/en active Active
- 2013-03-04 DE DE112013001731.8T patent/DE112013001731B9/en active Active
- 2013-03-04 CA CA2868319A patent/CA2868319C/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1166106A (en) * | 1996-03-25 | 1997-11-26 | 汤姆森消费电子有限公司 | Data bus isolator |
| TW584988B (en) * | 2003-01-02 | 2004-04-21 | Ind Tech Res Inst | Cross-level digital signal transmission device |
| US6822480B1 (en) * | 2003-09-02 | 2004-11-23 | Micrel, Incorporated | Bi-directional bus level translator |
| US7359640B2 (en) * | 2003-09-30 | 2008-04-15 | Stmicroelectronics Sa | Optical coupling device and method for bidirectional data communication over a common signal line |
| US20050122154A1 (en) * | 2003-12-05 | 2005-06-09 | Yeon-Jun Lee | Bi-directional signal level shift circuit |
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Also Published As
| Publication number | Publication date |
|---|---|
| AU2013240457B2 (en) | 2015-07-23 |
| US8803117B2 (en) | 2014-08-12 |
| GB2514056B (en) | 2018-10-24 |
| WO2013148073A1 (en) | 2013-10-03 |
| DE112013001731B9 (en) | 2020-03-05 |
| DE112013001731T5 (en) | 2015-03-19 |
| CA2868319A1 (en) | 2013-10-03 |
| AU2013240457A1 (en) | 2014-09-11 |
| DE112013001731B4 (en) | 2020-02-13 |
| CA2868319C (en) | 2017-05-30 |
| GB2561311A (en) | 2018-10-10 |
| GB2514056A (en) | 2014-11-12 |
| GB201414926D0 (en) | 2014-10-08 |
| CN104221286B (en) | 2017-06-23 |
| GB201808109D0 (en) | 2018-07-04 |
| US20130256569A1 (en) | 2013-10-03 |
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