CN104219469B - The apparatus and method for improving imaging sensor analog domain accumulator cumulative effects - Google Patents
The apparatus and method for improving imaging sensor analog domain accumulator cumulative effects Download PDFInfo
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Abstract
The present invention relates to analogue layout field.Amplitude is lifted to increase considerably the equivalent cumulative series and signal to noise ratio of advanced digital-to-analogue near-field CMOS TDI imaging sensors.For this, the technical solution adopted by the present invention is, the method for improving imaging sensor analog domain accumulator cumulative effects, utilize the pel array of n rows × m row, two-step analog domain accumulator, row Parallel ADC, horizontal shifting register is realized, use backward roll exposure of the lack sampling rate for (n 1)/n, it is implemented as exposing since line n pixel is to the 2nd row pixel gradually within a transition time, when next transition time starts, 1st row pixel then exposes, then, exposed again since line n pixel, so n rows pixel can export (n 1) individual data within a transition time.Present invention is mainly applied to analogue layout, image sensor design.
Description
Technical field
The present invention relates to analogue layout field, more particularly to improves imaging sensor analog domain accumulator and adds up
The method of effect.
Background technology
The optical signal that camera lens obtains can be converted into being easy to the electrical signal for storing, transmitting and handling by imaging sensor.Figure
As sensor according to working method can be divided into face formation and linear array type.The operation principle of face formation imaging sensor is with two
The pel array of dimension face battle array arrangement is shot to object to obtain two-dimensional image information, and the work of linear array type imaging sensor
Principle is to obtain two-dimensional image information in a manner of the pel array arranged in one dimensional linear array is by object scanning shoot, its
The working method of middle linear array type imaging sensor is with reference to figure 1.Linear array type imaging sensor is extensive with its special working method
Apply take photo by plane, aerial image, the various fields such as machine vision and imaging of medical.But due to online formation imaging sensor
Object is all the time in movement during pixel exposure, therefore the time for exposure of pixel is severely limited by linear array type imaging sensor with respect to quilt
Shoot the translational speed of object, (such as aerial image) the linear array type image sensing especially under high-speed motion low-light (level) application environment
The signal to noise ratio (Signal to Noise Ratio, SNR) of device can become very low.To solve the problems, such as that SNR is low, it is thus proposed that
Time delayses integrations (Time Delay Integration, TDI) technology, it can increase the SNR of line scan image sensor
And sensitivity, it is with its special scan mode, by carrying out multiexposure, multiple exposure to same target, realizes very high SNR and sensitive
Degree, because in the environment of Ci Te Do are applied to high-speed motion low-light (level).TDI general principle is the pel array arranged using face battle array
Worked in a manner of linear array scanning, and then can realize that the pixel do not gone together carries out multiexposure, multiple exposure to same object on the move, and
Each exposure results are added up, the equivalent exposure time of integration for extending pixel to object, therefore SNR can be substantially improved
And sensitivity.
TDI technologies are real by charge coupling device (Charge Coupled Device, CCD) imaging sensor earliest
Existing, ccd image sensor is also the ideal component for realizing TDI technologies, and it can realize that muting signal adds up.At present
TDI technologies are applied in ccd image sensor more, and the structure of the CCD-TDI imaging sensors generally used is rectangular similar to one
The Array CCD sensor of shape, but it works in a manner of line is swept, as shown in Fig. 2 the work of CCD-TDI imaging sensors
It is as follows to make process：N level CCD-TDI imaging sensors one share n row pixels, and the first row pixel on each row is getted at first
The electric charge being collected into time does not export directly, but be collected into same column second pixel within second transition time
Electric charge is added, the electric charge that the pixel collection of CCD-TDI imaging sensors last column (line n) arrives by that analogy and above n-1
The way of output after the secondary electric charge being collected into is cumulative according still further to common liner CCD image sensor is read.In CCD-TDI image sensings
In device, the amplitude of output signal is the cumulative of n pixel integration electric charge, that is, being received in the n times of transition time an of pixel
The electric charge collected, amplitude output signal expands n times and the amplitude of noise only expandsTimes, therefore signal to noise ratio can improveTimes.
But because the shortcomings such as the big integrated level of power consumption is low, at present its application in every field be present in ccd image sensor
All gradually by CMOS (Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductor)
Imaging sensor is substituted.In the prior art, it is thus proposed that tired out by being internally integrated analog signal in cmos image sensor
Add the method for device to realize TDI technologies, i.e. the analog signal of pixel output, which is introduced into analog signal accumulator, to be completed to identical
Cumulative, analog signal feeding ADC (Analog to Digital Converter, the mould that then completion adds up of exposure signal
Intend digital quantizer) carry out quantization output.But analog signal summer can also introduce in analog signal cumulative process in itself
Larger noise, therefore higher TDI series difficult to realize, and signal to noise ratio lifting amplitude also can be with the increase deviation theory of series
Value.
The content of the invention
For overcome the deficiencies in the prior art, it is contemplated that increasing considerably advanced digital-to-analogue near-field CMOS-TDI image sensings
Equivalent cumulative series and signal to noise ratio the lifting amplitude of device.Therefore, the technical solution adopted by the present invention is, imaging sensor mould is improved
The method of near-field accumulator cumulative effects, using the pel array of n rows × m row, two-step analog domain accumulator, row Parallel ADC,
Horizontal shifting register is realized, is used lack sampling rate as (n-1)/n backward roll exposure, is implemented as getting at one
Exposed in time since line n pixel is to the 2nd row pixel gradually, when next transition time starts, the 1st row pixel is then
Exposure, then, then exposes, so n rows pixel can export (n-1) individual data within a transition time since line n pixel.
Specific implementation process is as described below：First, backward roll exposure of the lack sampling rate for (n-1)/n is used：One
Exposed in the individual transition time since line n pixel is to the 2nd row pixel gradually, when next transition time starts, the 1st row picture
Element then exposes, and then, then is exposed since line n pixel, so n rows pixel can export (n-1) within a transition time
Individual data；Then, it is grouped for each column n row picture element signals：It is divided into b groups, every group of a row；The output letter of every group of pixel
I.e. reading after number being added up a time in the first step simulation accumulator of respective column, the accumulator are cleared and can read in new number
According to；Integrator number required for the first step adds up is n-b=n- (n/a)=(1-1/a) n；First step simulation accumulator output
Signal added up b time in second step accumulator after export to ADC；Integrator number required for second step adds up is n-a；Connect
, each column pixel exposure produces pixel exposure signal and is transported in corresponding row level simulation summation circuit：First group of first picture
The plain integrator that wherein original electric charge is emptied by reset for object A exposure signal in first step accumulator is transported to
Afterwards, sampling holding is carried out, when exposure signal generation of first group of second pixel for A, and is inputted to identical integrator
Added up；When first group of last pixel produces for A exposure signal and inputs to the integrator, i.e. the first step is tired out
After adding that this integrator in device is cumulative and completing a time, by cumulative signal a (A) outputs in second step accumulator by resetting clearly
The integrator of empty wherein original electric charge；Then, second group of first pixel starts to expose, and repeats said process.And work as second step
Accumulator is added up after b a (A) signal, then b [a (A)] is exported to row Parallel ADC as final accumulation result and quantified, and is finally owned
The quantized result of row is through horizontal shifting register Serial output.
The device of imaging sensor analog domain accumulator cumulative effects is improved, by pel array, the two-step of n rows × m row
Analog domain accumulator, row Parallel ADC, horizontal shifting register are formed, and n rows × m row pixels are divided into b groups, every group of a row, pixel battle array
I.e. reading after the read output signal of row adds up a time in accumulator is simulated, the accumulator are cleared and can read in new data；The
The cumulative integrator number of one step is n-b=n- (n/a)=(1-1/a) n；The integrator number of second step accumulator is (n-a),
Pixel exposure produces pixel exposure signal and is transported in first step summation circuit, exposure of first group of first pixel for object A
Optical signal carries out sampling guarantor after the integrator for emptying wherein original electric charge by reset being transported in first step accumulator
Hold, when exposure signal generation of first group of second pixel for A, and input to identical integrator and added up；When
One group of last pixel is produced for A exposure signal and inputted to the integrator, i.e. this integration in first step accumulator
After device cumulative completion a times, cumulative signal a (A) outputs are emptied into wherein original electric charge in second step accumulator by reset
Integrator；Then, second group of first pixel starts to expose, and repeats said process；And added up b for second step accumulator
After a (A) signal, then output signal b [a (A)] is exported to ADC as final accumulation result and quantified.
The each step of two-step analog domain accumulator equivalent to one variable connector dielectric amplifier, and two step accumulators are total to
An operational amplifier is enjoyed, therefore each integrator includes two integrating capacitors, the upper pole of y-th of integrating capacitor of xth step
Integration clock I of the plate through being shifted to an earlier date respectively by trailing edgexThe reset clock Reset that ya and trailing edge shift to an earlier datexTwo parallel connections of ya controls
Switch access amplifier positive input terminal, the integrated clock I of bottom crownxThe switch access amplifier negative output terminal of y controls, and simultaneously through multiple
Bit clock ResetxThe switch of y controls is connected with the bottom crown of another integrating capacitor；Another described integrating capacitor is with identical
Connected mode be connected across between the negative input end of amplifier and positive output end；Wherein, x represents xth step summation circuit, and y represents xth
Walk y-th of integrator in summation circuit；It is defeated with bearing that two sampling switch by clk4 controls bridge amplifier positive input terminal respectively
Go out end, amplifier negative input end and positive output end；Pixel output signal pixel reset signal VrstOr pixel exposure signal Vsig, through two
Mutually the paralleling switch of not overlapping clock clk1 and clk2 control accesses a sampling capacitance CsTop crown, this sampling capacitance CsBottom crown
The switch controlled through clk3 connects amplifier positive input terminal；Reference voltage VrefThrough identical sampling capacitance Cs, identical switch with identical
Mode connects amplifier negative input end；VosOffset voltage is represented, is equivalent to the fixed voltage source of an amplifier positive input terminal, this mistake
Voltage is adjusted in storing step of lacking of proper care, i.e. switched capacitor amplifier sample phase, be eliminated.
The technical characterstic and effect of the present invention：
Cumulative to be changed to two-step simulation cumulative by the simulation of former single step by the present invention, it is possible to reduce because of non-ideal factors such as parasitisms
The problem of caused equivalent cumulative series, signal to noise ratio reduce.Especially when cumulative series n increases to a certain extent, two-step tires out
The equivalent cumulative series of scheme and signal to noise ratio is added to lift degree than cumulative not good step by step.
Brief description of the drawings
Fig. 1 is the mode of operation schematic diagram for the line scan image sensor that prior art provides.
Fig. 2 is the operation principle schematic diagram for the CCD-TDI imaging sensors that prior art provides.
Fig. 3 is CMOS-TDI image sensor circuits Organization Chart provided by the invention.
Fig. 4 is backward roll exposure schematic diagram provided by the invention.
Fig. 5 is the cumulative scenario-frame sketch of two-step provided by the invention.
Fig. 6 is the two-step accumulator circuit figure provided by the invention based on switched capacitor amplifier.
Fig. 7 is the timing diagram of the two-step accumulator circuit provided by the invention based on switched capacitor amplifier.
Fig. 8 is that two-step provided by the invention adds up scheme compared with the equivalent cumulative series of the cumulative scheme of traditional single step
Figure.
Fig. 9 is that the cumulative scheme of two-step provided by the invention is believed with the cumulative scheme of traditional single step relative to single is cumulative
Make an uproar and compare figure than (SNR) lifting multiple.
Figure 10 is that the cumulative scheme of two-step provided by the invention illustrates figure.
Embodiment
Two-step analog domain signal accumulator, is grouped to picture element signal first, for phase caused by the pixel in group
The first step is carried out with exposure signal to add up, then for corresponding to the signal of same object exposure caused by different groups of accumulator
Carry out second step to add up, finally by the signal output of cumulative completion to ADC, to carry out follow-up quantization.Sensor architecture can join
Examine Fig. 3.The cumulative CMOS-TDI imaging sensors of described two-step analog domain mainly include：The pel array of n rows × m row, two
Step formula analog domain accumulator, row Parallel ADC, horizontal shifting register.
In the prior art, someone realizes that CMOS-TDI imaging sensors expose to same object using the method for over-sampling
Synchronism.The roll exposure that over-sampling rate is (n+1)/n is i.e. within a transition time from the 1st row pixel to line n picture
The 1st row is further added by single exposure and started after element gradually starts exposure, and so n rows pixel can export n+1 within a transition time
Individual data, are shown in Fig. 4 (a).Transverse axis coordinate is the time in Fig. 4, and the longitudinal axis is the distance that pixel moves relative to object, identical slanted bar
Line represents identical scenery, and the slope of inclined stripe represents the speed of object movement.Wherein, readout time is represented per one-row pixels
Exposure signal reads the required time；Time for exposure represents single exposure time of the pixel to object；Transition time represents object
The time at the center of adjacent pixel is moved to from the center of a pixel；Within each transition time, sequence number identical letter is read
Number to need the read output signal that is accumulated in together, as shown in red boxes in figure.What it is when added up signal shooting is phase jljl
During body, i.e., when the inclined stripe where each red boxes is identical, institute's cumulative signal is only synchronous.And in this technique, carry
Go out the method for lack sampling backward exposure a kind of to realize synchronism that CMOS-TDI imaging sensors expose to same object.Owe to adopt
Sample rate is (n-1)/n backward roll exposure, is implemented as within a transition time from line n pixel to the 2nd row picture
Element gradually starts to expose, and when next transition time starts, the 1st row pixel then exposes, and then, then opens from line n pixel
Begin to expose, so n rows pixel can export (n-1) individual data within a transition time, see Fig. 4 (b).
It is grouped for n row pixels, is divided into b groups, every group of a row.In traditional cumulative mode, the reading of pel array
Go out signal in accumulator add up n time after reading, when employed between over-sampling Exposure mode after, the number of integrator must compare
Cumulative series more 1；In the hybrid domain of this model is cumulative, the read output signal of pel array adds up a times in accumulator is simulated
After can read, the accumulator is cleared, and can read in new data；It is therefore to be understood that into a transition time
Inside have b signal to be cumulatively added completion a times and read, that is, there is b integrator to be re-used.Therefore the first step adds up
Required integrator number is n-b=n- (n/a)=(1-1/a) n, and the number of integrator has been cut in 1/a needed for the first step.
For second step cumulative process, because the result of first step integrator is exported according to pixel order, the integrator therefore second step adds up
Number needs to meet：Certain signal (example A) can be stored in the 1st a cumulative whole a being output between b-th a times cumulative output
Secondary cumulative signal (that is, according to pixel order, to (n-a) individual signal since A (the 1st)).So the cumulative needs of second step
Integrator number is (n-a).Single-row n rows pixel is taken to consider, as shown in Figure 5.Pixel exposure produces pixel exposure signal, produced
Exposure signal be transported in first step summation circuit, first group of first pixel is conveying for object A exposure signal
After the integrator for emptying wherein original electric charge by reset into first step accumulator, sampling holding is carried out, when first group
Second pixel produces for A exposure signal, and inputs to identical integrator and added up.When first group of last picture
Element is produced and inputted to the integrator for A exposure signal, i.e. this integrator cumulative completion in first step accumulator a times
Afterwards, cumulative signal a (A) is exported to the integrator that wherein original electric charge is emptied by reset in second step accumulator.Then,
Second group of first pixel starts to expose, and repeats said process.And added up for second step accumulator after b a (A) signal, then b
[a (A)] is exported to ADC as final accumulation result to be quantified.Fig. 5 is shown in the signal of two step accumulation structures.
The particular circuit configurations of two-step accumulator are realized can be as shown in Figure 6.According to described above, the cumulative electricity of the first step
Road needs (n-b) individual integrator, and second step summation circuit needs (n-a) individual integrator.Its each step summation circuit equivalent to
One variable connector dielectric amplifier.This circuit uses the scheme of Op-amp sharing, therefore only has a computing to put in two step accumulators
Big device.This circuit design is differential configuration, therefore each integrator includes two integrating capacitors, and C is designated as in figureHx.It is each
In integrator：One CHxTop crown through respectively by trailing edge shift to an earlier date integration clock IxThe reset clock that ya and trailing edge shift to an earlier date
ResetxTwo paralleling switches access amplifier positive input terminal of ya controls, the integrated clock I of bottom crownxThe switch access fortune of y controls
Negative output terminal is put, and simultaneously through reset clock ResetxThe switch and another C of y controlsHxBottom crown be connected；Another CHxWith
Identical connected mode is connected across between the negative input end of amplifier and positive output end.Wherein, x represents xth step summation circuit, y tables
Show y-th of integrator in xth step summation circuit.Two by clk4 control sampling switch bridge respectively amplifier positive input terminal with
Negative output terminal, amplifier negative input end and positive output end.Pixel output signal VrstOr Vsig, through the not overlapping clock clk1 of two-phase and
The paralleling switch of clk2 controls accesses a sampling capacitance CsTop crown, this sampling capacitance CsThe switch that bottom crown controls through clk3 connects
Amplifier positive input terminal；Reference voltage VrefThrough identical sampling capacitance Cs, identical switch connect amplifier negative input in the same manner
End.Vos represents offset voltage, is equivalent to the when fixed voltage source of an amplifier positive input terminal, as shown in Figure 6.Through sequential
Optimization design, this offset voltage can be in storing steps of lacking of proper care, i.e. switched capacitor amplifier sample phase is eliminated.From
Exemplified by one step and second step take one-level integrator respectively, its specific timing diagram is as shown in Figure 7.Work as clk1=0, clk2=1, clk3
=0, clk4=1, I11=0, I11a=0, Reset11=0, Reset11a=1, I21=0, I21a=0, Reset21=1 and
Reset2During 1a=1, the integrator C of second stepH2Operation is resetted in sample phase, and with second step integrator.Now
The integrator of second step empties, the integrator C of the first stepH1In electric charge prepare be transferred in the integrator of second step.Work as clk1
=1, clk2=0, clk3=0, clk4=0, I11=0, I11a=0, Reset11=1, Reset11a=1, I21=1, I21a=
1,Reset21=0 and Reset2During 1a=0, the integrator of second step is in amplification stage, and gain is CH1/CH2.Now first
Electric charge in the integrator of step has been transferred completely into the integrator of second step.Work as clk1=1, clk2=0, clk3=1, clk4
=1, I11=0, I11a=0, Reset11=0, Reset11a=0, I21=0, I21a=0, Reset21=0 and Reset21a=0
When, the integrator of the first step is in sample phase, now pixel reset signal VrstCollected sampling capacitance CsIn.Work as clk1
=0, clk2=1, clk3=1, clk4=0, I11=1, I11a=1, Reset11=0, Reset11a=0, I21=0, I21a=
0,Reset21=0 and Reset2During 1a=0, the integrator of the first step is in amplification stage, and gain is CS/CH1.Now sample
Electric capacity CsOn charge variation (Vrst-Vsig)CSAll it is transferred to the integrating capacitor C of the first stepH1On.Put with reference to switching capacity
The principle of big device, its final output result can be expressed as：
(Vout2-[b]-Vout2+[b])CH2=b (Vout1+[a]-Vout1-[a])CH1
=ab (Vrst-Vsig)CS
Wherein, VrstFor first step accumulator sample phase input voltage, VsigInputted for second step accumulator amplification stage
Voltage, CH1Integrating capacitor during the expression first step is cumulative, CH2Integrating capacitor during expression second step is cumulative, CsFor sampling capacitance,
Vout2-[b] represents cumulative b times rear accumulator negative output terminal magnitude of voltage of second step, Vout2+[b] represents that second step is tired after cumulative b times
Add device positive output end magnitude of voltage, Vout1-[a] represents cumulative a times rear accumulator negative output terminal magnitude of voltage of the first step, Vout1+[a] table
Show cumulative a times rear accumulator positive output end magnitude of voltage of the first step, a, b represent n row pixels being divided into b groups, and every group of a is individual.
To become apparent from the object, technical solutions and advantages of the present invention, implementation of the present invention is provided below in conjunction with example
The specific descriptions of mode.
By taking 8 row pixels as an example, 2 groups are divided into, every group of 4 rows.Then the first step it is cumulative to need integrator number be 8-2=6,
Second step is cumulative, and to need integrator number be 8-4=4, as shown in Figure 10.Wherein " ν " direction of arrow represents the motion side of pixel
To " sel " direction of arrow represents that row selects direction, and the square frame of " pixel " row represents to take the pixel of the row of 1 row 8；6 sides of " first step "
Frame corresponds to 6 integrators that the first step adds up, and 4 square frames of " second step " correspond to 4 integrators that second step adds up.
Alphabetical A, B, C in " pixel " square frame etc., represent the exposure signal that current pixel collects, and same letter corresponds to same object
Partial exposure signal.Letter in " first step " square frame represents the signal being stored in different integrators, the numeral before it
How many such a signal is represented, " second step " is similar.
For the exposure signal (example A) of jobbie part, be initially stored in the first step empties its Central Plains by reset
There is in the integrator of electric charge (1A), as shown in dotted line frame 1.The exposure for same object parts adopted in next transition time
Signal (A), will be stored in same integrator, integrate (2A), as shown in dotted line frame 2.Until after integrating 4 times, by integrated signal
(4A) reads from first step accumulator and is transferred to second step accumulator, can now store new exposure again in this integrator
Signal (1D), as shown in dotted line frame 4.And for A the 5th exposure signal, the new integration of first step accumulator will be stored in
In device (5A), as shown in dotted line frame 5.Until rear 4 integrations terminate, integrated signal (8A) is read to the from first step accumulator
In two step accumulators (4A), and final signal (8A in second step) is read, as final 8 grades of cumulative signals, such as dotted line frame 8
It is shown.Fig. 5 illustrates the cumulative complete accumulation period of two-step, M is equivalent into A, then it can be found that dotted line frame 13 and dotted line frame
1 exposure reflected, cumulative process are identical.
The simulation of former single step is added up, and it is cumulative to be changed to two-step simulation, it is possible to reduce caused by the non-ideal factors such as parasitism
The problem of equivalent cumulative series, signal to noise ratio reduce.During traditional single step is cumulative, is influenceed, deposited by ghost effect
The electric charge stored up on every one-level integrator has certain loss in the operation integrated each time.At the end of sample phase,
Switch is caused to be fully disconnected because switching the influence of the coupled capacitor of both sides, i.e., input signal V each timein(amplifier is just
The voltage change of input) not only it is accumulated on current integration electric capacity, also some is lost in all products not being fully disconnected
The equivalent parasitic capacitances C that point capacitance group is formedptotalOn：
Wherein,Before representing that x: th sample phase terminates, the stored quantity of electric charge in integrating capacitor；Vo(x) table
Show current amplifier output voltage, VinInput signal i.e. each time, CsFor sampling capacitance, CHRepresent the product in single step accumulator
Divide electric capacity.
Cptotal=(n-1) Cp
Cpt、CpbParasitic capacitance respectively between integrating capacitor and amplifier input and output end；CpRepresent to accumulate per one-level
The equivalent parasitic capacitances for dividing device to be formed, CptotalRepresent total equivalent parasitic capacitances of single step accumulator.
At the end of integration phase, after being disconnected from the circuit due to current integration electric capacity, there is parasitic capacitance at both ends, in product
Divide the moment of electric capacity disconnection, the electric charge in integrating capacitor can be prorated to parasitic capacitance Cpt、CpbOn：
Wherein,After representing that x: th sample phase terminates, the stored quantity of electric charge in integrating capacitor；Table
Before showing that (x+1) secondary sample phase terminates, the quantity of electric charge stored by integrating capacitor is (i.e.After ghost effect weakens
Surplus),Represent that x: th sample phase terminates the quantity of electric charge stored in preceding integrating capacitor,Represent same
The total capacitance that one integrator is lost between double sampling, CHRepresent any integrating capacitor (single step in single step accumulator
The connected mode of each integrating capacitor in accumulator is all identical, therefore equivalent to each other), CsFor sampling capacitance, CpRepresent to accumulate per one-level
The equivalent parasitic capacitances for dividing device to be formed, CptotalRepresent total equivalent parasitic capacitances of single step accumulator, Vo(x) represent current
Amplifier output voltage, VinInput signal i.e. each time.
So the voltage of final output is：
Wherein,
Wherein,After representing that x: th sample phase terminates, the stored quantity of electric charge in integrating capacitor；Table
Before showing that (x+1) secondary sample phase terminates, the quantity of electric charge stored by integrating capacitor is (i.e.After ghost effect weakens
Surplus), CHRepresent the integrating capacitor in single step accumulator, CpThe equivalent parasitic capacitances formed per one-level integrator are represented,
CptotalRepresent total equivalent parasitic capacitances of single step accumulator, Vo(x) current amplifier output voltage, V are representedinI.e. each time
Input signal, ε, θ are three equivalent parameters in formula, and n represents n rows pixel (i.e. n levels signal adds up).
And for two-step accumulator, with reference to above-mentioned derivation, first step accumulation result is
Vin1=Vrst-Vsig,Cptotal1=(2n-a-b-1) Cp,
Wherein, Vo1(x) output voltage after the expression first step is cumulative x times, Vin1、ε1、θ1For three equivalent ginsengs in formula
Number, Cptotal1Represent total equivalent parasitic capacitances when the two-step accumulator first step is cumulative, CH1Represent the in two-step accumulator
The integrating capacitor of one step accumulator, CpRepresent the equivalent parasitic capacitances formed per one-level integrator, CsFor sampling capacitance, a, b, n
Represent n row pixels being divided into b groups, every group of a is individual.
Second step accumulation result is：
Vin2=Vo1(a),Cptotal2=(2n-a-b-2) Cp
Wherein, Vo2(x) output voltage after expression second step is cumulative x times, Vin2、ε2、θ2For three equivalent ginsengs in formula
Number, Cptotal2Represent total equivalent parasitic capacitances when second step is cumulative, CH2Represent second step accumulator in two-step accumulator
Integrating capacitor, CpRepresent the equivalent parasitic capacitances formed per one-level integrator, CsFor sampling capacitance, a, b, n are represented n row pictures
Element is divided into b groups, and every group of a is individual.
The cumulative final result of two-step is：
Wherein, V2step,final(n) represent that two-step accumulator completes the final output knot after whole n rows picture element signals add up
N row pixels are divided into b groups by fruit, a, b, n expression, and every group of a is individual, Vo2(b) output voltage after expression second step is cumulative b times, Vo1
(a) output voltage after the expression first step is cumulative a times, Vin1Represent the input signal when first step is cumulative, ε1、θ1、ε2、θ2For public affairs
Four equivalent parameters in formula.
Make CH1=CH2=CS=980, Cpt=0.891, Cpb=0.976, then it can draw out and not add up (1step) step by step
The equivalent cumulative series that cumulative (2step) is distributed with two-step is as shown in Figure 8.Wherein, equivalent cumulative series is Vo/Vin。
Wherein, g (x) represents the cumulative gain of single step accumulator x: th, Vo(x) current amplifier output voltage, V are representedo
(x-1) (x-1) secondary cumulative amplifier output voltage, V are representedinInput signal i.e. each time, ε, θ are two equivalent ginsengs in formula
Number.
Wherein, SNRadd,1stepRepresent that the relative signal to noise ratio to be added up with single of single step accumulator lifts multiple, SNRorgTable
Show the cumulative signal to noise ratio of single, SNR (x) represents the signal to noise ratio of single step accumulator, and θ is equivalent parameters in formula
Wherein, SNRadd,2stepRepresent that the relative signal to noise ratio to be added up with single of two-step accumulator lifts multiple, g1(x) table
Show the cumulative gain of first step x: th；g2(x) the cumulative gain of second step x: th is represented；SNR1(x) two-step accumulator is represented
The cumulative signal to noise ratio of the first step, SNR2(x) the cumulative signal to noise ratio of two-step accumulator second step, SNR are representedorgRepresent that single tires out
The signal to noise ratio added, g1(i) gain of the cumulative ith of the two-step accumulator first step, g are represented2(i) two-step accumulator the is represented
The gain of the cumulative ith of two steps, θ1、θ2For equivalent parameters in formula, a, b, n represent n row pixels being divided into b groups, and every group of a is individual.
Cumulative (1step) carries with respect to the signal to noise ratio to be added up with single respectively with two-step distribution cumulative (2step) step by step
Rise multiple SNRadd,1step、SNRadd,2step, as shown in Figure 9.As can be seen that when cumulative series n increases to a certain extent, two steps
It is good that the equivalent cumulative series and signal to noise ratio lifting degree of the cumulative scheme of formula add up step by step than not.Tire out for this 8 grades of two-steps
Add device, θ (8)=979.412/ (980+0.614 × 8) ≈ 0.994416, not step by step when, equivalent cumulative series is 7.80.It is and right
In the accumulator of two-step 4 × 2, its equivalent cumulative series is 7.82.As cumulative series increases, the cumulative advantage of two-step will more
Add obvious.
Claims (3)
1. a kind of method for improving imaging sensor analog domain accumulator cumulative effects, it is characterized in that, utilize the picture of n rows × m row
Pixel array, two-step analog domain accumulator, row Parallel ADC, horizontal shifting register are realized, use lack sampling rate as (n-1)/n
Backward roll exposure, be implemented as exposing since line n pixel is to the 2nd row pixel gradually within a transition time
Light, when next transition time starts, the 1st row pixel then exposes, and then, then exposes since line n pixel, so exists
N rows pixel can export (n-1) individual data in one transition time；Wherein, it is as described below to implement process：First, using deficient
Sample rate is (n-1)/n backward roll exposure：Gradually opened from line n pixel to the 2nd row pixel within a transition time
Begin to expose, when next transition time starts, the 1st row pixel then exposes, and then, then is exposed since line n pixel, this
Sample n rows pixel within a transition time can export (n-1) individual data；Then, it is grouped for each column n row picture element signals：
It is divided into b groups, every group of a row；After the output signal of every group of pixel adds up a times in the first step analog domain accumulator of respective column
Read, the analog domain accumulator is cleared and can read in new data；The first step add up required for integrator number be
N-b=n- (n/a)=(1-1/a) n；The signal of first step analog domain accumulator output adds up in second step analog domain accumulator
Exported after b times to ADC；Integrator number required for second step adds up is n-a；Then, each column pixel exposure produces pixel and exposed
Optical signal is transported in corresponding row level simulation summation circuit：First group of first pixel for object A exposure signal defeated
After being sent to the integrator for emptying wherein original electric charge by reset in first step analog domain accumulator, sampling holding is carried out, etc.
First group of second pixel of exposure signal to to(for) A produces, and inputs to identical integrator and added up；When first group most
The latter pixel is produced for A exposure signal and inputted to the integrator, i.e. this integration in first step analog domain accumulator
After device cumulative completion a times, cumulative signal a (A) outputs are emptied into its Central Plains in second step analog domain accumulator by reset
There is the integrator of electric charge；Then, second group of first pixel starts to expose, and repeats said process, and when second step analog domain tires out
After adding cumulative b a (A) signal of device, then b [a (A)] is exported to row Parallel ADC as final accumulation result and quantified, finally all row
Quantized result through horizontal shifting register Serial output.
2. a kind of device for improving imaging sensor analog domain accumulator cumulative effects, it is characterized in that, by the pixel of n rows × m row
Array, two-step analog domain accumulator, row Parallel ADC, horizontal shifting register are formed, and n rows × m row pixels are divided into b groups, every group
A rows, the read output signal of pel array adds up a times in analog domain accumulator to be read afterwards, and the analog domain accumulator is cleared simultaneously
New data can be read in；The cumulative integrator number of the first step is n-b=n- (n/a)=(1-1/a) n；Second step analog domain
The integrator number of accumulator is (n-a), and pixel exposure produces pixel exposure signal and is transported in first step summation circuit, first
Exposure signal by reset emptying wherein during being transported to first step analog domain accumulator of first pixel of group for object A
After the integrator of original electric charge, sampling holding is carried out, it is and defeated when first group of second pixel produces for A exposure signal
Enter to identical integrator and added up；When first group of last pixel produces for A exposure signal and inputs to the product
Point device, i.e. this integrator in first step analog domain accumulator is cumulative complete a time after, cumulative signal a (A) is exported to second
Walk the integrator that wherein original electric charge is emptied by reset in analog domain accumulator；Then, second group of first pixel starts
Exposure, repeat said process；And added up for second step analog domain accumulator after b a (A) signal, then output signal b [a (A)]
Export to ADC and quantify as final accumulation result.
3. the device of imaging sensor analog domain accumulator cumulative effects is improved as claimed in claim 2, it is characterized in that, two steps
The each step of formula analog domain accumulator equivalent to one variable connector dielectric amplifier, and two-step analog domain accumulator shared one
Individual operational amplifier, therefore each integrator includes two integrating capacitors, the top crown warp of y-th of integrating capacitor of xth step
The integration clock I shifted to an earlier date respectively by trailing edgexThe reset clock Reset that ya and trailing edge shift to an earlier datexTwo paralleling switches of ya controls
Access amplifier positive input terminal, the integrated clock I of bottom crownxY control switch access amplifier negative output terminal, and simultaneously through reset when
Clock ResetxThe switch of y controls is connected with the bottom crown of another integrating capacitor；Another described integrating capacitor is connected with identical
The mode of connecing is connected across between the negative input end of amplifier and positive output end；Wherein, x represents xth step summation circuit, and y represents that xth step is tired
Power up y-th of integrator in road；Two sampling switch by clk4 controls bridge amplifier positive input terminal and negative output terminal respectively,
Amplifier negative input end and positive output end；Pixel output signal pixel reset signal VrstOr pixel exposure signal Vsig, through two-phase not
The paralleling switch of overlapping clock clk1 and clk2 control accesses a sampling capacitance CsTop crown, this sampling capacitance CsBottom crown passes through
The switch of clk3 controls connects amplifier positive input terminal；Reference voltage VrefThrough identical sampling capacitance Cs, identical switch with phase Tongfang
Formula connects amplifier negative input end；VosOffset voltage is represented, is equivalent to the fixed voltage source of an amplifier positive input terminal, this imbalance
Voltage is in storing step of lacking of proper care, i.e. switched capacitor amplifier sample phase is eliminated.
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| CN107046627A (en) * | 2017-01-09 | 2017-08-15 | 天津大学 | Charge-domain, analog domain mixed type CMOS TDI imaging sensors |
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| CN110233964A (en) * | 2019-05-29 | 2019-09-13 | 天津大学 | A kind of anti-shaking method applied to TDI cmos image sensor |
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| CN112911176B (en) * | 2021-01-19 | 2022-07-05 | 西安理工大学 | Advanced digital-analog-domain TDI circuit for inhibiting parasitic effect and implementation method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009153507A1 (en) * | 2008-06-17 | 2009-12-23 | Centre National D'etudes Spatiales | Image sensor of the tdi type with self-adapted dynamics based on image point |
| CN102595060A (en) * | 2012-03-15 | 2012-07-18 | 天津大学 | Analog accumulator capable of implementing time delay integration (TDI) function inside complementary metal-oxide semiconductor (CMOS) image sensor |
| CN102801930A (en) * | 2012-07-13 | 2012-11-28 | 天津大学 | Low-power-consumption time delay integral type CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor |
| CN103546695A (en) * | 2013-10-18 | 2014-01-29 | 天津大学 | Time domain accumulating method and accumulator applied to TDI-CIS |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110019044A1 (en) * | 2009-07-21 | 2011-01-27 | Weng-Lyang Wang | Time Delay Integration Based MOS Photoelectric Pixel Sensing Circuit |
-
2014
- 2014-09-22 CN CN201410486889.9A patent/CN104219469B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009153507A1 (en) * | 2008-06-17 | 2009-12-23 | Centre National D'etudes Spatiales | Image sensor of the tdi type with self-adapted dynamics based on image point |
| CN102595060A (en) * | 2012-03-15 | 2012-07-18 | 天津大学 | Analog accumulator capable of implementing time delay integration (TDI) function inside complementary metal-oxide semiconductor (CMOS) image sensor |
| CN102801930A (en) * | 2012-07-13 | 2012-11-28 | 天津大学 | Low-power-consumption time delay integral type CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor |
| CN103546695A (en) * | 2013-10-18 | 2014-01-29 | 天津大学 | Time domain accumulating method and accumulator applied to TDI-CIS |
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