CN104218949A - Digital Delta Sigma modulator structure applicable to fraction frequency synthesizer - Google Patents

Digital Delta Sigma modulator structure applicable to fraction frequency synthesizer Download PDF

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CN104218949A
CN104218949A CN201410441266.XA CN201410441266A CN104218949A CN 104218949 A CN104218949 A CN 104218949A CN 201410441266 A CN201410441266 A CN 201410441266A CN 104218949 A CN104218949 A CN 104218949A
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modulator
output
error feedback
feedback type
error
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CN104218949B (en
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吴建辉
张文通
程超
程康
娄宁
陈超
黄成�
李红
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Southeast University
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Abstract

The invention discloses a digital Delta Sigma modulator structure applicable to a fraction frequency synthesizer. The structure comprises a primary error feedback modulator, a feedback path, a secondary error feedback modulator and an error offset module. A difference value between output of the feedback path and output of a primary modulator passes through a delay unit and then the output of the feedback path is obtained. A sum value between an input signal passing through a noise suppression strengthening unit and a disturbing signal passing through a filtering processing unit and a sum value between outputs of the feedback path serve as input of the primary error feedback modulator. A primary error feedback signal serves as input of the secondary error feedback modulator. Output of the primary error feedback modulator and output of the secondary error feedback modulator pass through the error offset module and then output of the whole modulator is obtained. In the digital Delta Sigma modulator structure, a feedback loop is introduced, so high-order noise suppression is achieved, number of output quantization level is reduced, and complexity and power consumption of an overall circuit design are lowered.

Description

A kind of digital Deltasigma modulator structure being applicable to fractional synthesizer
Technical field
The present invention relates to and belong to technical field of integrated circuits, particularly a kind of digital Deltasigma modulator structure being applicable to fractional-type frequency synthesizer.
Background technology
The develop rapidly of Modern wireless communication makes wireless communication system have higher requirement for the frequency accuracy of frequency synthesizer and frequency switching time.Want to obtain less settling time, then require that phase-locked loop has wide loop bandwidth.In integral frequency divisioil frequency synthesizer, there is the mutual constraint between frequency accuracy, frequency switching time, phase noise, be difficult to the requirement met in Modern Communication System.For fractional-type frequency synthesizer, because of the little several times that its output frequency can be reference frequency, so higher reference frequency and larger loop bandwidth can be adopted, thus reduce frequency switching time, take into account the requirement of each side such as phase noise, frequency accuracy, lock speed, be widely used in twireless radio-frequency communication chip.But fractional synthesizer also exists a very serious shortcoming, namely can introduce fractional stray.Be currently suggested multiple solution for this shortcoming, wherein the most frequently used is exactly adopt Deltasigma modulator technology.So design a Deltasigma modulator that can suppress fractional stray well, the improvement tool for frequency synthesizer performance is of great significance.At present, the modulator being applied to frequency synthesizer adopts three rank MASH Deltasigma modulator structures mostly.But the output of this structure reaches 8 quantization levels, greatly improve the linearity to phase frequency detector, charge pump and frequency divider in frequency synthesizer system, add complex circuit designs degree and power consumption.Therefore, when identical fractional stray inhibition can be reached, reduce output quantization level significant.
Summary of the invention
The technical problem solved: for the deficiencies in the prior art, the present invention proposes a kind of digital Deltasigma modulator structure being applicable to fractional synthesizer, solve circuit that existing three rank MASH Deltasigma modulator structures need design complicated and the high technical problem of power consumption.
Technical scheme: for solving the problems of the technologies described above, the present invention by the following technical solutions:
Be applicable to a digital Deltasigma modulator structure for fractional synthesizer, comprise first order Error Feedback type modulator, feedback path, second level Error Feedback type modulator and error counteracting module;
Output C (z) of feedback path and the output Y of first order modulator 1z the difference between () obtains output C (z) of feedback path after delay cell;
Between input signal X (z) and the disturbing signal after filtering after processing unit D (z) of noise suppressed enhancement unit G (z) be worth X 1between (z) and output C (z) of feedback path with value as the input of first order Error Feedback type modulator;
First order error feedback signal e 1z () is as the input of second level Error Feedback type modulator;
The output Y of first order Error Feedback type modulator 1the output Y of (z) and second level Error Feedback type modulator 2z () obtains output Y (z) of whole modulator after error counteracting module.
Feedback path is introduced by the output signal after quantizing and the output Y of first order Error Feedback type modulator in the present invention 1z () feeds back to the input of first order Error Feedback type modulator, single order noise shaping can also be increased except normal noise suppression effect can be realized, namely under the exponent number of identical Deltasigma modulator, the noise shaping effect of higher order is achieved, for this reducing the output quantization number of levels of half.
Further, in the present invention, the input of described first order Error Feedback type modulator and the first error feedback signal e through delay cell 1z between () is V with value 1(z), the output Y of first order modulator 1z () is V 1the quantizing noise E of (z) and first order Error Feedback type modulator 1between (z) and value, described first error feedback signal e 1z () is V 1the output Y of (z) and first order Error Feedback type modulator 1difference between (z).
Further, in the present invention, the input of described second level Error Feedback type modulator and the second error feedback signal e through delay cell 2z between () is V with value 2(z), the output Y of second level modulator 1z () is V 2the quantizing noise E of (z) and second level Error Feedback type modulator 2between (z) and value, described second error feedback signal e 2z () is V 2the output Y of (z) and second level Error Feedback type modulator 2difference between (z).
Further, in the present invention, the output Y of described first order Error Feedback type modulator 1the output Y of (z) and second level Error Feedback type modulator 2(z) as two inputs of error counteracting module, the wherein output Y of second level Error Feedback type modulator 2(z) successively after two rank filtering unit filters with the output Y of first order Error Feedback type modulator 1(z) do and, obtain with the output of value as error counteracting module.
Further, in the present invention, the Z territory transfer function of described noise suppressed enhancement unit is G (z)=(1-z -1) -1, the effect of noise suppressed enhancing is played in the introducing of this unit.
Further, in the present invention, the Z territory transfer function of described delay cell is z -1, its effect makes error feedback signal under the control of clock, feed back to input after time delay one-period to carry out computing.
Further, in the present invention, the Z territory transfer function of described filter unit is 1-z -1, the introducing of this filter unit serves the effect reducing noise floor.
Beneficial effect: a kind of Deltasigma modulator structure being applicable to fractional-type frequency synthesizer provided by the invention, on the basis of conventional modulated device, introduces feedback control loop, comparing has the following advantages with traditional digital Deltasigma modulator tool:
The first, digital Deltasigma modulator of the present invention is single order cascade, has accomplished, when the multistage number of not cascade, to reach the noise shaping effect of more higher order modulator, save area and power consumption compared to higher order modulator;
The second, digital Deltasigma modulator of the present invention reduces the output quantization number of levels of half, exponent number and the contradiction that system linear degree is required of decoupling zero modulator, when being applied to fractional-type frequency synthesizer, reduce the instantaneous phase error of output signal of frequency divider and reference signal, subtract the linearity reduced to phase frequency detector, charge pump and frequency divider in frequency synthesizer system, reduce design of integer electro-circuit complexity and power consumption.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention;
Fig. 2 is the power spectral density that the present invention outputs signal;
Fig. 3 is the distribution map of output quantization level of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further described.
Be illustrated in figure 1 a kind of digital Deltasigma modulator structure being applicable to fractional-type frequency synthesizer proposed by the invention, mainly comprise traditional Error Feedback type modulator of two single order cascades, be respectively what second level Error Feedback type modulator of first order Error Feedback type modulator, and feedback path, error counteracting module.Wherein feedback path is arranged in the dotted line frame of Fig. 1 the top, and two dotted line frames below feedback path are respectively first order Error Feedback type modulator and second level Error Feedback type modulator, are error counteracting module in the dotted line frame on the right side of Fig. 1.Input signal X (z) obtains X after noise suppressed enhancement unit G (z) processes and adds disturbing signal 1(z), X 1z () as the input of the first rank Error Feedback type modulator, obtains exporting Y by first order Error Feedback type modulator together with the output signal C (z) of feedback path 1(z).First order error feedback signal e 1z (), as the input signal of second level Error Feedback type modulator, obtains exporting Y by second level Error Feedback type modulator 2(z).In figure, E 1z () is the quantizing noise that the quantizer in first order Error Feedback type modulator is introduced, E 2z () is the quantizing noise that the quantizer in the Error Feedback type modulator of the second level is introduced.By will through two rank (1-z -1) the output Y of second level modulator after filtering 2the output Y of (z) and first order modulator 1z the addition of (), as output Y (z) of whole modulator, realizes error counteracting.
Summation in said process, ask difference all realized by accumulator.
Below the noise transmission function of total (Noise Transfer Function is called for short NTF) and Signal transmissions function (Single Transfer Function, abbreviation STF) are derived:
Known Y (z)=STF (z) X (z)+NTF (z) E (z)
Can be obtained by Fig. 1:
Y 1(z)＝V(z)+E 1(z)
e 1(z)＝V(z)-Y 1(z)
X 1(z)＝X(z)*G(z)
Again due to G (z)=(1-z -1) -1
e 1(z)＝-E 1(z)
V 1 ( z ) = X 1 ( z ) + z - 1 E 1 ( z ) + - z - 1 1 - z - 1 Y 1 ( z )
Y 1 ( z ) - E 1 ( z ) = X 1 ( z ) - z - 1 E 1 ( z ) + - z - 1 1 - z - 1 Y 1 ( z )
Y 1(z)＝X(z)+(1-z -1) 2E 1(z)
Y 2(z)＝e 1(z)+(1-z -1)E 2(z)
Equation above comprehensive can obtain:
Y(z)＝Y 1(z)+(1-z -1) 2Y 2(z)＝X(z)+(1-z -1) 3E 2(z)
Thus can obtain:
Signal transfer function: STF (z)=1
Noise transfer function: NTF (z)=(1-z -1) 3
From NTF, Deltasigma modulator structure of the present invention achieves the noise shaping effect on three rank, compares traditional Deltasigma modulator, improves single order noise inhibiting ability.
Concrete, the bit wide of setting accumulator is 16bit, and selectivity constant 0.5, as input signal, obtains the power spectrum density of the output signal of Fig. 2 and the output quantization level distribution figure of Fig. 3 thus.As can see from Figure 2, structure proposed by the invention has the shaping effect on three rank and good spectral performance, as can be seen from Figure 3, output only has 4 quantization levels, reduce " instantaneous phase error " of frequency synthesizer when lock-out state, therefore can the requirement of the linearity such as phase frequency detector, charge pump and frequency divider in alleviation system greatly, thus reduce the complexity of circuit design, also reduce the power consumption of system.
The above is only the preferred embodiment of the present invention; be noted that for those skilled in the art; under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (7)

1. be applicable to a digital Deltasigma modulator structure for fractional synthesizer, it is characterized in that: comprise first order Error Feedback type modulator, feedback path, second level Error Feedback type modulator and error counteracting module;
Output C (z) of feedback path and the output Y of first order modulator 1z the difference between () obtains output C (z) of feedback path after delay cell;
Between input signal X (z) and the disturbing signal after filtering after processing unit D (z) of noise suppressed enhancement unit G (z) be worth X 1between (z) and output C (z) of feedback path with value as the input of first order Error Feedback type modulator;
First order error feedback signal e 1z () is as the input of second level Error Feedback type modulator;
The output Y of first order Error Feedback type modulator 1the output Y of (z) and second level Error Feedback type modulator 2z () obtains output Y (z) of whole modulator after error counteracting module.
2. the digital Deltasigma modulator structure being applicable to fractional synthesizer according to claim 1, is characterized in that: input and the first error feedback signal e through delay cell of described first order Error Feedback type modulator 1z between () is V with value 1(z), the output Y of first order modulator 1z () is V 1the quantizing noise E of (z) and first order Error Feedback type modulator 1between (z) and value, described first error feedback signal e 1z () is V 1the output Y of (z) and first order Error Feedback type modulator 1difference between (z).
3. the digital Deltasigma modulator structure being applicable to fractional synthesizer according to claim 1, is characterized in that: input and the second error feedback signal e through delay cell of described second level Error Feedback type modulator 2z between () is V with value 2(z), the output Y of second level modulator 1z () is V 2the quantizing noise E of (z) and second level Error Feedback type modulator 2between (z) and value, described second error feedback signal e 2z () is V 2the output Y of (z) and second level Error Feedback type modulator 2difference between (z).
4. the digital Deltasigma modulator structure being applicable to fractional synthesizer according to claim 1, is characterized in that: the output Y of described first order Error Feedback type modulator 1the output Y of (z) and second level Error Feedback type modulator 2(z) as two inputs of error counteracting module, the wherein output Y of second level Error Feedback type modulator 2(z) successively after two rank filtering unit filters with the output Y of first order Error Feedback type modulator 1(z) do and, obtain with the output of value as error counteracting module.
5. according to the digital Deltasigma modulator structure being applicable to fractional synthesizer in Claims 1-4 described in any, it is characterized in that: the Z territory transfer function of described noise suppressed enhancement unit is G (z)=(1-z -1) -1.
6. according to the digital Deltasigma modulator structure being applicable to fractional synthesizer in Claims 1-4 described in any, it is characterized in that: the Z territory transfer function of described delay cell is z -1.
7. the digital Deltasigma modulator structure being applicable to fractional synthesizer according to claim 4, is characterized in that: the Z territory transfer function of described filter unit is 1-z -1.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106656102A (en) * 2016-12-14 2017-05-10 东南大学 Method for adding external disturbance signal of multilevel noise shaping digital Delta-Sigma modulators
CN107623523A (en) * 2017-09-13 2018-01-23 东南大学 A kind of digital ΣΔ modulator based on bus segments

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US7741918B1 (en) * 2005-06-30 2010-06-22 Cypress Semiconductor Corporation System and method for an enhanced noise shaping for spread spectrum modulation
CN102394654A (en) * 2011-10-10 2012-03-28 电子科技大学 Delta-sigma modulator applicable to decimal frequency division

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Publication number Priority date Publication date Assignee Title
US7741918B1 (en) * 2005-06-30 2010-06-22 Cypress Semiconductor Corporation System and method for an enhanced noise shaping for spread spectrum modulation
CN102394654A (en) * 2011-10-10 2012-03-28 电子科技大学 Delta-sigma modulator applicable to decimal frequency division

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106656102A (en) * 2016-12-14 2017-05-10 东南大学 Method for adding external disturbance signal of multilevel noise shaping digital Delta-Sigma modulators
CN106656102B (en) * 2016-12-14 2019-03-12 东南大学 The adding method of the external disturbance signal of multi-stage noise shaped digital Delta-Sigma modulator
CN107623523A (en) * 2017-09-13 2018-01-23 东南大学 A kind of digital ΣΔ modulator based on bus segments
CN107623523B (en) * 2017-09-13 2020-11-17 东南大学 Digital sigma-delta modulator based on bus division

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