CN104217974A - Detecting method of high-aspect-ratio groove etching residual defects - Google Patents
Detecting method of high-aspect-ratio groove etching residual defects Download PDFInfo
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- CN104217974A CN104217974A CN201410443792.XA CN201410443792A CN104217974A CN 104217974 A CN104217974 A CN 104217974A CN 201410443792 A CN201410443792 A CN 201410443792A CN 104217974 A CN104217974 A CN 104217974A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Abstract
The invention provides a detecting method of high-aspect-ratio groove etching residual defects. Before an electronic beam defect scanner is used to detect the defects of a to-be-detected chip, negative charge is loaded to the surface of the to-be-detected chip, and a local electric field is formed at the residual defect area of a groove. During defect detecting, by the aid of the local electric field, secondary electrons generated at the residual defects of the high-aspect-ratio groove overflow the surface of the to-be-detected chip under the action of the local electric field, influence of the Faraday cup effect is avoided, and defect detecting efficiency and accuracy are increased greatly.
Description
Technical field
The present invention relates to semiconductor applications, particularly relate to a kind of detection method of high aspect ratio trench quite etching residue defect.
Background technology
Along with semiconductor device does less and less, the critical size of semiconductor key stratum is also more and more less, needs within the scope of same size, lay out more devices.Such as, by contrast 55nm and 110nm device architecture, the size of the shallow trench isolation in the former active area only has about 1/2nd of the latter's shallow trench isolation size.Simultaneously along with critical size is more and more less, the AR (depth-to-width ratio) of device is also increasing, and this has higher requirement to the processing procedure of device, also proposes new challenge to the detection means of processing procedure defect simultaneously.
Usually, high-aspect-ratio (generally referring to that depth-to-width ratio is more than or equal to 10 to 1) structure requires higher to exposure and etch process, if these processing procedures are optimized not, will produce the defect of bridge defects and undercut.As shown in Figure 1, because etching processing procedure is optimized not, cause etching not enough, in high aspect ratio trench quite bottom corner there is silicon residual defects 1 in place.
For the detection of undercut defect, due to the particularity of its structure and critical size very little, conventional optical detection means is difficult to detect these defects owing to being limited to resolution and sensitivity, becomes the bottleneck of follow-up Yield lmproved.And other detection means existing needs very little resolution as electron beam scanning detects this type of physical property defect, such as the defect of about 20 nm, need the pixel using 10nm ~ 20nm, this has an impact to the scanning amount in the unit interval, operating efficiency is reduced, the demand of large-scale production can not be met.In addition, electron beam scanning detection method bombards the surface of thing to be detected, and detected the distribution situation of secondary electron of overflowing by sniffer, judges determinand surface whether existing defects.But, as shown in Figure 2, for the structure of high-aspect-ratio, due to the impact by Faraday cup effect, from the electronics that the electronics major part of defect 1 spilling is dotted line frame 11, directly can strike on the sidewall of polysilicon layer 20, and the surface of polysilicon layer 20 cannot be broken through and then be detected device and detect; Only there is a small amount of electronics to be electronics in dotted line frame 12, device can be detected and detect.In this case, the detection of defect is had a strong impact on.Therefore, to the structure of high-aspect-ratio, how to provide a kind of method with the silicon residual defects of fast detecting channel bottom, become those skilled in the art's problem demanding prompt solution.
Summary of the invention
The technical problem to be solved in the present invention is the etching residue defect how checked rapidly and accurately in high aspect ratio trench quite.Based on this, the invention provides a kind of detection method of high aspect ratio trench quite etching residue defect, comprising:
There is provided one to be detected, described to be detected have passed through etching technics and defines groove, there is residual defects in the trench;
Negative electrical charge is loaded to described to be detected surface, forms internal field with residual defects region in the trench;
Electron beam flaw scanner is adopted to carry out defects detection to described substrate to be detected.
Further, electron beam flaw scanner is adopted to load negative electrical charge.
Further, the landing energy loading negative electrical charge is 1800eV ~ 2500eV, and electric current is 60 ~ 100nA.
Further, the depth-to-width ratio of described groove is more than or equal to 10 to 1.
Further, described to be detected comprises substrate and is formed at described suprabasil polysilicon layer, and described groove is polysilicon trench, and described residual defects region is positioned at the bottom of described groove.
Further, described residual defects is silicon residual defects.
Further, described groove is monocrystalline silicon groove.
Further, described groove is metal valley.
Further, the Pixel Dimensions of 30 ~ 80nm is adopted to carry out defects detection to described substrate to be detected.
The present invention treats before detection lug carries out defects detection in employing electron beam flaw scanner, first loads negative electrical charge on to be detected surface, forms internal field with residual defects region in the trench.When carrying out defects detection, due to the existence of described internal field, the secondary electron that residual defects place in high aspect ratio trench quite produces can overflow the surface of to be detected by the effect of described internal field, avoid the impact of Faraday cup effect, the efficiency of defects detection and accuracy are improved greatly.
Accompanying drawing explanation
Fig. 1 is the high aspect ratio trench quite schematic diagram with residual defects;
Fig. 2 is the schematic diagram of the detection method of high aspect ratio trench quite etching residue defect in prior art;
Fig. 3 is the flow chart of the detection method of high aspect ratio trench quite etching residue defect described in one embodiment of the invention;
The electric field schematic diagram formed in residual defects region after negative electrical charge being loaded to described to be detected surface in the detection method that Fig. 4 is high aspect ratio trench quite etching residue defect described in one embodiment of the invention;
Schematic diagram when adopting electron beam flaw scanner to carry out defects detection to described substrate to be detected in the detection method of Fig. 5 for high aspect ratio trench quite etching residue defect described in one embodiment of the invention;
Fig. 6 a is not to signal noise ratio schematic diagram in defects detection during the loading negative electrical charge of residual defects region;
Fig. 6 b is to signal noise ratio schematic diagram in defects detection after residual defects region loading negative electrical charge.
Embodiment
Be described in more detail below in conjunction with the detection method of schematic diagram to high aspect ratio trench quite etching residue defect of the present invention, which show the preferred embodiments of the present invention, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
In order to clear, whole features of practical embodiments are not described.They in the following description, are not described in detail known function and structure, because can make the present invention chaotic due to unnecessary details.Will be understood that in the exploitation of any practical embodiments, a large amount of implementation detail must be made to realize the specific objective of developer, such as, according to regarding system or the restriction about business, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but be only routine work to those skilled in the art.
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
As shown in Figure 3, the detection method of high aspect ratio trench quite etching residue defect of the present invention comprises following steps:
There is provided one to be detected, described to be detected for have passed through etching technics and defining the substrate of groove, there is residual defects in the trench;
Negative electrical charge is loaded to described to be detected surface, forms internal field with residual defects region in the trench;
Electron beam flaw scanner is adopted to carry out defects detection to described substrate to be detected.
As shown in Figure 1, the to be detected polysilicon layer 20 comprising substrate 10 and be formed in described substrate 10 provided by the invention.Described substrate 10 can be P type or N-type substrate, and its material can be the one in silicon, germanium or germanium silicon compound, organic compound semiconductor material.Surveyed area on described substrate 10 comprises SRAM region or logic region etc., will not limit herein.To be detected have passed through etching technics, in polysilicon layer 20, define groove, has defect 1 in the trench, in the present embodiment, described groove is high aspect ratio trench quite, concrete, for depth-to-width ratio is more than or equal to the groove of 10 to 1, described defect 1 is positioned at the bottom of groove.Described defect 1 is that above-mentioned etching technics causes, and therefore defect 1 is herein silicon residual defects.Defect of the present invention is physical property defect, but not electrical defect, in other embodiments of the invention, described defect 1 also can be other residues, simultaneously, the present invention also goes for the defects detection of other types groove, such as metal valley or monocrystalline silicon groove etc., and the present invention is not restricted this.
Then, please refer to Fig. 4, treat detection lug surface and load negative electrical charge, form internal field 110 with residual defects 1 region in the trench.Described internal field 110 is that negative electrical charge is gathered in the surrounding of defect 1 and is formed.For realizing better effect, the landing energy loading described negative electrical charge is 1800eV ~ 2500eV, and electric current is 60nA ~ 100nA.The process loading negative electrical charge adopts electron beam flaw scanner (Electron beam) to realize, electron beam flaw scanner is directly to the surface emitting electronics of described to be detected, described electron charge is gathered in the surrounding of defect 1 and forms described internal field 110, and above-mentioned landing energy and current value are arranged in advance by electron beam flaw scanner.
Finally, electron beam flaw scanner is adopted to carry out defects detection to described substrate to be detected.Please refer to Fig. 5, after residual defects 1 region in the trench forms internal field 110, add the voltage contrast at defect 1 place, when carrying out defects detection, the secondary electron that the electronics that electron beam flaw scanner sends produces at defect 1 place can be subject to the impact of electric field force upwards that internal field 110 produces, and thus more easily overflows the surface of polysilicon layer 20 and then is detected by the checkout gear of electron beam flaw scanner.In Figure 5, the secondary electron for being subject to the impact of internal field 110 to overflow polysilicon layer 20 surface in dotted line frame 112, this portions of electronics can be detected by electron beam flaw scanner; And for not overflowing the secondary electron on polysilicon layer 20 surface on a small quantity in dotted line frame 111.As can be seen here, be provided with internal field 110 around defect 1 after, the impact that Faraday cup can be avoided to bring most of secondary electron, makes the accuracy of defects detection greatly improve.
In the present embodiment, in order to realize defects detection better in follow-up defect inspection process, higher Pixel Dimensions can be used to detect, effectively to promote the snatch rate of defects detection, such as using the Pixel Dimensions of 30nm ~ 80nm.Owing to being applied with negative electrical charge in advance to described substrate, therefore use higher Pixel Dimensions to realize fast detecting, while improving detection efficiency, can't Detection results be affected.
Electron beam flaw scanner realizes by detection signal-to-noise ratio the detection of defect.Such as the one crawl limit (ultimate signal-to-noise ratio) can be set to electron beam flaw scanner, when the signal to noise ratio in somewhere is greater than this crawl limit, illustrate to there is residual defects herein.
Fig. 6 a is not to signal noise ratio schematic diagram in defects detection during the loading negative electrical charge of residual defects region; Fig. 6 b is to signal noise ratio schematic diagram in defects detection after residual defects region loading negative electrical charge.In Fig. 6 a and Fig. 6 b, abscissa is distance, represents to be detected surperficial diverse location, and ordinate SNR is electron beam flaw scanner detects signal signal to noise ratio when detecting.As shown in Figure 6 a, for the structure of high-aspect-ratio, in the impact of fault location due to Faraday cup effect during detection, the signal to noise ratio of generation possibly cannot reach the described crawl limit, and now electron beam flaw scanner cannot detect residual defects; As shown in Figure 6 b, if be loaded with negative electrical charge to residual defects region, define internal field 110, then the signal to noise ratio at residual defects place is greatly strengthened and is exceeded the crawl limit of setting, and now electron beam flaw scanner can detect residual defects smoothly.
In the present embodiment, the process of above-mentioned loading negative electrical charge and defects detection can be carried out continuously in same electron beam flaw scanner, just two processes arrange difference to scanner, the step loading negative electrical charge only needs accumulation formation internal field 110 around defect 1, and the step of defects detection needs scanner to send electronics to bombard the surface of thing to be detected to produce secondary electron, because this latter needs to arrange larger landing energy to electric charge.
The detection method of high aspect ratio trench quite etching residue defect provided by the invention, treat before detection lug carries out defects detection in employing electron beam flaw scanner, first load negative electrical charge on to be detected surface, form internal field with residual defects region in the trench.When carrying out defects detection, due to the existence of described internal field, the secondary electron that residual defects place in high aspect ratio trench quite produces can overflow the surface of to be detected by the effect of described internal field, avoid the impact of Faraday cup effect, the efficiency of defects detection and accuracy are improved greatly.
Obviously, those skilled in the art can carry out various change and modification to invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (9)
1. a detection method for high aspect ratio trench quite etching residue defect, is characterized in that, comprising:
There is provided one to be detected, described to be detected have passed through etching technics and defines groove, there is residual defects in the trench;
Negative electrical charge is loaded to described to be detected surface, forms internal field with residual defects region in the trench;
Electron beam flaw scanner is adopted to carry out defects detection to described substrate to be detected.
2. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, is characterized in that, adopts electron beam flaw scanner to load negative electrical charge.
3. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, is characterized in that, the landing energy loading negative electrical charge is 1800eV ~ 2500eV, and electric current is 60nA ~ 100nA.
4. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, it is characterized in that, the depth-to-width ratio of described groove is more than or equal to 10 to 1.
5. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, it is characterized in that, described to be detected comprises substrate and is formed at described suprabasil polysilicon layer, and described groove is polysilicon trench, and described residual defects region is positioned at the bottom of described groove.
6. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 5, it is characterized in that, described residual defects is silicon residual defects.
7. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, it is characterized in that, described groove is monocrystalline silicon groove.
8. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, it is characterized in that, described groove is metal valley.
9. the detection method of high aspect ratio trench quite etching residue defect as claimed in claim 1, is characterized in that, adopts the Pixel Dimensions of 30 ~ 80nm to carry out defects detection to described substrate to be detected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410443792.XA CN104217974B (en) | 2014-09-02 | The detection method of high aspect ratio trench quite etching residue defect |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410443792.XA CN104217974B (en) | 2014-09-02 | The detection method of high aspect ratio trench quite etching residue defect |
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| CN104217974A true CN104217974A (en) | 2014-12-17 |
| CN104217974B CN104217974B (en) | 2017-01-04 |
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| US6365423B1 (en) * | 2001-01-24 | 2002-04-02 | Advanced Micro Devices, Inc. | Method of inspecting a depth of an opening of a dielectric material layer |
| CN1400644A (en) * | 2001-07-30 | 2003-03-05 | 旺宏电子股份有限公司 | Method for detecting etching result of contact window |
| US20030136762A1 (en) * | 2001-10-16 | 2003-07-24 | Yan Zhao | Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing |
| CN1628380A (en) * | 2002-02-04 | 2005-06-15 | 应用材料以色列有限公司 | Monitoring of contact hole production |
| CN101290900A (en) * | 2007-04-20 | 2008-10-22 | 中芯国际集成电路制造(上海)有限公司 | Monitoring methods of etching |
| CN103871922A (en) * | 2014-02-21 | 2014-06-18 | 上海华力微电子有限公司 | Method for detecting polycrystalline silicon grid etching defect by adopting voltage contrast test structure |
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6365423B1 (en) * | 2001-01-24 | 2002-04-02 | Advanced Micro Devices, Inc. | Method of inspecting a depth of an opening of a dielectric material layer |
| CN1400644A (en) * | 2001-07-30 | 2003-03-05 | 旺宏电子股份有限公司 | Method for detecting etching result of contact window |
| US20030136762A1 (en) * | 2001-10-16 | 2003-07-24 | Yan Zhao | Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing |
| CN1628380A (en) * | 2002-02-04 | 2005-06-15 | 应用材料以色列有限公司 | Monitoring of contact hole production |
| CN101290900A (en) * | 2007-04-20 | 2008-10-22 | 中芯国际集成电路制造(上海)有限公司 | Monitoring methods of etching |
| CN103871922A (en) * | 2014-02-21 | 2014-06-18 | 上海华力微电子有限公司 | Method for detecting polycrystalline silicon grid etching defect by adopting voltage contrast test structure |
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