CN104217932B - Improve the diffusion furnace head and the tail conforming method of chip parameter - Google Patents
Improve the diffusion furnace head and the tail conforming method of chip parameter Download PDFInfo
- Publication number
- CN104217932B CN104217932B CN201410468782.1A CN201410468782A CN104217932B CN 104217932 B CN104217932 B CN 104217932B CN 201410468782 A CN201410468782 A CN 201410468782A CN 104217932 B CN104217932 B CN 104217932B
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- Prior art keywords
- chip
- tail
- head
- high temperature
- parameter
- Prior art date
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- 238000009792 diffusion process Methods 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000002347 injection Methods 0.000 claims abstract description 12
- 239000007924 injection Substances 0.000 claims abstract description 12
- 239000012535 impurity Substances 0.000 claims description 15
- 239000010453 quartz Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 238000001816 cooling Methods 0.000 claims description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims 1
- 239000011574 phosphorus Substances 0.000 claims 1
- 239000002019 doping agent Substances 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000002485 combustion reaction Methods 0.000 abstract description 3
- 238000002513 implantation Methods 0.000 abstract description 2
- 238000004377 microelectronic Methods 0.000 abstract description 2
- 206010013496 Disturbance in attention Diseases 0.000 abstract 1
- 239000010893 paper waste Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009423 ventilation Methods 0.000 description 1
- 238000010792 warming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Furnace Details (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Improve the diffusion furnace head and the tail conforming method of chip parameter, relate to microelectronic chip and manufacture field, solve head and the tail chip parameter difference in existing diffusion furnace big, the low problem causing chip rejection of yield, the present invention uses multi-disc through the single-chip injected, head and the tail at whole combustion chamber sheet respectively put the single-chip after two panels is injected to compensate the concentration of chip in fire door stove, single-chip after this injection and formal chip must have identical implantation concentration and dopant type, in high-temperature diffusion process, single-chip after injection has been equivalent to as head and the tail chip manufacturing the dopant concentration as other position chip in stove and gas concentration condition, avoid head and the tail chip because of the parameter consistency that concentration loss causes greatly in the process poor, scrap problem.
Description
Technical field
The present invention relates to microelectronic chip and manufacture field, being specifically related to a kind of diffusion furnace head and the tail increases and special accompanies sheet to carry
The new process of parameter uniformity between high sheet.
Background technology
A collection of for chip suffering need to a collection of be put in boiler tube, when whole combustion chamber sheet is in high temperature when carrying out High temperature diffusion by diffusion furnace
During state, the ion injected in chip can diffuse out, owing to head and the tail chip only has side to have the chip mixed to carry out outside concentration
Expanding, so ion concentration of head and the tail chip circumference will be much smaller than the ion concentration of other position, so this position chip diffuses out
The ion that mixes come can be many compared with other position, and this has resulted in the core of the head and the tail actual ion concentration participated in of chip and other position
The actual ion concentration participated in of sheet has larger difference, ultimately results in head and the tail chip and differs very with the electrical quantity of other position chip
Greatly, if this problem occurs, at crucial work step, to directly result in chip rejection, cause huge loss, have a strong impact on product yield.
Summary of the invention
The present invention solves in existing diffusion furnace that head and the tail chip parameter difference is big, the low problem causing chip rejection of yield,
One is provided to improve the diffusion furnace head and the tail conforming method of chip parameter.
Improving the diffusion furnace head and the tail conforming method of chip parameter, the method is realized by following steps:
Step one, selection multi-disc single-chip carry out concentration and mix the injection of type;Obtain the single-chip after injecting;
Step 2, from quartz boat stove, direction from inside to outside is sequentially placed the list after five catch, at least two panels inject
Wafer, the single-chip after formal sheet, at least two panels injection and ten catch;Then described quartz boat stove is put into high temperature furnace pipe
In;
Step 3, described high temperature furnace pipe is heated up, body of ventilating, constant temperature, cooling, it is thus achieved that head and the tail parameter one in diffusion furnace
The chip caused.
Selection multi-disc single-chip described in step one carries out corresponding ion dose, ion energy and mixes the note of type
Entering, concrete type of mixing includes p-type impurity and n-type impurity two kinds, and p-type impurity uses P, and p type impurity uses boron.
In step 3 heat up high temperature furnace pipe, the detailed process of body of ventilating, constant temperature and cooling is: core is by high temperature furnace pipe
It is warming up to 800 degree, logical N in high temperature furnace pipe2Gas, stops being passed through N2After continue to be passed through O2, then the speed with 5 degrees/min will
High temperature furnace pipe is warmed up to 1150 degree, and constant temperature 80 minutes, finally, is passed through H in high temperature furnace pipe2、O2And constant temperature 130 minutes, close
H2、O2, then it is passed through N2, with the speed of 3.3 degrees/min, high temperature furnace pipe is cooled to 800 degree, chip is taken out from high temperature furnace pipe,
Obtain the chip that in diffusion furnace, parameter is consistent from beginning to end.
Beneficial effects of the present invention: the present invention uses multi-disc through the single-chip injected, and the head and the tail at whole combustion chamber sheet are respectively put
Single-chip after two panels is injected compensates the concentration of chip in fire door stove, and the single-chip after this injection must have with formal chip
Identical implantation concentration and dopant type, in high-temperature diffusion process, the single-chip after injection is equivalent to as head and the tail chip manufacturing
Dopant concentration as other position chip in stove and gas concentration condition, it is to avoid head and the tail chips is because of the denseest
The parameter consistency that degree loss causes greatly is poor, scrap problem.
The present invention by the method for concentration offsets in diffusion process coordinate again original catch avoid in stove head and the tail chip with
The impurity concentration of other position chip and the difference of gas concentration, with the method for low cost, improve electrical quantity concordance further
And chip yield.
Accompanying drawing explanation
Fig. 1 is that in the raising diffusion furnace of the present invention head and the tail conforming method of chip parameter, in stove, chip puts signal
Figure.
Detailed description of the invention
Detailed description of the invention one, combine Fig. 1 present embodiment is described, improve the diffusion furnace head and the tail conforming side of chip parameter
Method, the method is realized by following steps:
One, four single-chips are looked for carry out respective concentration and mix types of ion and inject;As a example by ring knot: normal core
Sheet injection condition before knot is: the injection condition selected by 5.0E12_90KeV_B, so single-chip is similarly:
5.0E12_90KeV_.Concrete type of mixing includes p-type impurity and n-type impurity two kinds, and p-type impurity uses P, and p type impurity uses
B (boron).
Two, from quartz boat stove, first boat tooth in direction starts to put five catch, after putting two panels injection the most respectively
Single-chip after the injection of single-chip, formal sheet, two panels, ten catch;
Three, quartz boat is put in high temperature furnace pipe;, run corresponding program (include heating up, ventilation body, constant temperature, cooling etc.
Step, with ring knot as profit: it is 800 degree, logical N that chip puts into temperature2High temperature furnace in → close N2, logical O2→ with 5 degrees/min
Ramp to 1150 → 1150 degree constant temperature 80 minutes → logical H2、O2→ constant temperature 130 minutes → closedown H2、O2, logical N2→ with 3.3
Degree/min speed cool to 800 degree → chip is taken out from stove.It is positioned such that make diffusion furnace head and the tail chip be in same
In impurity concentration that in stove, other position chip is the same and gas concentration condition, thus reach the electrical quantity of head and the tail chip and other
Position consistency, avoids waste paper completely.
It is the same that method described in present embodiment can make diffusion furnace head and the tail chip be in same stove other position chip
In impurity concentration and gas concentration condition, thus reach electrical quantity and other position consistency of head and the tail chip, avoid waste paper completely.
Claims (2)
1. improving the diffusion furnace head and the tail conforming method of chip parameter, it is characterized in that, the method is realized by following steps:
Step one, selection multi-disc single-chip carry out corresponding ion dose, ion energy and the injection mixing type;Obtain after injecting
Single-chip;
Step 2, from quartz boat stove, direction from inside to outside is sequentially placed the single-chip after five catch, at least two panels inject,
Formal sheet, the single-chip after at least two panels is injected and ten catch;Then described quartz boat stove is put in high temperature furnace pipe;
Step 3, described high temperature furnace pipe is heated up, body of ventilating, constant temperature and cooling, it is thus achieved that in diffusion furnace, head and the tail parameter is consistent
Chip;
In step 3 heat up high temperature furnace pipe, the detailed process of body of ventilating, constant temperature and cooling is: first heated up by high temperature furnace pipe
To 800 degree, logical N in high temperature furnace pipe2Gas, stops being passed through N2After continue to be passed through O2, then with the speed of 5 degrees/min by high temperature
Boiler tube is warmed up to 1150 degree, and constant temperature 80 minutes, finally, is passed through H in high temperature furnace pipe2、O2And constant temperature 130 minutes, close H2、
O2, then it is passed through N2, with the speed of 3.3 degrees/min, high temperature furnace pipe is cooled to 800 degree, chip is taken out from high temperature furnace pipe, obtains
Obtain the chip that in diffusion furnace, parameter is consistent from beginning to end.
The raising diffusion furnace the most according to claim 1 head and the tail conforming method of chip parameter, it is characterised in that step one
Described in selection multi-disc single-chip carry out corresponding ion dose, ion energy and mix the injection of type, concrete mixes class
Type includes p-type impurity and n-type impurity two kinds, and p-type impurity uses phosphorus, and n-type impurity uses boron.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201410468782.1A CN104217932B (en) | 2014-09-15 | 2014-09-15 | Improve the diffusion furnace head and the tail conforming method of chip parameter |
Applications Claiming Priority (1)
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CN201410468782.1A CN104217932B (en) | 2014-09-15 | 2014-09-15 | Improve the diffusion furnace head and the tail conforming method of chip parameter |
Publications (2)
Publication Number | Publication Date |
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CN104217932A CN104217932A (en) | 2014-12-17 |
CN104217932B true CN104217932B (en) | 2016-11-30 |
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CN107475775A (en) * | 2017-08-14 | 2017-12-15 | 通威太阳能(安徽)有限公司 | A kind of quartz boat contacts PN junction abnormal improvement technique in position with silicon chip |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4188245A (en) * | 1978-09-18 | 1980-02-12 | General Electric Company | Selective open tube aluminum diffusion |
CN102383197A (en) * | 2010-09-02 | 2012-03-21 | 北大方正集团有限公司 | Method for processing substrates with process gas |
CN102903634A (en) * | 2012-11-01 | 2013-01-30 | 天津中环半导体股份有限公司 | Back-face vacuum annealing process for IGBT (Insulated Gate Bipolar Translator) single crystal wafer |
CN203192776U (en) * | 2013-03-06 | 2013-09-11 | 深圳深爱半导体股份有限公司 | Diffusion furnace tube |
CN103854977A (en) * | 2012-12-04 | 2014-06-11 | 无锡华润华晶微电子有限公司 | Stop piece boat assembly of oxidation diffusion technology for semiconductor wafer manufacturing process |
-
2014
- 2014-09-15 CN CN201410468782.1A patent/CN104217932B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4188245A (en) * | 1978-09-18 | 1980-02-12 | General Electric Company | Selective open tube aluminum diffusion |
CN102383197A (en) * | 2010-09-02 | 2012-03-21 | 北大方正集团有限公司 | Method for processing substrates with process gas |
CN102903634A (en) * | 2012-11-01 | 2013-01-30 | 天津中环半导体股份有限公司 | Back-face vacuum annealing process for IGBT (Insulated Gate Bipolar Translator) single crystal wafer |
CN103854977A (en) * | 2012-12-04 | 2014-06-11 | 无锡华润华晶微电子有限公司 | Stop piece boat assembly of oxidation diffusion technology for semiconductor wafer manufacturing process |
CN203192776U (en) * | 2013-03-06 | 2013-09-11 | 深圳深爱半导体股份有限公司 | Diffusion furnace tube |
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CN104217932A (en) | 2014-12-17 |
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