CN104202116B - A kind of observing and controlling number based on Turbo codings passes integral method - Google Patents
A kind of observing and controlling number based on Turbo codings passes integral method Download PDFInfo
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Abstract
A kind of observing and controlling number based on Turbo codings passes integral method, utilize isochronism Insert service in AOS agreements, with reference to incoherent Spread-spectrum TTC System feature, solve ranging and range rate and high-speed digital transmission carries out observing and controlling unified channel fusion problem, establish reliable and stabilization remote measurement, remote control, ranging and range rate and high-speed digital transmission link between star ground.Compared with using observing and controlling class sum to pass the present situation that class unit separates in existing satellite technology, this patent realizes integrated system support unit, lightweight and Miniaturization Design, is had broad application prospects in terms of medium and low earth orbit satellites realize high-speed digital transmission using observing and controlling channel.
Description
Technical field
The present invention relates to a kind of observing and controlling number based on Turbo codings to pass integral method, solves ranging and range rate and high speed
Number comes into row observing and controlling unified channel fusion problem, establishes reliable and stabilization remote measurement, remote control, ranging and range rate and height between star ground
Fast number passes link.Mainly used on all kinds of medium and low earth orbit satellites Spread Spectrum TT＆C platforms, belong to Satellite TT and communication technical field.
Background technology
At this stage, the moonlet of China's transmitting is more and more, and in-orbit number of satellite also increases therewith, to manage simultaneously more
Satellite in orbit, present mode of operation can not meet to require.Therefore, it is simplified equipment that observing and controlling sum, which passes and shares a channel,
One of effective means.
Realize that observing and controlling passes unified channels with number, the development costs of on-board equipment can not only be saved, also make device miniaturization,
It is integrated, while improve its Electro Magnetic Compatibility and power usage efficiency.The merging of measuring and controlling equipment and data transmission equipment, ground on star
Tracking telemetry and command station and Shuo Chuan receiving stations merge the expense that also can greatly reduce ground installation, simplifies on-board equipment, earth station
Operation and management.
Therefore, unified channel meet moonlet small volume, it is in light weight, cost is low and the lead time is short the features such as, be survey
Control the direction of channel and Data Channel development.
Measuring and controlling equipment and the two big kind equipments that data transmission equipment is spacecraft, realize spacecraft observing and controlling service and high speed number respectively
According to the function of transmission.At this stage, it is domestic mainly to realize spacecraft engineering observing and controlling with S-band space flight measurement and control, pass height under spacecraft
Fast number passes signal.
These designs have the following disadvantages：
1) TT＆C system and Data transfer system are realized on a different channel, are managed respectively, not only increase equipment
Development cost
2 observing and controlling class sums pass the separation of class unit, and supporting unit species is various, and state of the art is difficult to control；
3) system weight, volume and power consumption are not dominant, and Electro Magnetic Compatibility is poor, and power usage efficiency is low.
The content of the invention
The technology of the present invention solves problem：A kind of overcome the deficiencies in the prior art, there is provided survey based on Turbo codings
Control number and pass integral method, ranging and range rate and high-speed digital transmission are subjected to observing and controlling unified channel Combined design, at the same with completing star it
Between observing and controlling sum pass function, realize integrated satellite unit, lightweight and Miniaturization Design, simplify the kind of system support
Class, volume and power consumption.
The present invention technical solution be：A kind of observing and controlling number based on Turbo codings passes integral method, and step is such as
Under：
(1) according to symbol after high spped coding under system clock fs, spread-spectrum pseudo code frequency fg and observing and controlling number biography framework for intergration
Speed ft, determine sampling clock variable fi so that fs=K1 × fi, ft=K2 × fi, fg=K3 × fi, fi=K4 × 2Hz, its
Middle K1, K2, K3 and K4 are natural number；
(2) system clock fs produces the character rate ft after high-speed digital transmission coding using digital controlled oscillator NCO, and ft is carried out
1/3 or 1/6 frequency dividing, obtains transmission frame framing effective information speed ft1；The transmission frame is the output data of spread spectrum answering machine
Frame；
Ft1 is subjected to 1/8 times of frequency dividing, obtains effective byte speed ft2 during transmission frame framing；According to the whole frame word of transmission frame
Length Nb is saved, 2*Nb times is carried out to byte-rate ft2 and counts frequency dividing, square-wave signal ft3 corresponding to generation and transmission frame frame frequency；
(3) answering machine is spread using clock 2Hz as moment pulse of closing the door, and ranging and the information that tests the speed to input carry out shutdown and adopted
Sample, resolves correct ranging and the information that tests the speed；
(4) so that serially alignments complete the comparison of the input number biography effective frame head of frame by turn, if comparing successfully, to input
Number passes the effective frame head of frame and carries out serioparallel exchange, and will input number biography frame according to the high/low level of square-wave signal ft3 in units of byte has
Effect frame head carries out ping-pong type and cached into first memory, while the byte pointer for measuring caching depth adds up；If compare
Failure, then continue effective frame head and compare, the byte pointer for measuring caching depth keeps constant；
The number passes input high-speed digital transmission data frame of the frame for spread spectrum answering machine；
It is described serially to refer to that inputting number passes frame and the integrated body of known observing and controlling number biography than the logarithm biography effective frame head of frame by turn
The number of defined processed passes frame frame head and is compared；
It is described to be delayed the input number biography effective frame head ping-pong type of frame according to the high/low level of square-wave signal ft3 in units of byte
Deposit into first memory, be specially：First memory bit wide is 8bit, i.e. a byte, and memory length is 2 times of transmission
Frame byte length, i.e. 2*Nb, first memory are divided into two parts, i.e. upper half and bottom half, each section length up and down and are equal to
Transmission frame byte length；When square-wave signal ft3 is high level, the input received is stored to upper half；Work as square-wave signal
When ft3 is low level, the input number received biography frame is stored to bottom half；The number, which passes frame, to be included：Frame synchronization head, main channel
Identification, pseudo channel identification and valid data domain；
(5) so that serially alignments judge that current number passes whether frame pseudo channel is effective, and explanation is current if effectively by turn
It is that significant figure passes frame that number, which passes frame, carries out the byte cache of input data, and byte pointer adds up, afterwards into step (6), if nothing
It is invalid infilled frame that effect, which then illustrates that current number passes frame, need to reject the buffered invalid infilled frame frame head to first memory, together
When byte pointer subtract byte number corresponding to invalid infilled frame frame head, afterwards into step (4)；
It is described serially to refer to that inputting number passes frame and the integrated body of known observing and controlling number biography than logarithm biography frame pseudo channel by turn
The number of defined processed passes frame pseudo channel and is compared；
(6) using the high/low level of ft3 square-wave signals as frame frequency benchmark, using ft2 as effective byte speed, according to observing and controlling number
The transmission frame-form of framework for intergration is passed, to the byte framing of ranging and range rate information and effective high-speed digital transmission data, is passed after framing
Defeated frame carries out ping-pong type and cached into second memory；Second memory bit wide and buffer storage length are identical with the first buffer,
And equally it is divided into bottom half；
The frame frequency benchmark refers to that the frequency of ft3 square-wave signals is equal with the frame rate of output transmission frame, and ft3 is high level
First transmission frame framing of Shi Jinhang, second transmission frame framing is carried out when ft3 is low level, subsequently by that analogy；
If first memory valid data byte depth waiting for transmission is less than the data field space length of transmission frame, transmit
Frame data domain remaining space fills invalid filler；
(7) while transmission frame framing, using ft2 as effective byte speed, current transmission is obtained according to parallel CRC algorithm
The CRC effect codes of frame, and it is filled to the postamble of transmission frame；
(8) using ft as character rate, the Turbo coded auxiliary synchronization identifiers being pre-stored within spread spectrum answering machine are read
ASM；
(9) using ft1 as information rate, order reads the data in second memory；The order reads second memory
In data refer to that the count value in bit counter is incremented by with ft1 rate linears, the count value in bit counter divided by 8,
Obtained quotient is taken out in correspondence position as byte address, remainder as bit addresses using byte address and bit addresses
Data da, that is, deliver to Turbo encoder A input data；
(10) using the count value of bit counter as input, in the case where system clock fs drives clock, by data lookup table side
Method, data interlacing address corresponding to da is read from the 3rd buffer；3rd buffer is the precalculated friendship of storage
Knit the memory of address search table；
(11) using ft1 as information rate, second deposits corresponding to the middle data interlacing address determined of sequential reading step (10)
Interleaving data db in reservoir；
The order reads data db corresponding to interleaving address in second memory and refers to interleaving address divided by 8, obtains
It is byte address that quotient, which makees data db, and remainder is bit addresses as data db, utilizes byte address and bit addresses taking-up pair
The data db in position is answered, that is, delivers to Turbo encoder B input data；
(12) using ft as character rate, the data to be encoded da and db that are obtained in step (9) and step (11) are carried out
Turbo is encoded；
(13) using ft as character rate, according to given pseudo-random sequence multinomial, scrambling pseudo-code sequence is calculated in real time, and
Modulus two plus computing are carried out with the transmission frame data field in addition to attached synchronization identifier, completes data scrambling process；
(14) radio-frequency modulations are carried out to the data after being scrambled in step (13) and amplification filters, completed observing and controlling number and pass integration
Downlink data transmission under system.
The frame structure that input number in the step (4) passes frame is as shown in table 1, is specially：
The input number, which passes frame, to include frame synchronization data, lives channel identification data, virtual channel data and data numeric field data,
Wherein, synchrodata 32bit, to live channel identification data be 10bit, virtual channel data 6bit, data numeric field data is
122Byte；
Table 1
| Frame synchronization | Main channel identifies | Pseudo channel identifies | Data field |
| 32bit | 10bit | 6bit | 122Byte |
The transmission frame-form that observing and controlling number in the step (6) passes framework for intergration is as shown in table 2, is specially：
The transmission frame-form includes：Synchronization identifier ASM, transmission frame dominate head, ranging and range rate information, high-speed digital transmission number
According to transmission frame postamble, wherein, synchronization identifier ASM be 4 bytes, transmission frame dominate head be 8 bytes, ranging and range rate information be 18
Byte, high-speed digital transmission data are 992 bytes and transmission frame postamble is 2 bytes, and whole transmission frame amounts to 1024 bytes；Its high speed
Number, which passes data, includes data bit stream pointer and valid data domain, and data bit stream pointer is 2 bytes and valid data domain is 990 words
Section；
Table 2
The data to be encoded da and db that are obtained in step (9) and step (11) are subjected to Turbo volumes in the step (12)
Code；Specially：
(1), will coding if bit counter di is less than or equal to transmission frame data length in whole 8160 in addition to 4 byte frame heads
Device A and encoder B switches are connected to input data end, output data are obtained, if bit counter di removes 4 byte frames more than transmission frame
The outer data length in whole 8160 of head, then encoder A and encoder B and the disconnection of input data end, are connected to from closed loop mode, make coding
During which device exports output data from resetting；
It is described to refer to that encoder A and input data end da disconnects from closed loop mode, and encoder B and input data end db break
Open, coding is now used as using sign (2) xor sign (3) as encoder A data input using data (2) xor data (3)
Device B data input；The data is encoder A 4 bit shift registers；4 bit shifts that the sign is encoder B are posted
Storage；
(2) using ft as significant bit speed, the output data that is successively read in step (1), the Turbo letters of transmission frame are completed
Road encodes.
Output data in the step (1) is specially：
Turbo encoder includes 1/3Turbo codings and 1/6Turbo encodes two kinds of situations,
If Turbo is encoded to 1/3, the output data is 0a, 1a and 1b；If Turbo is encoded to 1/6, described defeated
It is 0a, 1a, 2a, 3a, 1b and 3b to go out data, and wherein encoder A outputs 0a, 1a, 2a and 3a, encoder B exports 1b and 3b, every kind of
Situation specifically includes two processing procedures；
Two processing procedures of 1/3Turbo codings are specific as follows：
(1) if bit counter di is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads, by encoder A
Input data end is connected to encoder B switches, then using ft as significant bit speed, is successively read 0a, 1a and 1b；
Wherein 0a is initial data da, and 1a is the check code corresponding to initial data da, and 1b is corresponding to initial data db
Check code；
The check code 1a and 1b is respectively adopted following formula and obtained：
1a=data (0) xor da；
1b=sign (0) xor db；
(2) if di is more than 8160, encoder A and encoder B and input data end disconnect, and are connected to from closed loop mode, make
Encoder, using ft as significant bit speed, is successively read 0a, 1a and 1b from resetting, and 12bit data are exported during resetting certainly,
Complete the 1/3Turbo channel codings of transmission frame；
The 0a, check code 1a and 1b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
Two processing procedures of 1/6Turbo codings are specific as follows：
(1) if bit counter di is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads, by encoder A
With encoder B switch be connected to input data end, then using ft as significant bit speed, be successively read 0a, 1a, 2a, 3a, 1b and
3b；
Wherein 0a is initial data da, and 1a, 2a and 3a are the check code corresponding to initial data da, and 1b and 3b are original number
According to the check code corresponding to db；
Described check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
1a=data (0) xor da；
2a=data (1) xor data (2) xor da；
3a=data (0) xor data (1) xor da；
1b=sign (0) xor sign (2) xor db；
3b=sign (0) xor sign (1) xor db；
(2) if di is more than 8160, encoder A and encoder B and input data end disconnect, and are connected to from closed loop mode, make
Encoder, using ft as significant bit speed, is successively read 0a, 1a, 2a, 3a, 1b and 3b from resetting, and is exported from during resetting
24bit data, complete the 1/6Turbo channel codings of transmission frame；
The 0a, check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
2a=data (1) xor data (3)；
3a=data (0) xor data (1) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
3b=sign (0) xor sign (1) xor sign (2) xor sign (3).
In the step (13) using ft as character rate, according to given pseudo-random sequence multinomial, calculate in real time plus
Pseudo-code sequence is disturbed, and carries out modulus two with the transmission frame data field in addition to attached synchronization identifier and adds computing, completes data scrambling
Process；Specially：
According to pseudo-random sequence multinomial F (x)=x8+x7+x5+x3+ 1 builds feedback shift register, in pseudorandom sequence
Before row first bit of output, feedback shift register is at different levels to be initialized as complete " 1 "；
Utilize pseudo-random sequence multinomial, the scramble sequence of generation approximate Gaussian white noise, first ratio of scramble sequence
It is special to carry out mould two plus computing, second bit of pseudo-random sequence and second ratio of transmission frame with first bit of transmission frame
Spy carries out mould two plus computing, the like, observing and controlling channel data randomization is completed, and frame alignment word is not scrambled.This hair
Bright beneficial effect compared with prior art is：
(1) The present invention gives observing and controlling number to pass integration specific implementation logic diagram, the AOS recommended first using CCSDS
Isochronism Insert service transmits ranging and the information that tests the speed, the channel for completing ranging information and high-speed digital transmission data melt in agreement
Close, overall plan reasonable and reliable and stable；
(2) present invention proposes observing and controlling sum and passes unified clock area management method, overcomes digital controlled oscillator NCO due to cutting
Ranging shutdown pulse cumulative time error caused by the effect of position, avoids distance value null value jump problem；
(3) present invention specify that the infilled frame rollback measure that receives, be characterized as invalid filling when input number passes frame pseudo channel
During frame, effective pillow of infilled frame has been cached into first memory, need to reject effective frame head of infilled frame in time, and otherwise first
Memory can have more 4 unnecessary byte frame head datas, and rollback logic considers comprehensively, feasible effective；
(4) present invention, which proposes, takes bit stream data pointer to characterize the implementation method of transmission frame valid data length of field,
The drift and change of number biography frame information speed can be adapted to input automatically, while avoid the data that completely whole frame data just transmit and delay
Storage overstocks；
(5) logic is realized The present invention gives Turbo check codes are special, overcome check code and posted by 4 displacements of encoder
Storage exports simple mould two and adds and cause check code error problem, ensure that Turbo cataloged procedures are correct, link code gain symbol
Close notional result.
Brief description of the drawings
Fig. 1 is the flow chart of the present invention；
Fig. 2 is the theory diagram of the present invention；
Fig. 3 is the schematic diagram of Turbo channel codings；
Fig. 4 is the theory diagram of parallel scrambling randomization.
Embodiment
The embodiment of the present invention is further described in detail below in conjunction with the accompanying drawings.
It is as shown in Figure 1 the flow chart of the present invention, is the theory diagram of the present invention described in Fig. 2, from Fig. 1 and Fig. 2, originally
A kind of observing and controlling number based on Turbo codings that invention proposes passes integral method, and implementation steps are as follows：
(1) one is passed according to system clock fs (55.974MHz), spread-spectrum pseudo code frequency fg (10.23Mbps) and observing and controlling number
Change character rate ft (3Mps/1.5Mps) after being encoded under system, determine sampling clock variable fi (16Hz).So that fs=K1 ×
Fi, ft=K2 × fi, fg=K3 × fi, fi=K4 × 2Hz.Wherein K1, K2, K3 and K4 are natural number, are completed compatible incoherent
Spread spectrum and observing and controlling number pass the uniform system clock domain management under integrated two kinds of systems.
It is a kind of Spread-spectrum TTC System that the observing and controlling number, which passes framework for intergration, and the system is in incoherent Spread-spectrum TTC System base
High-speed digital transmission function is added on plinth；In the TT ＆ C architecture, by completing remote control, remote measurement in same observing and controlling channel, ranging, testing the speed
With high-speed digital transmission function；
The uniform system clock domain management refers to determine that sampling clock amount fi, fi can obtain ranging through 1/K4 (1/8) frequency dividings
The sampling shutdown pulse 2Hz for the information that tests the speed, while ft and fg NCO timing resets are eliminated because of NCO control word cut positions using fi
Accumulative clock error caused by effect so that spread spectrum system and observing and controlling number pass framework for intergration both of which under ranging information not
Hopping phenomenon again be present
(2) system clock fs produces character rate ft after high-speed digital transmission encodes using local digital controlled oscillator NCO, and ft is entered
Row 1/3 or 1/6 divides, and obtains transmission frame framing effective information speed ft1 (1Mps/256Kps)；The transmission frame should for spread spectrum
Answer the output data frame of machine；
And ft1 is subjected to 1/8 times of frequency dividing, effective byte speed ft2 when obtaining transmission frame framing (about 128KHz and
32KHz)；According to the whole frame byte length Nb (1024) of transmission frame, 2*Nb time is carried out to byte-rate ft2 and counts frequency dividing, produce with
Square-wave signal ft3 (64Hz/16Hz) corresponding to transmission frame frame frequency；
Realize that input number passes frame and receives and export transmission frame framing on the basis of the high/low level of ft3 square-wave signals, simultaneously
Complete the different buffer areas caching that number passes frame and transmission frame.
(3) answering machine is spread using clock 2Hz as moment pulse of closing the door, and ranging and the information that tests the speed to input carry out shutdown and adopted
Sample, resolves correct ranging and the information that tests the speed；
The ranging information, which resolves, refers to that spread-spectrum pseudo code phase delay calculates digital processing according to obtained by shutdown sampling instant
Pseudo-range information corresponding to time delay.The information that tests the speed, which resolves, refers to that carrier phase calculates locking according to obtained by shutdown sampling instant
Incoming carrier frequency and the difference of nominal value under state, form up-Doppler frequency difference information；
(4) so that serially alignments complete the comparison of the input number biography effective frame head of frame by turn, if comparing successfully, to input
Number passes the effective frame head of frame and carries out serioparallel exchange, and will input number biography frame according to the high/low level of square-wave signal ft3 in units of byte has
Effect frame head carries out ping-pong type and cached into first memory, while the byte pointer for measuring caching depth adds up；If compare
Failure, then continue effective frame head and compare, the byte pointer for measuring caching depth keeps constant；
The number passes input high-speed digital transmission data frame of the frame for spread spectrum answering machine；
It is described serially to refer to that inputting number passes frame and the integrated body of known observing and controlling number biography than the logarithm biography effective frame head of frame by turn
The number of defined processed passes frame frame head and is compared；
It is described to be delayed the input number biography effective frame head ping-pong type of frame according to the high/low level of square-wave signal ft3 in units of byte
Deposit into first memory, be specially：First memory bit wide is 8bit (byte), and memory length is more than 2 times
Transmission frame byte length (2048 byte), first memory is divided into two parts, i.e. upper half and bottom half up and down, each section
Length is not less than transmission frame byte length；When square-wave signal ft3 is high level, the input number received is passed into frame (including frame
Synchronous head, main channel identification, pseudo channel identification and valid data domain) store to upper half, when square-wave signal ft3 is low level
When, the input number received biography frame is stored to bottom half, vice versa；
The frame structure that the number passes frame is as shown in table 1, and as shown in Table 1, number, which passes frame, to include frame synchronization data, live channel identification
Data, virtual channel data and data numeric field data, wherein, synchrodata 32bit, firmly channel identification data are 10bit, virtually
Channel data is 6bit, and data numeric field data is 122Byte.
Table 1
| Frame synchronization | Main channel identifies | Pseudo channel identifies | Data field |
| 32bit | 10bit | 6bit | 122Byte |
(5) so that serially alignments judge that current number passes whether frame pseudo channel is effective, and explanation is current if effectively by turn
It is that significant figure passes frame that number, which passes frame, carries out the byte cache of input data, and byte pointer adds up, afterwards into step (6).If nothing
It is invalid infilled frame that effect, which then illustrates that current number passes frame, need to reject the buffered invalid infilled frame frame head to first memory, together
When byte pointer also need to subtract byte number corresponding to invalid infilled frame frame head, afterwards into step (4)；
It is described serially to refer to that inputting number passes frame and the integrated body of known observing and controlling number biography than logarithm biography frame pseudo channel by turn
The number of defined processed passes frame pseudo channel and is compared；
(6) using the high/low level of ft3 square-wave signals as frame frequency benchmark, using ft2 as effective byte speed, according to observing and controlling number
The set transmission frame-form (Fig. 4) of framework for intergration is passed, to the byte framing of ranging and range rate information and effective high-speed digital transmission data,
Transmission frame progress ping-pong type is cached into second memory after framing, second memory bit wide, buffer storage length and the first buffer
It is identical, equally it is divided into bottom half；
The frame frequency benchmark refers to that the frequency of ft3 square-wave signals is equal with the frame rate of output transmission frame, and ft3 is high level
First transmission frame framing is carried out, ft3 is that low level carries out second transmission frame framing, and subsequently by that analogy, vice versa；
The transmission frame-form that the observing and controlling number passes framework for intergration is as shown in table 2, is specially：
The transmission frame-form is followed successively by：Synchronization identifier ASM, transmission frame dominate head, ranging and range rate information, high-speed digital transmission
Data and transmission frame postamble, wherein, synchronization identifier ASM is 4 bytes, the leading head of transmission frame is 8 bytes, ranging and range rate information is
18 bytes, high-speed digital transmission data are 992 bytes and transmission frame postamble is 2 bytes, and whole transmission frame amounts to 1024 bytes；It is wherein high
Fast number, which passes data, includes data bit stream pointer and valid data domain, and data bit stream pointer is 2 bytes and valid data domain is 990 words
Section；
Table 2
When first memory valid data byte depth waiting for transmission is less than the data field space length of transmission frame (990
Byte), data field remaining space fills invalid filler；
(7) transmission frame effect code is determined according to parallel CRC (CRC) algorithm.In the same of transmission frame framing
When, using ft2 as effective byte speed, the CRC effect codes of current transmission frame are obtained according to parallel CRC algorithm, and be filled to transmission frame
Postamble；
Cardiopulmonary bypass in beating heart redundancy check code (CRC) algorithm is particular reference《Computer and digital engineering》Journal
The 9th phase page 112 of volume 34 (2006), write by Yao Weisuo《The research and realization of Cyclic Redundancy Check Parallel Algorithm》；
(8) using ft as character rate, the Turbo coded auxiliary synchronization identifiers being pre-stored within spread spectrum answering machine are read
ASM；
(9) using ft1 as information rate, order reads the data in second memory；The order reads second memory
In data refer to that the count value in bit counter is incremented by with ft1 rate linears, the count value in bit counter divided by 8,
Obtained quotient is taken out in correspondence position as byte address, remainder as bit addresses using byte address and bit addresses
Data da, that is, deliver to Turbo encoder A input data；
(10) using the count value of bit counter as input, in the case where high power system clock fs drives clock, looked into by data
Table method, data interlacing address corresponding to da is read from the 3rd buffer；3rd buffer refers to according to Turbo channels
Coding requirement, for storing interleaving address look-up table computed in advance；
(11) using ft1 as information rate, second deposits corresponding to the middle data interlacing address determined of sequential reading step (10)
Interleaving data db in reservoir；
The order reads data db corresponding to interleaving address in second memory and refers to interleaving address divided by 8, obtains
It is byte address that quotient, which makees data db, and remainder is bit addresses as data db, utilizes byte address and bit addresses taking-up pair
The data db in position is answered, that is, delivers to Turbo encoder B input data；
(12) using ft as character rate, by the data to be encoded data da and db obtained in step (9) and step (11) by
Turbo codings are completed according to the Turbo encoder logic diagram that Fig. 3 gives；
Specially：
(1), will coding if bit counter di is less than or equal to transmission frame data length in whole 8160 in addition to 4 byte frame heads
Device A and encoder B switches are connected to input data end, output data are obtained, if bit counter di removes 4 byte frames more than transmission frame
The outer data length in whole 8160 of head, then encoder A and encoder B and the disconnection of input data end, are connected to from closed loop mode, make coding
During which device exports output data from resetting；
It is described to refer to that encoder A and input data end da disconnects from closed loop mode, and encoder B and input data end db break
Open, coding is now used as using sign (2) xor sign (3) as encoder A data input using data (2) xor data (3)
Device B data input；The data is encoder A 4 bit shift registers；4 bit shifts that the sign is encoder B are deposited
Device；
(2) using ft as significant bit speed, the output data that is successively read in step (1), the Turbo letters of transmission frame are completed
Road encodes.
Turbo encoder includes 1/3Turbo codings and 1/6Turbo encodes two kinds of situations,
If Turbo is encoded to 1/3, the output data is 0a, 1a and 1b；If Turbo is encoded to 1/6, described defeated
It is 0a, 1a, 2a, 3a, 1b and 3b to go out data, and wherein encoder A outputs 0a, 1a, 2a and 3a, encoder B exports 1b and 3b, every kind of
Situation specifically includes two processing procedures；
Two processing procedures of 1/3Turbo codings are specific as follows：
(1) if bit counter di is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads, by encoder A
Input data end is connected to encoder B switches, then using ft as significant bit speed, is successively read 0a, 1a and 1b；
Wherein 0a is initial data da, and 1a is the check code corresponding to initial data da, and 1b is corresponding to initial data db
Check code；
The check code 1a and 1b is respectively adopted following formula and obtained：
1a=data (0) xor da；
1b=sign (0) xor db；
(2) if di is more than 8160, encoder A and encoder B and input data end disconnect, and are connected to from closed loop mode, make
Encoder, using ft as significant bit speed, is successively read 0a, 1a and 1b from resetting, and 12bit data are exported during resetting certainly,
Complete the 1/3Turbo channel codings of transmission frame；
The 0a, check code 1a and 1b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
Two processing procedures of 1/6Turbo codings are specific as follows：
(1) if bit counter di is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads, by encoder A
With encoder B switch be connected to input data end, then using ft as significant bit speed, be successively read 0a, 1a, 2a, 3a, 1b and
3b；
Wherein 0a is initial data da, and 1a, 2a and 3a are the check code corresponding to initial data da, and 1b and 3b are original number
According to the check code corresponding to db；
Described check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
1a=data (0) xor da；
2a=data (1) xor data (2) xor da；
3a=data (0) xor data (1) xor da；
1b=sign (0) xor sign (2) xor db；
3b=sign (0) xor sign (1) xor db；
(2) if di is more than 8160, encoder A and encoder B and input data end disconnect, and are connected to from closed loop mode, make
Encoder, using ft as significant bit speed, is successively read 0a, 1a, 2a, 3a, 1b and 3b from resetting, and is exported from during resetting
24bit data, complete the 1/6Turbo channel codings of transmission frame；
The 0a, check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
2a=data (1) xor data (3)；
3a=data (0) xor data (1) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
3b=sign (0) xor sign (1) xor sign (2) xor sign (3).
(13) using ft as character rate, according to the pseudo-random sequence multinomial given in Fig. 4, scrambling pseudo-code sequence is calculated in real time
Row, and carry out modulus two with the transmission frame data field in addition to attached synchronization identifier and add computing, complete data scrambling process；
According to pseudo-random sequence multinomial F (x)=x8+x7+x5+x3+ 1 builds feedback shift register, in pseudo-random sequence
Before exporting first bit, feedback shift register is at different levels to be initialized as complete " 1 "；
Utilize pseudo-random sequence multinomial, the scramble sequence of generation approximate Gaussian white noise, first ratio of scramble sequence
It is special to carry out mould two plus computing, second bit of pseudo-random sequence and second ratio of transmission frame with first bit of transmission frame
Spy carries out mould two plus computing, the like, observing and controlling channel data randomization is completed, and frame alignment word is not scrambled.
(14) the channel coding all processes that observing and controlling number passes framework for intergration are completed, output data carries out radio-frequency modulations and put
Big filtering, complete the downlink data transmission under observing and controlling number biography framework for intergration.
This method is used on model satellite has been launched at present, is shown by the test of whole star, after applying the inventive method,
The unified signal Combined design of observing and controlling sum biography is realized, remote control, remote measurement and high-speed digital transmission data are without error code, ranging and the essence that tests the speed
Degree meets the general technical requirement of measure rail, and channel Turbo coding gains reach 7.4dB, fully demonstrate the effective of this method
Property and feasibility, substantially increase the application scenario of Spread Spectrum TT＆C class unit, efficiently solve Spread Spectrum TT＆C while realize height
The mission requirements of fast data transfer.
The content not being described in detail in description of the invention belongs to the known technology of professional and technical personnel in the field.
Claims (6)
1. a kind of observing and controlling number based on Turbo codings passes integral method, it is characterised in that step is as follows：
(1) according to character rate after high spped coding under system clock fs, spread-spectrum pseudo code frequency fg and observing and controlling number biography framework for intergration
Ft, determine sampling clock variable fi so that fs=K1 × fi, ft=K2 × fi, fg=K3 × fi, fi=K4 × 2Hz, wherein
K1, K2, K3 and K4 are natural number；
(2) system clock fs produces the character rate ft after high-speed digital transmission coding using digital controlled oscillator NCO, and 1/3 is carried out to ft
Or 1/6 frequency dividing, obtain transmission frame framing effective information speed ft1；The transmission frame is the output data frame of spread spectrum answering machine；
Ft1 is subjected to 1/8 times of frequency dividing, obtains effective byte speed ft2 during transmission frame framing；According to the whole frame byte long of transmission frame
Nb is spent, 2*Nb times is carried out to byte-rate ft2 and counts frequency dividing, square-wave signal ft3 corresponding to generation and transmission frame frame frequency；
(3) answering machine is spread using clock 2Hz as moment pulse of closing the door, ranging and the information that tests the speed to input carry out shutdown sampling,
Resolve correct ranging and the information that tests the speed；
(4) so that serially alignments complete the comparison of the input number biography effective frame head of frame by turn, if comparing successfully, input number is passed
The effective frame head of frame carries out serioparallel exchange, and frame valid frame is passed by number is inputted according to the high/low level of square-wave signal ft3 in units of byte
Head carries out ping-pong type and cached into first memory, while the byte pointer for measuring caching depth adds up；If comparing failure,
Then continue effective frame head to compare, the byte pointer for measuring caching depth keeps constant；
The serial input number biography effective frame head of frame that compares by turn refers to that input number passes frame frame head and known observing and controlling number passes one
The number biography frame frame head for changing system defined is compared；
It is described in units of byte according to the high/low level of square-wave signal ft3 will input number pass the effective frame head ping-pong type of frame cache to
In first memory, it is specially：First memory bit wide is 8bit, i.e. a byte, and first memory length is 2 times of transmission
Frame byte length, i.e. 2*Nb, first memory are divided into two parts, i.e. upper half and bottom half, each section length up and down and are equal to
Transmission frame byte length；When square-wave signal ft3 is high level, the input number received the biography effective frame head of frame is stored to upper half
Area；When square-wave signal ft3 is low level, the input number received the biography effective frame head of frame is stored to bottom half；
(5) so that serially alignments judge whether current number biography frame pseudo channel is effective, illustrates that current number passes if effectively by turn
Frame is that significant figure passes frame, carries out the byte cache of input data, and byte pointer adds up, afterwards into step (6), if invalid
It is invalid infilled frame to illustrate that current number passes frame, need to reject the buffered invalid infilled frame frame head to first memory, while word
Section pointer subtracts byte number corresponding to invalid infilled frame frame head, afterwards into step (4)；
The serial input number biography frame pseudo channel that compares by turn refers to that inputting number passes the pseudo channel of frame and known observing and controlling number
The number biography frame pseudo channel for passing framework for intergration defined is compared；
(6) using the high/low level of ft3 square-wave signals as frame frequency benchmark, using ft2 as effective byte speed, one is passed according to observing and controlling number
The transmission frame-form of body system, to the byte framing of ranging and range rate information and effective high-speed digital transmission data, transmission frame after framing
Ping-pong type is carried out to cache into second memory；Second memory bit wide and buffer storage length are identical with first memory, and together
Sample is divided into bottom half；
The frame frequency benchmark refers to that the frequency of ft3 square-wave signals is equal with the frame rate of output transmission frame, and ft3 enters when being high level
First transmission frame framing of row, second transmission frame framing is carried out when ft3 is low level, subsequently by that analogy；
If first memory valid data byte depth waiting for transmission is less than the data field space length of transmission frame, frame number is transmitted
Invalid filler is filled according to domain remaining space；
(7) while transmission frame framing, using ft2 as effective byte speed, current transmission frame is obtained according to parallel CRC algorithm
CRC effect codes, and it is filled to the postamble of transmission frame；
(8) using ft as character rate, the Turbo coded auxiliary synchronization identifiers ASM being pre-stored within spread spectrum answering machine is read；
(9) using ft1 as information rate, order reads the data in second memory；The order is read in second memory
Data refer to that the count value in bit counter is incremented by with ft1 rate linears, the count value in bit counter divided by 8, obtain
Quotient as byte address, remainder utilizes byte address and bit addresses to take out in correspondence position and treat as bit addresses
Coded data da, as the input data for delivering to Turbo encoder A；
(10) using the count value of bit counter as input, in the case where system clock fs drives clock, by data lookup table method, from
Data interlacing address corresponding to data to be encoded da is read in 3rd buffer；3rd buffer is precalculated to store
Interleaving address look-up table memory；
(11) using ft1 as information rate, second memory corresponding to the data interlacing address of determination in sequential reading step (10)
Middle data to be encoded db；
The order reads data to be encoded db corresponding to interleaving address in second memory and refers to interleaving address divided by 8, obtains
Quotient make data to be encoded db byte address, bit addresses of the remainder as data to be encoded db, using byte address and
Bit addresses take out the data to be encoded db in correspondence position, as the input data for delivering to Turbo encoder B；
(12) using ft as character rate, the data to be encoded da and db that are obtained in step (9) and step (11) are subjected to Turbo volumes
Code；
(13) using ft as character rate, according to given pseudo-random sequence multinomial, scrambling pseudo-code sequence is calculated in real time, and and remove
Transmission frame data field outside attached synchronization identifier carries out modulus two plus computing, completes data scrambling process；
(14) radio-frequency modulations are carried out to the data after being scrambled in step (13) and amplification filters, completed observing and controlling number and pass framework for intergration
Under downlink data transmission.
2. a kind of observing and controlling number based on Turbo codings according to claim 1 passes integral method, it is characterised in that：Institute
It is as shown in table 1 to state the frame structure of the input number biography frame in step (4), is specially：
The input number, which passes frame, includes frame synchronization head, main channel identification, pseudo channel identification and valid data domain, wherein, frame is same
Step head is 32bit, main channel is identified as 10bit, and pseudo channel is identified as 6bit, and valid data domain is 122Byte；
Table 1
3. a kind of observing and controlling number based on Turbo codings according to claim 1 passes integral method, it is characterised in that：Institute
It is as shown in table 2 to state the transmission frame-form of the observing and controlling number biography framework for intergration in step (6), is specially：
The transmission frame-form includes：Synchronization identifier ASM, transmission frame dominate head, ranging and range rate information, high-speed digital transmission data and
Transmission frame postamble, wherein, synchronization identifier ASM is 4 bytes, the leading head of transmission frame is 8 bytes, ranging and range rate information is 18 words
Section, high-speed digital transmission data are 992 bytes and transmission frame postamble is 2 bytes, and whole transmission frame amounts to 1024 bytes；Its high speed number
Passing data includes data bit stream pointer and valid data domain, and data bit stream pointer is 2 bytes and valid data domain is 990 bytes；
Table 2
4. a kind of observing and controlling number based on Turbo codings according to claim 1 passes integral method, it is characterised in that：Institute
State in step (12) and the data to be encoded da and db that are obtained in step (9) and step (11) are subjected to Turbo codings；Specially：
(I), will if the count value di of bit counter is less than or equal to transmission frame data length in whole 8160 in addition to 4 byte frame heads
Encoder A and encoder B switches are connected to input data end, obtain output data, are passed if the count value di of bit counter is more than
Defeated frame data length in whole 8160 in addition to 4 byte frame heads, then encoder A and encoder B and the disconnection of input data end, are switched to certainly
Closed loop mode, encoder is set during which to export output data from resetting；
It is described to refer to that encoder A and data to be encoded da disconnects from closed loop mode, and encoder B and data to be encoded db disconnects,
Encoder B is now used as using sign (2) xor sign (3) as encoder A data input using data (2) xor data (3)
Data input；The data is encoder A 4 bit shift registers；The sign is encoder B 4 bit shift registers；
(II) using ft as significant bit speed, the output data that is successively read in step (I), the Turbo channels of transmission frame are completed
Coding.
5. a kind of observing and controlling number based on Turbo codings according to claim 4 passes integral method, it is characterised in that：Institute
The output data stated in step (I) is specially：
Turbo encoder includes 1/3Turbo codings and 1/6Turbo encodes two kinds of situations,
If Turbo is encoded to 1/3, the output data is 0a, 1a and 1b；If Turbo is encoded to 1/6, the output number
0a, 1a, 2a and 3a, encoder B output 1b and 3b, each case are exported according to for 0a, 1a, 2a, 3a, 1b and 3b, wherein encoder A
Specifically include two processing procedures；
Two processing procedures of 1/3Turbo codings are specific as follows：
(1), will coding if the count value di of bit counter is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads
Device A and encoder B switches are connected to input data end, then using ft as significant bit speed, are successively read 0a, 1a and 1b；
Wherein 0a is data to be encoded da, and 1a is the check code corresponding to data to be encoded da, and 1b is right for data to be encoded db
The check code answered；
The check code 1a and 1b is respectively adopted following formula and obtained：
1a=data (0) xor da；
1b=sign (0) xor db；
(2) if di is more than 8160, encoder A and encoder B and input data end disconnect, and switch to from closed loop mode, make volume
Code device, using ft as significant bit speed, is successively read 0a, 1a and 1b from resetting, complete from the data that 12bit is exported during resetting
Into the 1/3Turbo channel codings of transmission frame；
The 0a, check code 1a and 1b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
Two processing procedures of 1/6Turbo codings are specific as follows：
(1), will coding if the count value di of bit counter is less than transmission frame data length in whole 8160 in addition to 4 byte frame heads
Device A and encoder B switches are connected to input data end, then using ft as significant bit speed, are successively read 0a, 1a, 2a, 3a, 1b
And 3b；
Wherein 0a is data to be encoded da, and 1a, 2a and 3a are the check code corresponding to data to be encoded da, and 1b and 3b are to be encoded
Check code corresponding to data db；
Described check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
1a=data (0) xor da；
2a=data (1) xor data (2) xor da；
3a=data (0) xor data (1) xor da；
1b=sign (0) xor sign (2) xor db；
3b=sign (0) xor sign (1) xor db；
(2) if the count value di of bit counter is more than 8160, encoder A and encoder B and input data end disconnect, switching
To from closed loop mode, encoder is set using ft as significant bit speed, to be successively read 0a, 1a, 2a, 3a, 1b and 3b, certainly from resetting
24bit data are exported during clearing, complete the 1/6Turbo channel codings of transmission frame；
The 0a, check code 1a, 2a, 3a, 1b and 3b are respectively adopted obtained by following formula：
0a=data (2) xor data (3)；
1a=data (0) xor data (2) xor data (3)；
2a=data (1) xor data (3)；
3a=data (0) xor data (1) xor data (2) xor data (3)；
1b=sign (0) xor sign (2) xor sign (3)；
3b=sign (0) xor sign (1) xor sign (2) xor sign (3).
6. a kind of observing and controlling number based on Turbo codings according to claim 2 passes integral method, it is characterised in that：Institute
State in step (13) using ft as character rate, according to given pseudo-random sequence multinomial, calculate scrambling pseudo-code sequence in real time,
And carry out modulus two with the transmission frame data field in addition to attached synchronization identifier and add computing, complete data scrambling process；Specially：
According to pseudo-random sequence multinomial F (x)=x8+x7+x5+x3+ 1 builds feedback shift register, is exported in pseudo-random sequence
Before first bit, feedback shift register is at different levels to be initialized as complete " 1 "；
Using pseudo-random sequence multinomial, the scramble sequence of white Gaussian noise is produced, first bit of scramble sequence is with transmitting
First bit of frame carries out mould two plus computing, and second bit of scramble sequence and second bit of transmission frame carry out mould two
Add computing, the like, observing and controlling channel data randomization is completed, and frame alignment word is not scrambled.
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| CN107797098B (en) * | 2017-09-07 | 2020-03-24 | 西安空间无线电技术研究所 | Distance zero value calibration method and system based on measurement, control and data transmission integration |
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| CN109150287B (en) * | 2018-08-28 | 2020-11-10 | 西安空间无线电技术研究所 | Incoherent clock domain management method based on equal frame frequency transmission |
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