Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
The non-isolation voltage stabilizing flow equalizing circuit embodiment of the present invention being provided below in conjunction with specific embodiment is elaborated:
embodiment mono-:
Fig. 1 shows the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides, and for convenience of explanation, only shows the part relevant to the present embodiment, and details are as follows:
Non-isolation voltage stabilizing flow equalizing circuit comprises that the first controller 100, the first controllers 100 can be single-chip microcomputer or pulse width modulator.
Non-isolation voltage stabilizing flow equalizing circuit also comprises the first inductance L 1, the second inductance L 2, the first voltage stabilizing current-sharing unit 200, voltage sample unit 300 and current sampling unit 400.
The first end of the first inductance L 1 accesses the first direct current Vin+, the first end of the second inductance L 2 is exported the second direct current Vin-, the second end of the first inductance L 1 and the second end of the second inductance L 2 are connected respectively first input end and second input of the first voltage stabilizing current-sharing unit 200, the output of the first voltage stabilizing current-sharing unit 200 is exported direct current to load 500, the input of voltage sample unit 300 and output are connected respectively output and first controller 100 of the first voltage stabilizing current-sharing unit 200, the first sampling end of current sampling unit 400 receives the loop current that load 500 is exported, the second sampling end of current sampling unit 400 and output are connected respectively loop end and first controller 100 of the first voltage stabilizing current-sharing unit 200, the first controller 100 is also connected with the direct current regulation and control end of the first voltage stabilizing current-sharing unit 200.
The first inductance L 1 carries out exporting the first voltage stabilizing current-sharing unit 200 to after energy storage to the first direct current Vin+, the direct current afterflow that the first inductance L 1 is exported in the first voltage stabilizing current-sharing unit 200 exports load 500 to, the loop current that load 500 is exported exports the second inductance L 2 to through the first voltage stabilizing current-sharing unit 200 afterflows, the second inductance L 2 carries out exporting the second direct current Vin-after energy storage to above-mentioned loop current, and the current value of the second direct current Vin-equals the current value of the first direct current Vin+; The output voltage (export the galvanic voltage of load 500) of voltage sample unit 300 to non-isolation voltage stabilizing flow equalizing circuit sampled, and feedback voltage sampled signal V
sto the first controller 100, the loop current that current sampling unit 400 is exported load 500 is carried out current sample, and feedback current sampled signal I
sexport the first control signal Ctrl according to above-mentioned voltage sampling signal and current sampling signal to the first controller 100, the first controllers 100
1to the first voltage stabilizing current-sharing unit 200; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is greater than default current-sharing magnitude of voltage and/or above-mentioned loop current and is greater than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 is according to the first control signal Ctrl
1reduce output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is less than default current-sharing magnitude of voltage and/or above-mentioned loop current and is less than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 is according to the first control signal Ctrl
1increase output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit.
From foregoing, the first end of the first end of the first inductance L 1 and the second inductance L 2 is equivalent to anode and the negative terminal of supply line, and anode accesses the first direct current Vin+, and negative terminal is exported the second direct current Vin-.Above-mentioned default current-sharing magnitude of voltage and default current-sharing current value refer to respectively: in the time that above-mentioned non-isolation voltage stabilizing flow equalizing circuit is powered to supply line and need to realize voltage stabilizing and current balance type, and output voltage values and the output current value of non-isolation voltage stabilizing flow equalizing circuit.
In addition, in above-mentioned non-isolation voltage stabilizing flow equalizing circuit, owing to can output voltage being detected and according to voltage sampling signal, output voltage be adjusted, so can not there is not the unsettled situation of output voltage because of the variation of input pressure reduction, so with respect to prior art mentioned in background technology, the normal work of above-mentioned non-isolation voltage stabilizing flow equalizing circuit is not to be subject to input the restriction of pressure reduction.
For power supplying efficiency, be actually relevant to " stablizing of output voltage " and " thermal losses that device occurs ", power supplying efficiency is low because too high the causing of reactive power that when power supply is done, and output voltage is while exceeding the rated voltage that circuit can load, will increase reactive power, the thermal losses of the device in circuit increases also can increase reactive power.And in above-mentioned non-isolation voltage stabilizing flow equalizing circuit, adjusting in real time output voltage can make output voltage keep stable, and then reactive power while reducing to power, and the device adopting in above-mentioned non-isolation voltage stabilizing flow equalizing circuit can not occur that heating loss increases because input pressure reduction becomes large, reactive power when power supply also can reduce, so can reach the effect that improves power supplying efficiency.
Fig. 2 shows the exemplary circuit structure of the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides, and for convenience of explanation, only shows the part relevant to the present embodiment, and details are as follows:
The first voltage stabilizing current-sharing unit 200 comprises the first isolating transformer T1, the first switching tube 201, the first sustained diode 1 and the second sustained diode 2.
The first end 1 of the armature winding of the first isolating transformer T1 is the direct current regulation and control end of the first voltage stabilizing current-sharing unit 200, being connected to altogether of the second end 2 of the armature winding of the first isolating transformer T1 and the first controller 100, the first end 3 of the secondary winding of the first isolating transformer T1 and the second end 4 are connected respectively controlled end and the input of the first switching tube 201, the common contact of the anode of the output of the first switching tube 201 and the first sustained diode 1 is the first input end of the first voltage stabilizing current-sharing unit 200, the common contact of the negative electrode of the input of the first switching tube 201 and the second sustained diode 2 is the second input of the first voltage stabilizing current-sharing unit 200, the anode of the negative electrode of the first sustained diode 1 and the second sustained diode 2 is respectively output and the loop end of the first voltage stabilizing current-sharing unit 200.
Wherein, the first switching tube 201 can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT (Isolated Gate Bipolar Transistor, insulated gate bipolar thyristor) or other possess switching characteristic.Especially, in the time that the first switching tube 201 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the first switching tube 201; In the present embodiment, as shown in Figure 2, the first switching tube 201 is specially PMOS pipe Q1.
Voltage sample unit 300 comprises the first resistance R 1 and the second resistance R 2, the first end of the first resistance R 1 is the input of voltage sample unit 300, the common contact of the second end of the first resistance R 1 and the first end of the second resistance R 2 is the output of voltage sample unit 300, the second end ground connection of the second resistance R 2.
Current sampling unit 400 comprises the 3rd resistance R 3 and differential amplifier U1, the common contact of the first input end of the first end of the 3rd resistance R 3 and differential amplifier U1 is the first sampling end of current sampling unit 400, the common contact of the second end of the 3rd resistance R 3 and the second input of differential amplifier U1 is the second sampling end of current sampling unit 400, the output of differential amplifier U1 is the output of current sampling unit 400, and the positive power source terminal of differential amplifier U1 is connected respectively DC power supply VCC and ground with negative power end.
Below in conjunction with operation principle, the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 2 is described further:
The first inductance L 1 carries out exporting direct current after energy storage to the first direct current Vin+, this direct current exports load 500 to after the first sustained diode 1 afterflow, the loop current that load 500 is exported exports the second inductance L 2 to after the second sustained diode 2 afterflows, the second inductance L 2 carries out exporting the second direct current Vin-after energy storage to loop current, due to the symmetrical energy storage effect of the first inductance L 1 and the second inductance L 2, thereby make the current value of the first direct current Vin+ equal the current value of the second direct current Vin-.Meanwhile, the first resistance R 1 and the second resistance R 2 are carried out voltage sample to the direct current that exports load to, and voltage sampling signal is fed back to the first controller 100, the 3rd resistance R 3 is sampled to the loop current of load, and by differential amplifier U1, the sampled voltage at the 3rd resistance R 3 two ends is carried out exporting corresponding current sampling signal to the first controller 100 after differential amplification, the first controller 100 is according to voltage sampling signal V
swith current sampling signal I
sexport the first control signal Ctrl
1to the first isolating transformer T1, the first control signal Ctrl
1the on off operating mode of PMOS pipe Q1 is controlled PMOS pipe Q1 basis and the first control signal Ctrl after the first isolating transformer T1 carries out isolation processing
1corresponding duty ratio realizes make-break operation, and then realizes the adjustment to output voltage and output current, to ensure the stable of output voltage and output current.Concrete, in the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is greater than default current-sharing magnitude of voltage and/or above-mentioned loop current and is greater than default current-sharing current value, with the first control signal Ctrl
1corresponding duty ratio can reduce according to a certain change in duty cycle value, and PMOS pipe Q1 can make output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit also be reduced accordingly realizing in corresponding make-break operation process; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is less than default current-sharing magnitude of voltage and/or above-mentioned loop current and is less than default current-sharing current value, with the first control signal Ctrl
1corresponding duty ratio can increase according to a certain change in duty cycle value, and PMOS pipe Q1 can make output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit also be increased accordingly realizing in corresponding make-break operation process.
In the present embodiment, non-isolation voltage stabilizing flow equalizing circuit comprises the first inductance L 1, the second inductance L 2, the first voltage stabilizing current-sharing unit 200, voltage sample unit 300 and current sampling unit 400, and its circuit structure is simple, volume is little, cost is low and power density is high.
In addition, controlled the duty cycle of switching of the first switching tube 201 by the first controller 100, so that output voltage and the output current of non-isolation voltage stabilizing flow equalizing circuit are adjusted, thereby can in the situation that not inputted pressure differential limits, keep stable output voltage and output current, and further improve power supplying efficiency.
embodiment bis-:
On the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 1, as shown in Figure 3, it further comprises the 3rd inductance L 3, the 4th inductance L 4 and the second voltage stabilizing current-sharing unit 600 to the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides.
The first end of the first end of the 3rd inductance L 3 and the 4th inductance L 4 is connected respectively the first end of the first inductance L 1 and the first end of the second inductance L 2, the second end of the 3rd inductance L 3 and the second end of the 4th inductance L 4 are connected respectively first input end and second input of the second voltage stabilizing current-sharing unit 600, the direct current regulation and control end of the second voltage stabilizing current-sharing unit 600 is connected with the first controller 100, and the output of the second voltage stabilizing current-sharing unit 600 and loop end are connected respectively output and the loop end of the first voltage stabilizing current-sharing unit 200.
Under the control of the first controller, the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 alternations; The 3rd inductance L 3 carries out exporting the 3rd direct current Vin+ ' to the second voltage stabilizing current-sharing unit 600 after energy storage to the first direct current Vin+, in the time working in the second voltage stabilizing current-sharing unit 600, the second voltage stabilizing current-sharing unit 600 exports the 3rd direct current Vin+ ' afterflow to load 500, the loop current that load 500 is exported exports the 4th inductance L 4 to through the second voltage stabilizing current-sharing unit 600 afterflows, the 4th inductance L 4 carries out exporting the 4th direct current Vin-' after energy storage to above-mentioned loop current, and the current value of the 4th direct current Vin-' equals the current value of the 3rd direct current Vin+ '; The current sampling signal that the voltage sampling signal that the first controller 100 is exported according to voltage sample unit 300 and current sampling unit 400 are exported is exported respectively described the first control signal Ctrl
1with the second control signal Ctrl
2to the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is greater than loop current that default current-sharing magnitude of voltage and/or load 500 export and is greater than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 are respectively according to the first control signal Ctrl
1with the second control signal Ctrl
2alternation is to reduce output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is less than default current-sharing magnitude of voltage and/or above-mentioned loop current and is less than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 are respectively according to the first control signal Ctrl
1with the second control signal Ctrl
2alternation is to increase output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit.
In the present embodiment, the mode that output voltage and output current are alternately adjusted in above-mentioned the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 contributes to non-isolation voltage stabilizing flow equalizing circuit can stably work in the situation that electric current input and bearing power demand are larger greatly.
Fig. 4 shows the exemplary circuit structure of the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides, and wherein, identical with shown in Fig. 2 of the internal structure of the first voltage regulation unit 200, voltage sample unit 300 and current sampling unit 400, therefore repeats no more.
For the second voltage stabilizing current-sharing unit 600, it comprises the second isolating transformer T2, second switch pipe 601, the 3rd sustained diode 3 and the 4th sustained diode 4.
The first end 1 of the armature winding of the second isolating transformer T2 is the direct current regulation and control end of the second voltage stabilizing current-sharing unit 600, the second end 2 of the armature winding of the second isolating transformer T2 connects the earth terminal of the first controller 100, the first end 3 of the secondary winding of the second isolating transformer T2 and the second end 4 are connected respectively controlled end and the input of second switch pipe 601, the common contact of the anode of the output of second switch pipe 601 and the 3rd sustained diode 3 is the first input end of the second voltage stabilizing current-sharing unit 600, the common contact of the negative electrode of the input of second switch pipe 601 and the 4th sustained diode 4 is the second input of the second voltage stabilizing current-sharing unit 600, the anode of the negative electrode of the 3rd sustained diode 3 and the 4th sustained diode 4 is respectively output and the loop end of the second voltage stabilizing current-sharing unit 600.
Wherein, the semiconductor switch pipe that second switch pipe 601 and the first switching tube 201 are same type, this semiconductor switch pipe can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT or other possess switching characteristic, and in the time that this semiconductor switch pipe is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of semiconductor switch pipe.Due to identical with described in first embodiment of the invention of the first switching tube 201, do not repeat them here.And for second switch pipe 601, in the time that second switch pipe 601 is metal-oxide-semiconductor or IGBT, the grid of metal-oxide-semiconductor or IGBT, source electrode and drain electrode are respectively controlled end, input and the output of second switch pipe 601.In the present embodiment, as shown in Figure 4, second switch pipe 601 is specially PMOS pipe Q2.
In the present embodiment, the operation principle of the second voltage stabilizing current-sharing unit 600 is identical with the operation principle of the first voltage stabilizing current-sharing unit 200, wherein, and the first control signal Ctrl that the first switching tube 201 and second switch pipe 601 are exported according to the first controller 100
1with the second control signal Ctrl
2realize alternate conduction, i.e., when PMOS pipe Q1 conducting, PMOS pipe Q2 turn-offs; When PMOS pipe Q1 turn-offs, PMOS pipe Q2 conducting, so the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 form complementary voltage stabilizing current-sharing operating state, output voltage and output current to whole non-isolation voltage stabilizing flow equalizing circuit are controlled, to ensure the stable of output voltage and output current.
embodiment tri-:
On the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 1, the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides as shown in Figure 5, wherein, the first voltage stabilizing current-sharing unit 200 also has the first afterflow control end and the second afterflow control end, and the first afterflow control end of the first voltage stabilizing current-sharing unit 200 is also connected with the first controller 100 with the second afterflow control end.
Fig. 6 shows the exemplary circuit structure of the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides, and wherein, identical with shown in Fig. 2 of the internal structure of voltage sample unit 300 and current sampling unit 400, therefore repeats no more.
For the first voltage stabilizing current-sharing unit 200, as shown in Figure 6, it comprises the 3rd isolating transformer T3, the 3rd switching tube 203, the 4th isolating transformer T4, the 4th switching tube 204 and the 5th switching tube 205.
The first end 1 of the armature winding of the 3rd isolating transformer T3 is the direct current regulation and control end of the first voltage stabilizing current-sharing unit 200, the second end 2 of the armature winding of the 3rd isolating transformer T3 and the first controller 100 are connected to ground altogether, the first end 3 of the secondary winding of the 3rd isolating transformer T3 and the second end 4 are connected respectively controlled end and the input of the 3rd switching tube 203, the common contact of the input of the output of the 3rd switching tube 203 and the 4th switching tube 204 is the first input end of the first voltage stabilizing current-sharing unit 200, the common contact of the output of the input of the 3rd switching tube 203 and the 5th switching tube 205 is the second input of the first voltage stabilizing current-sharing unit 200, the first end 1 of the armature winding of the 4th isolating transformer T4 is the first afterflow control end of the first voltage stabilizing current-sharing unit 200, the second end 2 of the armature winding of the 4th isolating transformer T4 and the first controller 100 are connected to ground altogether, the first end 3 of the secondary winding of the 4th isolating transformer T4 and the second end 4 are connected respectively controlled end and the input of the 4th switching tube 204, the controlled end of the 5th switching tube 205 is the second afterflow control end of the first voltage stabilizing current-sharing unit 200, the input of the output of the 4th switching tube 204 and the 5th switching tube 205 is respectively output and the loop end of the first voltage stabilizing current-sharing unit 200.
Wherein, the semiconductor switch pipe that the 3rd switching tube 203, the 4th switching tube 204 and the 5th switching tube 205 are same type, this semiconductor switch pipe can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT or other possess switching characteristic, and in the time that this semiconductor switch pipe is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of semiconductor switch pipe.Especially, in the time that the 3rd switching tube 203 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 3rd switching tube 203; In like manner, in the time that the 4th switching tube 204 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 4th switching tube 204; In the time that the 5th switching tube 205 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 5th switching tube 205.In the present embodiment, as shown in Figure 6, the 3rd switching tube 203, the 4th switching tube 204 and the 5th switching tube 205 are specifically respectively PMOS pipe Q3, PMOS pipe Q4 and PMOS pipe Q5.
Below in conjunction with operation principle, the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 6 is described further:
The first inductance L 1 carries out exporting after energy storage to the first direct current Vin+, the afterflow control signal that the first controller 100 is exported is carried out isolation processing rear drive PMOS pipe Q4 conducting through the 4th isolating transformer T4, carry out exporting load 500 to after afterflow with the direct current that the first inductance L 1 is exported, and the afterflow control signal that the first controller 100 is exported drives PMOS pipe Q6 conducting to carry out exporting the second inductance L 2 to after afterflow with the loop current that load 500 is exported, the second inductance L 2 carries out exporting the second direct current Vin-after energy storage to this loop current, due to the symmetrical energy storage effect of the first inductance L 1 and the second inductance L 2, thereby the current value that makes the second direct current Vin-equals the current value of the first direct current Vin+.Simultaneously, the first resistance R 1 and the second resistance R 2 are carried out voltage sample to the direct current that exports load to, and voltage sampling signal is fed back to the first controller 100, the 3rd resistance R 3 is sampled to the loop current of load, and by differential amplifier U1, the sampled voltage at the 3rd resistance R 3 two ends is carried out exporting corresponding current sampling signal to the first controller 100 after differential amplification, the first controller 100 is according to voltage sampling signal V
swith current sampling signal I
sexport the first control signal Ctrl
1to the first isolating transformer T1, the first control signal Ctrl
1the on off operating mode of PMOS pipe Q3 is controlled PMOS pipe Q3 basis and the first control signal Ctrl after the first isolating transformer T1 carries out isolation processing
1corresponding duty ratio realizes make-break operation, and then realizes the adjustment to output voltage and output current, to ensure the stable of output voltage and output current.Concrete, in the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is greater than default current-sharing magnitude of voltage and/or above-mentioned loop current and is greater than default current-sharing current value, with the first control signal Ctrl
1corresponding duty ratio can reduce according to a certain change in duty cycle value, and PMOS pipe Q3 can make output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit also be reduced accordingly realizing in corresponding make-break operation process; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is less than default current-sharing magnitude of voltage and/or above-mentioned loop current and is less than default current-sharing current value, with the first control signal Ctrl
1corresponding duty ratio can increase according to a certain change in duty cycle value, and PMOS pipe Q3 can make output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit also be increased accordingly realizing in corresponding make-break operation process.
In the present embodiment, by adopting the 4th switching tube 204 and the 5th switching tube 205 to realize afterflow effect, can further reduce conduction loss, improve power supplying efficiency, make non-isolation voltage stabilizing flow equalizing circuit be applicable to the application scenarios that input current is larger.
embodiment tetra-:
On the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 5, as shown in Figure 7, it further comprises the 5th inductance L 5, the 6th inductance L 6 and the 3rd voltage stabilizing current-sharing unit 700 to the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides.
The first end of the first end of the 5th inductance L 5 and the 6th inductance L 6 is connected respectively the first end of the first inductance L 1 and the first end of the second inductance L 2, the second end of the 5th inductance L 5 and the second end of the 6th inductance L 6 are connected respectively first input end and second input of the 3rd voltage stabilizing current-sharing unit 700, the output that direct current regulation and control end, the first afterflow control end and the second afterflow control end of the 3rd voltage stabilizing current-sharing unit 700 all connects the first controller 100, the three voltage stabilizing current-sharing unit 700 and loop end are connected respectively output and the loop end of the first voltage stabilizing current-sharing unit 200.
Under the control of the first controller 100, the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 alternations; The 5th inductance L 5 carries out exporting the 5th direct current Vin+ after energy storage to the first direct current Vin+ " to the 3rd voltage stabilizing current-sharing unit 700; in the time working in the 3rd voltage stabilizing current-sharing unit 700; the 3rd voltage stabilizing current-sharing unit 700 is by the 5th direct current Vin+ " afterflow exports load 500 to, the loop current that load 500 is exported exports the 6th inductance L 6 to through the 3rd voltage stabilizing current-sharing unit 700 afterflows, the 6th inductance L 6 carries out exporting the 6th direct current Vin-after energy storage to above-mentioned loop current ", the 6th direct current Vin-" current value equal the 5th direct current Vin+ " current value; The first controller 100 is at output the first control signal Ctrl
1time export the 3rd control signal Ctrl
3; The current sampling signal that the voltage sampling signal that the first controller 100 is exported according to voltage sample unit 300 and current sampling unit 400 are exported is exported respectively the first control signal Ctrl
1with the 3rd control signal Ctrl
3to the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is greater than loop current that default current-sharing magnitude of voltage and/or load 500 export and is greater than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 are respectively according to the first control signal Ctrl
1with the 3rd control signal Ctrl
3alternation is to reduce output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit; In the time that the output voltage of non-isolation voltage stabilizing flow equalizing circuit is less than default current-sharing magnitude of voltage and/or above-mentioned loop current and is less than default current-sharing current value, the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 are respectively according to the first control signal Ctrl
1with the 3rd control signal Ctrl
3alternation is to increase output voltage and/or the output current of non-isolation voltage stabilizing flow equalizing circuit.
In the present embodiment, the mode that output voltage and output current are alternately adjusted in above-mentioned the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 contributes to non-isolation voltage stabilizing flow equalizing circuit can stably work in the situation that electric current input and bearing power demand are larger greatly.
Fig. 8 shows the exemplary circuit structure of the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides, and wherein, identical with shown in Fig. 6 of the internal structure of the first voltage regulation unit 200, voltage sample unit 300 and current sampling unit 400, therefore repeats no more.
For the 3rd voltage stabilizing current-sharing unit 700, it comprises the 5th isolating transformer T5, the 6th switching tube 701, the 6th isolating transformer T6, the 7th switching tube 702 and the 8th switching tube 703.
The first end 1 of the armature winding of the 5th isolating transformer T5 is the direct current regulation and control end of the 3rd voltage stabilizing current-sharing unit 700, the second end 2 of the armature winding of the 5th isolating transformer T5 and the first controller 100 are connected to ground altogether, the first end 3 of the secondary winding of the 5th isolating transformer T5 and the second end 4 are connected respectively controlled end and the input of the 6th switching tube 701, the common contact of the input of the output of the 6th switching tube 701 and the 7th switching tube 702 is the first input end of the 3rd voltage stabilizing current-sharing unit 700, the common contact of the output of the input of the 6th switching tube 701 and the 8th switching tube 703 is the second input of the 3rd voltage stabilizing current-sharing unit 700, the first end 1 of the armature winding of the 6th isolating transformer T6 is the first afterflow control end of the 3rd voltage stabilizing current-sharing unit 700, the second end 2 of the armature winding of the 6th isolating transformer T6 and the first controller 100 are connected to ground altogether, the first end 3 of the secondary winding of the 6th isolating transformer T6 and the second end 4 are connected respectively controlled end and the input of the 7th switching tube 702, the controlled end of the 8th switching tube 703 is the second afterflow control end of the 3rd voltage stabilizing current-sharing unit 700, the input of the output of the 7th switching tube 702 and the 8th switching tube 703 is respectively output and the loop end of the 3rd voltage stabilizing current-sharing unit 700.
Wherein, the semiconductor switch pipe that the 3rd switching tube 203, the 4th switching tube 204, the 5th switching tube 205, the 6th switching tube 701, the 7th switching tube 702 and the 8th switching tube 703 are same type, this semiconductor switch pipe can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT or other possess switching characteristic, and in the time that this semiconductor switch pipe is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of semiconductor switch pipe.Due to identical with described in third embodiment of the invention of the 3rd switching tube 203, the 4th switching tube 204 and the 5th switching tube 205, do not repeat them here.And for the 6th switching tube 701, the 7th switching tube 702 and the 8th switching tube 703, in the time that the 6th switching tube 701 is metal-oxide-semiconductor or IGBT, the grid of metal-oxide-semiconductor or IGBT, source electrode and drain electrode are respectively controlled end, input and the output of the 6th switching tube 701; In like manner, in the time that the 7th switching tube 702 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 7th switching tube 702; In the time that the 8th switching tube 703 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 8th switching tube 703.In the present embodiment, as shown in Figure 8, the 6th switching tube 701, the 7th switching tube 702 and the 8th switching tube 703 are specifically respectively PMOS pipe Q6, PMOS pipe Q7 and PMOS pipe Q8.
In the present embodiment, the operation principle of the 3rd voltage stabilizing current-sharing unit 700 is identical with the operation principle of the first voltage stabilizing current-sharing unit 200, wherein, and the first control signal Ctrl that the 3rd switching tube 203 and the 6th switching tube 701 are exported according to the first controller 100
1with the 3rd control signal Ctrl
3realize alternate conduction, i.e., when PMOS pipe Q3 conducting, PMOS pipe Q6 turn-offs; When PMOS pipe Q3 turn-offs, PMOS pipe Q6 conducting, so the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 form complementary voltage stabilizing current-sharing operating state, output voltage and output current to whole non-isolation voltage stabilizing flow equalizing circuit are controlled, to ensure the stable of output voltage and output current.
In addition, the present embodiment, by adopting the 4th switching tube 204, the 5th switching tube 205, the 7th switching tube 702 and the 8th switching tube 703 to realize afterflow effect, can further reduce conduction loss, and then improves power supplying efficiency.
embodiment five:
The non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides is respectively as Fig. 9, Figure 10, shown in Figure 11 and Figure 12, Fig. 9, Figure 10, non-isolation voltage stabilizing flow equalizing circuit shown in Figure 11 and Figure 12 is respectively at Fig. 1, Fig. 3, on the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 5 and Fig. 7, further comprise what pressure unit 800 formed, the input of pressure unit 800 is connected respectively first output of voltage stabilizing current-sharing unit 200 and the first sampling end of current sampling unit 400 with loop end, the direct current that pressure unit 800 is inputted its input carries out step-down processing and exports by its output.
As shown in figure 13, pressure unit 800 comprises the 9th switching tube 801, the 7th inductance L 7, the first diode D11, the first capacitor C 11 and second controller 802.
The input of the 9th switching tube 801 is the input of pressure unit 800, the negative electrode of the output of the 9th switching tube 801 and the first diode D11 is connected to the first end of the 7th inductance L 7 altogether, the common contact of the second end of the 7th inductance L 7 and the first end of the first capacitor C 11 is the output of pressure unit 800, the common contact of the second end of the anode of the first diode D11 and the first capacitor C 11 is the loop end of pressure unit 800, and the controlled end of the 9th switching tube 801 connects second controller 802.
Above-mentioned the 9th switching tube 801, the 7th inductance L 7, the first diode D11 and the first capacitor C 11 form a buck buck circuit, the direct current that this buck buck circuit is inputted the input of the 9th switching tube 801 carries out exporting load to after step-down processing, step-down ratio is determined by second controller 802, second controller 802 is exported control signal and is driven the 9th switching tube 801 to realize make-break operation according to corresponding duty ratio, so the duty cycle of switching of the 9th switching tube 801 has determined the step-down ratio of this buck buck circuit.
Wherein, the 9th switching tube 801 can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT or other possess switching characteristic.In the time that the 9th switching tube 801 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the 9th switching tube 801.Second controller 802 can be single-chip microcomputer or pulse width modulator.
In sum, the present embodiment by adding above-mentioned pressure unit 800 in non-isolation voltage stabilizing flow equalizing circuit, can the in the situation that of high input voltage, realize step-down and process to export the direct current that meets loaded work piece voltage range, so the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides can be applicable to the application scenarios of low input (as 48V low pressure) and high input voltage (as 400V high pressure) simultaneously.
embodiment six:
On the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 9, Figure 10, Figure 11 and Figure 12, the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides is respectively as shown in Figure 14, Figure 15, Figure 16 and Figure 17, pressure unit 800 also has step-down control end, and the step-down control end of pressure unit 800 is connected with the first controller 100.
As shown in figure 18, pressure unit 800 comprises the tenth switching tube 803, the 8th inductance L 8, the second diode D12 and the second capacitor C 12.
The input of the tenth switching tube 803 is the input of pressure unit 800, the negative electrode of the output of the tenth switching tube 803 and the second diode D12 is connected to the first end of the 8th inductance L 8 altogether, the common contact of the second end of the 8th inductance L 8 and the first end of the second capacitor C 12 is the output of pressure unit 800, the common contact of the second end of the anode of the second diode D12 and the second capacitor C 12 is the loop end of pressure unit 800, and the controlled end of the tenth switching tube 803 is the step-down control end of pressure unit 800.
Above-mentioned the tenth switching tube 803, the 8th inductance L 8, the second diode D12 and the second capacitor C 12 form a buck buck circuit, the direct current that this buck buck circuit is inputted the input of the tenth switching tube 803 carries out exporting load to after step-down processing, step-down ratio is determined by the first controller 100, the first controller 100 is exported control signal and is driven the tenth switching tube 803 to realize make-break operation according to corresponding duty ratio, so the duty cycle of switching of the tenth switching tube 803 has determined the step-down ratio of this buck buck circuit.
Wherein, the tenth switching tube 803 can be the semiconductor device that metal-oxide-semiconductor (comprising that NMOS pipe and PMOS manage), IGBT or other possess switching characteristic.In the time that the tenth switching tube 803 is metal-oxide-semiconductor or IGBT, grid, source electrode and the drain electrode of metal-oxide-semiconductor or IGBT is respectively controlled end, input and the output of the tenth switching tube 803.
In sum, the present embodiment by adding above-mentioned pressure unit 800 in non-isolation voltage stabilizing flow equalizing circuit, can the in the situation that of high input voltage, realize step-down and process to export the direct current that meets loaded work piece voltage range, so the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides can be applicable to the application scenarios of low input (as 48V low pressure) and high input voltage (as 400V high pressure) simultaneously.
embodiment seven:
On the basis of the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 1, Fig. 3, Fig. 5, Fig. 7, Fig. 9, Figure 10, Figure 11, Figure 12, Figure 14, Figure 15, Figure 16 and Figure 17, the non-isolation voltage stabilizing flow equalizing circuit that the present embodiment provides also comprises filter capacitor C1.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 1, as shown in figure 19, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 3, as shown in figure 20, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 5, as shown in figure 21, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 7, as shown in figure 22, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Fig. 9, as shown in figure 23, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 10, as shown in figure 24, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 11, as shown in figure 25, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 12, as shown in figure 26, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 14, as shown in figure 27, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 15, as shown in figure 28, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the second voltage stabilizing current-sharing unit 600 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 16, as shown in figure 29, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 carries out filtering processing.
Based on the non-isolation voltage stabilizing flow equalizing circuit shown in Figure 17, as shown in figure 30, filter capacitor C1 is connected between the output and loop end of the first voltage stabilizing current-sharing unit 200, and the direct current that filter capacitor C1 exports the first voltage stabilizing current-sharing unit 200 and the 3rd voltage stabilizing current-sharing unit 700 carries out filtering processing.In sum, the non-isolation voltage stabilizing flow equalizing circuit that the embodiment of the present invention provides can keep stable output voltage and output current in the situation that not inputted pressure differential limits, has improved power supplying efficiency.
It comprises existing multiple power circuit, shunt current circuit and multiple electric current flow equalizing circuit, electric current flow equalizing circuit is shunted and exported to shunt current circuit to the output current of power circuit, the electric current in electric current flow equalizing circuit closes any two-way electric current that road module exports shunt current circuit collaborate to process after output the first direct current Vin+.Above-mentioned electric power system also comprises the non-isolation voltage stabilizing flow equalizing circuit as shown in Fig. 1 to Figure 30, and the first inductance L 1 in non-isolation voltage stabilizing flow equalizing circuit is closed road module from above-mentioned electric current and accessed the first direct current Vin+.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.