CN104184196A - Intelligent-control multifunctional multi-type energy-storage-battery quick charging system - Google Patents
Intelligent-control multifunctional multi-type energy-storage-battery quick charging system Download PDFInfo
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- CN104184196A CN104184196A CN201410459685.6A CN201410459685A CN104184196A CN 104184196 A CN104184196 A CN 104184196A CN 201410459685 A CN201410459685 A CN 201410459685A CN 104184196 A CN104184196 A CN 104184196A
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Abstract
The invention relates to an intelligent-control multifunctional multi-type energy-storage-battery quick charging system. The system is composed of a main circuit and subcircuits. The main circuit comprises a single chip microcomputer, a voltage input circuit, a power source circuit, an oscillating circuit, a keyboard input and display alarm circuit, a signal collection processing circuit and a signal output circuit, wherein the power source circuit is further connected with the subcircuits. Compared with the prior art, the system has the advantages that the functions of leakage detection, heat management, battery equalization management, alarm reminding, surplus capacity calculation, discharger power, SOC, SOH and DOD state reporting are achieved for batteries; the system has the functions of overvoltage protection, battery heat management and the like; corresponding charging methods are designed for different types of energy storage batteries, so that all types of the energy storage batteries can be charged under the optimal charging methods; the function of controlling the maximum output power and other functions can further be achieved for electric cars and the system further has the advantages of being simple in device, small in size, light in weight, quick in reaction speed, low in cost, long in service life and the like.
Description
Technical field
The present invention relates to energy-storage battery and control and quick charge technical field, relate in particular to a kind of intelligent control system that polytype energy-storage battery is realized to several functions charging.
Background technology
Energy-storage battery provides power for electri forklift, electric automobile, and energy-storage battery charge and discharge performance directly affects its use and life-span.Energy-storage battery is generally divided into lead-acid battery, nickel-cadmium cell, Ni-MH battery and lithium ion battery and ferric phosphate lithium cell etc.Because energy-storage battery is of a great variety and capacity differs, and the batteries such as lithium ion battery, LiFePO4 can't adopt single battery and use by battery pack form.Therefore, the energy-storage battery of variety classes and capacity often needs different charging adaptations.
In the use procedure of energy-storage battery, it is the most influentially exactly the overcharging and overdischarge of battery, once overcharge, overdischarge, battery will damage, volume lowering, and the life-span reduces, and in serious situation, also explosion and catching fire can occur.Lithium battery monomer capacity is excessive, easily produces high temperature, brings out unsafe factor, so high capacity cell must form battery pack by series-parallel mode.Because battery pack is comprised of cell, and the state inconsistency of cell itself and the nuance of environment for use, all can cause the difference of battery life, greatly affect life-span and the performance of whole battery pack.Battery in groups rear main problem has the following aspects: 1) overcharge or cross and put.During batteries charging/the electric discharge of series connection, part battery may be full of/discharge prior to other batteries, continues charge/discharge and will cause to overcharge/cross and puts, and the inside side reaction of lithium battery will cause the problems such as battery capacity decline, thermal runaway or internal short-circuit.2) super-high-current.The situations such as in parallel, aging, low temperature all can cause the electric current of part battery to surpass the useful life that its ability to bear reduces battery.3) excess Temperature.The too high meeting of local temperature declines the properties of battery, finally causes internal short-circuit and thermal runaway to produce safety problem.4) short circuit or electric leakage.Because the factors such as vibrations, damp and hot, dust cause battery short circuit or electric leakage, threaten driver and crew's personal safety.
The critical functions such as the electronic unit of BMS (battery management system) conduct monitoring in real time, automatic equalization, intelligent recharge and discharge plays and ensures safety, life-saving, estimation dump energy are indispensable vitals in power and energy-storage battery group.BMS function needs the operating state of dynamic monitoring power battery pack, the terminal voltage of every battery of Real-time Collection and temperature, charging and discharging currents and power brick total voltage, estimate the state-of-charge (state of charge SOC) of each battery, safe condition (state of health SOH) and electrochemical state (state of electroformation SOE), then by controlling other devices, prevent that battery from overcharging or overdischarge phenomenon, can provide in time battery condition simultaneously, and pick out problematic battery, keep whole Battery pack reliability of operation and high efficiency.
Summary of the invention
The invention provides and a kind ofly by High Density Integration single-chip microcomputer 8XC196KC20, controlled, be not only applicable to the very wide single supply of supply voltage scope, be also applicable to duplicate supply mode of operation, can be the multifunctional safe quick charging system of all kinds of energy-storage batteries chargings.
In order to achieve the above object, the present invention realizes by the following technical solutions:
A kind of Based Intelligent Control is multi-functional, polymorphic type energy-storage battery quick charging system, by main circuit and parallel circuit, formed, main circuit comprises single-chip microcomputer, voltage input circuit, power circuit, oscillating circuit, keyboard input and Display and Alarm Circuit, signal acquisition processing circuit and signal output apparatus, and power circuit connects parallel circuit in addition;
Single-chip microcomputer model is 8XC196KC20, and its 1st pin (Vcc) connects 2 pin of the 43rd resistance R 43 after being connected with the 37th pin (Vpp), the 64th pin (Busw) and the 2nd pin (EA); After 1 pin of the 4th pin (P0.3) connection the 43rd resistance R 43, connect PO3 end; The 5th pin (P0.1) connects AC1 end; The 6th pin (P0.0) connection 1 pin of the 8th capacitor C 8,2 pin of 1 pin of the 16th electric capacity E16, the 1st resistance R 1 are, connect AC0 end after 1 pin of 2 pin of the 3rd diode, the 5th adjustable potentiometer P5 and 2 pin (sliding contact) connection; The 7th pin (P0.2) connects AC7 end after being connected with 1 pin of the 9th capacitor C 9,1 pin of the 6th electric capacity E6; The 9th pin (P0.7) connects BUSY end; The 13rd pin (VREF) connects 1 pin of the 26th resistance R 26; The 16th pin (RESET) connects the 1st pin of 2 pin of the 25th resistance R 25,1 pin of the 15th electric capacity E15 and power management chip U10; The 19th pin (P1.0) connects the 2nd pin (1A1) of button control chip U8; The 20th pin (P1.1) connects the 4th pin (1A2) of button control chip U8; The 21st pin (P1.2) connects the 6th pin (1A3) of button control chip U8; The 22nd pin (P1.3) connects the 8th pin (1A4) of button control chip U8; The 24th pin (HSI.0) connects 2 pin of the 28th resistance R 28; The 25th pin (HSI.1) connects 2 pin of the 45th resistance R 45; The 28th pin (HSO.0) connects the 1st pin (1A) and the 2nd pin (1B) of signal acquisition process chip U13; The 30th pin (P1.5) connects the 13rd pin (2A2) of button control chip U8; The 31st pin (P1.6) connects the 15th pin (2A3) of button control chip U8; The 32nd pin (P1.7) connects the 17th pin (2A4) of button control chip U8; ((HSO.3) connects the 11st pin ((2A1) of button control chip U8 to the 35th pin; The 38th pin (P2.7) connects BUSY end; The 40th pin (WRL/WR) connects WR end; After the 42nd pin (P2.4) connection 1 pin of the 38th resistance R 38 and the 1st pin of binding post J6, connect the P24 end of binding post J6; The 43rd pin (READY) connects 1 pin of the 53rd resistance R 53; After the 11st 1 pin of pin (P0.4) connection R41 resistance R 41 and the 5th pin of binding post J6, connect the PO4 end of binding post J6; After the 10th pin (P0.5) connection 1 pin of the 40th resistance R 40 and the 4th pin of binding post J6, connect the PO5 end of binding post J6; After the 8th pin (P0.6) connection 1 pin of the 42nd resistance R 42 and the 3rd pin of binding post J6, connect the PO6 end of binding post J6; After the 2nd pin of the 44th pin (P2.3) connection the 39th resistance R 39 and binding post J6, connect the P23 end of binding post J6; The 45th pin (AD15/P4.7) connects AD15 end; The 46th pin (AD14/P4.6) connects AD14 end; The 47th pin (AD13/P4.5) connects AD13 end; The 48th pin (AD12/P4.4) connects AD12 end; The 49th pin (AD11/P4.3) connects AD11 end; The 50th pin (AD10/P4.2) connects AD10 end; The 51st pin (AD9/P4.1) connects AD9 end; The 52nd pin (AD8/P4.0) connects AD8 end; The 53rd pin (AD7/P3.7) connects AD7 end; The 54th pin (AD6/P3.6) connects AD6 end; The 55th pin (AD5/P3.5) connects AD5 end; The 56th pin (AD4/P3.4) connects AD4 end; The 57th pin (AD3/P3.3) connects AD3 end; The 58th pin (AD2/P3.2) connects AD2 end; The 59th pin (AD1/P3.1) connects AD1 end; The 60th pin (AD0/P3.0) connects AD0 end; The 61st pin (RD) connects RD end; The 62nd pin (ALE) connects ALE end; The 66th pin connects one end, 2 pin of the 30th resistance R 30 and 2 pin of the 12nd capacitor C 12 of crystal oscillator XTAL1; The 67th pin connects shake 1 pin of the other end of device XTAL1,1 pin of the 30th resistance R 30 and the 13rd capacitor C 13 of crystal; The 12nd pin (ANGND) of single-chip microcomputer, the 14th pin (VSS), the 15th pin (P2.2), the 36th pin (GND), the 3rd pin (NMI), the 68th pin (Vss) ground connection; The 17th pin (P2.1) of single-chip microcomputer, the 18th pin (P2.0), the 23rd pin (P1.4/PWM2), the 26th pin (HSO.4), the 27th pin (HSO.5), the 29th pin (HSO.1), the 33rd pin (P2.6), the 34th pin (HSO.2), the 39th pin (P2.5), the 41st pin (WRH/BHE), the 63rd pin (INST) and the 65th pin (CLKOUT) are unsettled;
Voltage input circuit comprises diode Z3 and Z2, adjustable potentiometer P5, resistance R 1, R26, R27 and R29, capacitor C 7, C8, C9, E6, E13 and E16, and the model of diode Z2 is TL431, the model of diode Z3 is 1N5994A; Capacitor C 7, C8, C9 are electrochemical capacitors, and electric capacity E6, E13 and E16 are ceramic disc capacitors; Ground connection after 3 pin of 1 pin (anode) the connection adjustable potentiometer P5 of described the 3rd diode Z3, connects AC0 end after 1 pin of 2 pin (negative electrode) connection the 5th adjustable potentiometer P5 of the 3rd diode Z3 and 2 pin (sliding contact), 2 pin of the 1st resistance R 1,1 pin of 1 pin of the 16th electric capacity E16, the 8th capacitor C 8 and the 6th pin of single-chip microcomputer; After 1 pin of 1 pin of the 6th electric capacity E6, the 9th capacitor C 9 and 7 pins of single-chip microcomputer, connect AC0 end; Ground connection after 2 pin of 2 pin of 2 pin of 2 pin of the 16th electric capacity E16, the 8th capacitor C 8, the 6th electric capacity E6, the 9th capacitor C 9 connect; 1 pin of the 1st resistance R 1 connects ZD-end; 1 pin of the 2nd diode Z2 connects 1 pin of the 7th capacitor C 7, connect 2 pin of the 29th resistance R 29 after 1 pin of the 13rd electric capacity E13; 2 pin of the 2nd diode Z2 connect 2 pin of the 26th resistance R 26 and 1 pin of the 27th resistance R 27; 3 pin of the 2nd diode connect 2 ends of 2 pin, the 7th capacitor C 7 and the 27th resistance R 27 of the 13rd electric capacity E13; 2 pin of the 2nd diode 2 connect 1 pin of the 27th resistance and 2 pin of the 26th resistance R 26; 1 pin of the 26th resistance R 26 connects the 13rd pin of single-chip microcomputer;
Power circuit comprises power management chip U10, resistance R 25 and electric capacity E15, and E15 is ceramic disc capacitor; The model of power management chip U10 is MC34064, and its 1st pin (RESET) connects the 16th pin of 2 pin of the 25th resistance, 1 pin of the 15th electric capacity E15 and single-chip microcomputer; The 2nd pin (IN) connects 1 pin and supply voltage+5V end of the 25th resistance R 25; Ground connection after 2 pin of the 3rd pin (GND) connection the 15th electric capacity E15;
Oscillating circuit comprises crystal oscillator XTAL1, resistance R 30 and capacitor C 12, C13, and capacitor C 12, C13 are electrochemical capacitors; One end of crystal oscillator XTAL1 connects 1 pin of the 67th pin of single-chip microcomputer, 1 pin of the 30th resistance R 30 and the 13rd capacitor C 13, the other end connects 2 pin of the 66th pin of single-chip microcomputer, 2 pin of the 30th resistance R 30 and the 12nd capacitor C 12, and 1 pin of the 12nd capacitor C 12 connects 2 pin of the 13rd capacitor C 13;
Keyboard input and Display and Alarm Circuit comprise button control chip U8, triode P8, resistance R 28, R44, R45 and R49, capacitor C 11 and E8 and loud speaker B4, the model of button control chip U8 is 74HC244, the model of triode P8 is 2SA1013, capacitor C 11 is electrochemical capacitor, and electric capacity E8 is ceramic disc capacitor; The 2nd pin (1A1) of button control chip U8 connects the 19th pin of single-chip microcomputer; The 3rd pin (2Y4) connects LCMCS2 end; The 4th pin (1A2) connects the 20th pin of single-chip microcomputer; The 5th pin (2Y3) connects LCMRS end; The 6th pin (1A3) connects the 21st pin of single-chip microcomputer; The 7th pin (2Y2) connects LREST end; The 8th pin (1A4) connects the 22nd pin of single-chip microcomputer; The 9th pin (2Y1) connects 2 pin of the 49th resistance R 49; The 1st pin (1G) connects the 10th pin (GND) and the rear ground connection of the 19th pin (2G); The 11st pin (2A1) connects the 35th pin of single-chip microcomputer; The 12nd pin (1Y4) connects CDDLLB end; The 13rd pin (2A2) connects the 30th pin of single-chip microcomputer; The 14th pin (1Y3) connects FDKE end; The 15th pin (2A3) connects the 31st pin of single-chip microcomputer; The 16th pin (1Y2) connects MCFD end; The 17th pin (2A4) connects the 32nd pin of single-chip microcomputer; Connection layout image-position sensor MCCD end after the 5th, the 6th pin of the 18th pin (1Y1) connection signal acquisition process chip U13; The 20th pin (VCC) connection+5V power supply; The model of triode P8 is 2SA1013; 1 pin of the 49th resistance R 49 connects 1 pin of the 44th resistance R 44 and the base stage of triode P8; Connect+5V power supply after 1 pin of the emitter of 2 pin connecting triode P8 of the 44th resistance R 44,1 pin of the 11st capacitor C 11 and the 8th electric capacity E8; The collector electrode of triode P8 connects one end of loud speaker B4, ground connection after other end connection 2 pin of the 11st capacitor C 11 of loud speaker B4 and 2 pin of the 8th electric capacity E8;
Signal acquisition processing circuit comprises signal acquisition process chip U13, U14, photoelectricity spacer G5 and resistance R 47, the model of photoelectricity spacer G5 is PC817C, the model of signal acquisition process chip U13 is 74HC21, and the model of signal acquisition process chip U14 is 74HC138; After the 1st pin (1A) connection the 2nd pin (1B) of signal acquisition process chip U13, connect the 28th pin of single-chip microcomputer; Map interlinking image-position sensor MCCD end after the 18th pin of the 4th pin (1C) connection the 5th pin (1D), button control chip U8; After 1 pin of the 6th pin (1Y) connection the 47th resistance R 47, connect KGDYKZ end; The 8th pin (2Y) connects CN end; The 9th pin (2A) connects the 7th pin (Y7) of signal acquisition process chip U14; The 10th pin (2B) connects the 9th pin (Y6) of U14; The 12nd pin (2C) connects the 10th pin (Y5) of U14; The 13rd pin (2D) connects the 11st pin (Y4) of U14; Connect+5V power supply after the 0th pin (E1) of the 14th pin (Vcc) connection U14 and the 16th pin (Vcc); The 1st pin (A0) of signal acquisition process chip U14 connects AD13 end; The 2nd pin (A1) connects AD14 end; The 3rd pin (A2) connects AD15 end; The 12nd pin (Y3) connects LCMCN end; The 4th pin (F1) connects the rear ground connection of the 7th pin (GND) of the 5th pin (F2), the 6th pin (GND) and U13; The 3rd pin (NC) of signal acquisition process chip U13, the 13rd pin (Y2) of signal acquisition process chip U14, the 14th pin (Y1) and the 15th pin (Y0) are unsettled; 2 pin of the 47th resistance R 47 connect 2 pin of the 5th photoelectricity spacer G5; Connect+5 power supplys of 1 pin of the 5th photoelectricity spacer G5; 3 pin connect CDK1 end; Connect+5A of 4 pin power supply;
Signal output apparatus comprises binding post J6, resistance R 38～R42, and the 3rd pin of binding post J6 connects the 8th pin of single-chip microcomputer, connect PO6 end after 1 pin of the 42nd resistance R 42; The 5th pin connects the 11st pin of single-chip microcomputer, connect PO4 end after 1 pin of the 41st resistance R 41; The 1st pin connects the 42nd pin of single-chip microcomputer, connect P24 end after 1 pin of the 38th resistance R 38; The 6th pin connects PO3 end; The 4th pin connects the 10th pin of single-chip microcomputer, connect PO5 end after 1 pin of the 40th resistance R 40; After 1 pin of the 2nd pin connection single-chip microcomputer the 44th pin, the 39th resistance R 39, connect P23 end; Ground connection after the 9th pin, the 10th pin connect; The 7th pin, the 8th pin are unsettled; Connect+5V power supply after 2 pin connection 2 pin of the 41st resistance R 41,2 pin of 2 pin of the 40th resistance R 40, the 42nd resistance R 42 and 2 pin of the 39th resistance R 39 of the 38th resistance R 38;
Parallel circuit comprises photoelectricity isolation drive chip U9, operational amplifier U1 and U4, photoelectricity spacer G1, G2 and G6, triode N1, diode Z4, adjustable potentiometer P1 and P6, resistance R 2, R4, R5, R19, R31～R34, R36, R46, R48, R59 and R60, electric capacity E5, E17, E21, C4 and C19; The model of photoelectricity isolation drive chip U9 is MCI4066, and the model of photoelectricity spacer is PC817C, and the model of operational amplifier is LM358, the model of diode is TL431, the model of triode is 2N5551, and electric capacity E5, E17, E21 are ceramic disc capacitors, and capacitor C 4 and C19 are electrochemical capacitors; The 3rd pin (Out2) of described photoelectricity isolation drive chip U9 connects CDK3 end after connecting the 2nd pin (Out1), the 10th pin (Out4) and the 8th pin (IN3); After 1 pin of the 1st pin (IN3) connection the 4th pin (IN2), the 9th pin (Out3), the 11st pin (IN4) and the 34th resistance R 34, connect CDK2 end; After 2 pin of the 6th pin (Ctrl3) connection the 5th pin (Ctrl2), the 13rd pin (Ctrl1), the 12nd pin (Ctrl4) and the 46th resistance R 46, connect CDK1 end; The 14th connect+5A of pin (VCC) power supply; The 7th pin (GND) ground connection; 2 pin of the 34th resistance R 34 connect 1 pin of the 4th operational amplifier U4; After 4 pin of 1 pin connection the 4th operational amplifier U4 of the 46th resistance R 46, connect ZD-end; Connect+5V of the 8 pin power supply of the 4th operational amplifier U4; 2 pin of U4 connect 7 pin, 2 pin of the 60th resistance R 60, connect CDDLFD end after 6 pin of operational amplifier U1; 3 pin of U4 connect 2 pin of the 59th resistance R 59,1 pin of the 6th adjustable potentiometer P6 and 2 pin (sliding contact); After 1 pin of 5 pin connection the 32nd resistance R 32 of U4, connect CE end; 6 pin of U4 connect 1 pin of the 60th resistance R 60 and 2 pin of the 33rd resistance R 33; After being connected, 1 pin of 2 pin of the 32nd resistance R 32 and the 33rd resistance R 33 connects ZD-end; 1 pin of 3 pin connection the 4th diode Z4 of the 6th adjustable potentiometer P6 and 2 pin, 1 pin of the 19th capacitor C 19 are, 2 pin of 1 pin of the 21st electric capacity E21 and the 31st resistance R 31; Connect+5 power supplys of 1 pin of the 31st resistance R 31; Ground connection after 2 pin of 1 pin connection 3 pin of the 4th diode Z4,2 pin of the 19th capacitor C 19 and the 21st electric capacity E21 of the 59th resistance R 59; 1 pin of the 1st operational amplifier U1 connects 2 pin of 2 pin and the 48th resistance R 48; 3 pin of U1 connect 1 pin of the 17th electric capacity E17, connect CDK3 end after 2 pin of the 36th resistance; 4 pin of U1 connect 3 pin of the 1st adjustable potentiometer P1, connect ZD-end after 1 pin of 2 pin of the 17th electric capacity E17, the 36th resistance R 36; 5 pin of U1 connect 2 pin (sliding contact) of the 1st adjustable potentiometer P1; 7 pin of U1 connect 1 pin of the 2nd resistance R 2; Connect+5A of the 1 pin power supply of the 1st adjustable potentiometer P1; 1 pin of the 48th resistance R 48 connects 1 pin of the 6th photoelectricity spacer G6; 2 pin of G6 connect ZD-end; 3 pin of G6 connect DYKE-end; 4 pin of G6 connect DYKE+ end; 2 pin of the 2nd resistance R 2 connect 1 pin of the 5th electric capacity E5 and 4 pin of the 1st photoelectricity spacer G1; 2 pin of the 5th electric capacity E5 connect ZD-end; 3 pin of the 1st photoelectricity spacer G1 connect CB end; Connect+5V power supply after 1 pin connection the 2nd 1 pin of photoelectricity spacer G2 of G1 and 4 pin of G2; 2 pin of G1 connect king's 3 pin and 2 pin of the 19th resistance R 19; 1 pin of the 19th resistance R 19 connects MCCD end; 2 pin of the 2nd photoisolator G2 connect 2 pin of the 4th resistance R 4; 1 pin of the 4th resistance R 4 connects 3 pin (collector electrode) of the 1st triode N1; 1 pin 9 (base stage) of the 1st triode N1 connects 1 pin of the 5th resistance R 5; After 2 pin of 2 pin connection the 4th capacitor C 4 of the 5th resistance R 5, connect FB end; The 4th capacitor C 4R 1 pin connects the rear ground connection of 2 pin (emitter) of the 1st triode N1.
Compared with prior art, the invention has the beneficial effects as follows:
1) the present invention has battery is carried out to detection of electrical leakage, heat management, battery balanced management, warning reminding, calculating residual capacity, discharge power, report SOC, SOH, DOD situation display tube reason function.
2) the present invention has over-voltage protecting function (OV), battery thermal management function, battery balanced management function, battery status indication and warning function, communication function, the self check of BMS plate and daily record, battery charge state, battery pack/battery core health status demonstration Function of Evaluation;
3) the present invention has designed corresponding charging method by software for dissimilar energy-storage battery, and every kind of energy-storage battery can be charged under optimal charge method; For the energy-storage battery of different capabilities, when choosing charging method, as long as set charge parameter, can be energy-storage battery charging fast and stable;
4) the present invention also can be according to the electric current and voltage of battery and temperature for electric motor car, with algorithm, control peak power output to obtain maximum range, and with algorithm, control charger and carry out the charging of optimum current, also can carry out real-time communication by CAN bus interface and vehicle-mounted master controller, electric machine controller, energy management system, in-vehicle display system etc.;
5) the present invention have that equipment is simple, the advantage such as volume little lightweight, reaction speed fast, use flexibly, reliability is high, cost is low, long service life, the applicable direct voltage of exporting is steady, ripple is little, charging process control precision is high, can be all kinds of charge in batteries fast and stable, and after holding energy-storage battery to be full of electricity, stop in time charging, there is practical application promotional value.
Accompanying drawing explanation
Fig. 1 is system configuration schematic diagram of the present invention.
Fig. 2 is main circuit diagram of the present invention.
Fig. 3 is parallel circuit figure of the present invention.
Fig. 4 is charging procedure flow chart of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described further:
Seeing Fig. 1, is system configuration schematic diagram of the present invention; Seeing Fig. 2-Fig. 3, is main circuit diagram and the parallel circuit figure of an invention.A kind of Based Intelligent Control of the present invention is multi-functional, polymorphic type energy-storage battery quick charging system, by main circuit and parallel circuit, formed, main circuit comprises single-chip microcomputer, voltage input circuit, power circuit, oscillating circuit, keyboard input and Display and Alarm Circuit, signal acquisition processing circuit and signal output apparatus, and power circuit connects parallel circuit in addition;
Single-chip microcomputer model is 8XC196KC20, and its 1st pin (Vcc) connects 2 pin of the 43rd resistance R 43 after being connected with the 37th pin (Vpp), the 64th pin (Busw) and the 2nd pin (EA); After 1 pin of the 4th pin (P0.3) connection the 43rd resistance R 43, connect PO3 end; The 5th pin (P0.1) connects AC1 end; The 6th pin (P0.0) connection 1 pin of the 8th capacitor C 8,2 pin of 1 pin of the 16th electric capacity E16, the 1st resistance R 1 are, connect AC0 end after 1 pin of 2 pin of the 3rd diode, the 5th adjustable potentiometer P5 and 2 pin (sliding contact) connection; The 7th pin (P0.2) connects AC7 end after being connected with 1 pin of the 9th capacitor C 9,1 pin of the 6th electric capacity E6; The 9th pin (P0.7) connects BUSY end; The 13rd pin (VREF) connects 1 pin of the 26th resistance R 26; The 16th pin (RESET) connects the 1st pin of 2 pin of the 25th resistance R 25,1 pin of the 15th electric capacity E15 and power management chip U10; The 19th pin (P1.0) connects the 2nd pin (1A1) of button control chip U8; The 20th pin (P1.1) connects the 4th pin (1A2) of button control chip U8; The 21st pin (P1.2) connects the 6th pin (1A3) of button control chip U8; The 22nd pin (P1.3) connects the 8th pin (1A4) of button control chip U8; The 24th pin (HSI.0) connects 2 pin of the 28th resistance R 28; The 25th pin (HSI.1) connects 2 pin of the 45th resistance R 45; The 28th pin (HSO.0) connects the 1st pin (1A) and the 2nd pin (1B) of signal acquisition process chip U13; The 30th pin (P1.5) connects the 13rd pin (2A2) of button control chip U8; The 31st pin (P1.6) connects the 15th pin (2A3) of button control chip U8; The 32nd pin (P1.7) connects the 17th pin (2A4) of button control chip U8; ((HSO.3) connects the 11st pin ((2A1) of button control chip U8 to the 35th pin; The 38th pin (P2.7) connects BUSY end; The 40th pin (WRL/WR) connects WR end; After the 42nd pin (P2.4) connection 1 pin of the 38th resistance R 38 and the 1st pin of binding post J6, connect the P24 end of binding post J6; The 43rd pin (READY) connects 1 pin of the 53rd resistance R 53; After the 11st 1 pin of pin (P0.4) connection R41 resistance R 41 and the 5th pin of binding post J6, connect the PO4 end of binding post J6; After the 10th pin (P0.5) connection 1 pin of the 40th resistance R 40 and the 4th pin of binding post J6, connect the PO5 end of binding post J6; After the 8th pin (P0.6) connection 1 pin of the 42nd resistance R 42 and the 3rd pin of binding post J6, connect the PO6 end of binding post J6; After the 2nd pin of the 44th pin (P2.3) connection the 39th resistance R 39 and binding post J6, connect the P23 end of binding post J6; The 45th pin (AD15/P4.7) connects AD15 end; The 46th pin (AD14/P4.6) connects AD14 end; The 47th pin (AD13/P4.5) connects AD13 end; The 48th pin (AD12/P4.4) connects AD12 end; The 49th pin (AD11/P4.3) connects AD11 end; The 50th pin (AD10/P4.2) connects AD10 end; The 51st pin (AD9/P4.1) connects AD9 end; The 52nd pin (AD8/P4.0) connects AD8 end; The 53rd pin (AD7/P3.7) connects AD7 end; The 54th pin (AD6/P3.6) connects AD6 end; The 55th pin (AD5/P3.5) connects AD5 end; The 56th pin (AD4/P3.4) connects AD4 end; The 57th pin (AD3/P3.3) connects AD3 end; The 58th pin (AD2/P3.2) connects AD2 end; The 59th pin (AD1/P3.1) connects AD1 end; The 60th pin (AD0/P3.0) connects AD0 end; The 61st pin (RD) connects RD end; The 62nd pin (ALE) connects ALE end; The 66th pin connects one end, 2 pin of the 30th resistance R 30 and 2 pin of the 12nd capacitor C 12 of crystal oscillator XTAL1; The 67th pin connects shake 1 pin of the other end of device XTAL1,1 pin of the 30th resistance R 30 and the 13rd capacitor C 13 of crystal; The 12nd pin (ANGND) of single-chip microcomputer, the 14th pin (VSS), the 15th pin (P2.2), the 36th pin (GND), the 3rd pin (NMI), the 68th pin (Vss) ground connection; The 17th pin (P2.1) of single-chip microcomputer, the 18th pin (P2.0), the 23rd pin (P1.4/PWM2), the 26th pin (HSO.4), the 27th pin (HSO.5), the 29th pin (HSO.1), the 33rd pin (P2.6), the 34th pin (HSO.2), the 39th pin (P2.5), the 41st pin (WRH/BHE), the 63rd pin (INST) and the 65th pin (CLKOUT) are unsettled;
Voltage input circuit comprises diode Z3 and Z2, adjustable potentiometer P5, resistance R 1, R26, R27 and R29, capacitor C 7, C8, C9, E6, E13 and E16, and the model of diode Z2 is TL431, the model of diode Z3 is 1N5994A; Capacitor C 7, C8, C9 are electrochemical capacitors, and electric capacity E6, E13 and E16 are ceramic disc capacitors; Ground connection after 3 pin of 1 pin (anode) the connection adjustable potentiometer P5 of described the 3rd diode Z3, connects AC0 end after 1 pin of 2 pin (negative electrode) connection the 5th adjustable potentiometer P5 of the 3rd diode Z3 and 2 pin (sliding contact), 2 pin of the 1st resistance R 1,1 pin of 1 pin of the 16th electric capacity E16, the 8th capacitor C 8 and the 6th pin of single-chip microcomputer; After 1 pin of 1 pin of the 6th electric capacity E6, the 9th capacitor C 9 and 7 pins of single-chip microcomputer, connect AC0 end; Ground connection after 2 pin of 2 pin of 2 pin of 2 pin of the 16th electric capacity E16, the 8th capacitor C 8, the 6th electric capacity E6, the 9th capacitor C 9 connect; 1 pin of the 1st resistance R 1 connects ZD-end; 1 pin of the 2nd diode Z2 connects 1 pin of the 7th capacitor C 7, connect 2 pin of the 29th resistance R 29 after 1 pin of the 13rd electric capacity E13; 2 pin of the 2nd diode Z2 connect 2 pin of the 26th resistance R 26 and 1 pin of the 27th resistance R 27; 3 pin of the 2nd diode connect 2 ends of 2 pin, the 7th capacitor C 7 and the 27th resistance R 27 of the 13rd electric capacity E13; 2 pin of the 2nd diode 2 connect 1 pin of the 27th resistance and 2 pin of the 26th resistance R 26; 1 pin of the 26th resistance R 26 connects the 13rd pin of single-chip microcomputer;
Power circuit comprises power management chip U10, resistance R 25 and electric capacity E15, and E15 is ceramic disc capacitor; The model of power management chip U10 is MC34064, and its 1st pin (RESET) connects the 16th pin of 2 pin of the 25th resistance, 1 pin of the 15th electric capacity E15 and single-chip microcomputer; The 2nd pin (IN) connects 1 pin and supply voltage+5V end of the 25th resistance R 25; Ground connection after 2 pin of the 3rd pin (GND) connection the 15th electric capacity E15;
Oscillating circuit comprises crystal oscillator XTAL1, resistance R 30 and capacitor C 12, C13, and capacitor C 12, C13 are electrochemical capacitors; One end of crystal oscillator XTAL1 connects 1 pin of the 67th pin of single-chip microcomputer, 1 pin of the 30th resistance R 30 and the 13rd capacitor C 13, the other end connects 2 pin of the 66th pin of single-chip microcomputer, 2 pin of the 30th resistance R 30 and the 12nd capacitor C 12, and 1 pin of the 12nd capacitor C 12 connects 2 pin of the 13rd capacitor C 13;
Keyboard input and Display and Alarm Circuit comprise button control chip U8, triode P8, resistance R 28, R44, R45 and R49, capacitor C 11 and E8 and loud speaker B4, the model of button control chip U8 is 74HC244, the model of triode P8 is 2SA1013, capacitor C 11 is electrochemical capacitor, and electric capacity E8 is ceramic disc capacitor; The 2nd pin (1A1) of button control chip U8 connects the 19th pin of single-chip microcomputer; The 3rd pin (2Y4) connects LCMCS2 end; The 4th pin (1A2) connects the 20th pin of single-chip microcomputer; The 5th pin (2Y3) connects LCMRS end; The 6th pin (1A3) connects the 21st pin of single-chip microcomputer; The 7th pin (2Y2) connects LREST end; The 8th pin (1A4) connects the 22nd pin of single-chip microcomputer; The 9th pin (2Y1) connects 2 pin of the 49th resistance R 49; The 1st pin (1G) connects the 10th pin (GND) and the rear ground connection of the 19th pin (2G); The 11st pin (2A1) connects the 35th pin of single-chip microcomputer; The 12nd pin (1Y4) connects CDDLLB end; The 13rd pin (2A2) connects the 30th pin of single-chip microcomputer; The 14th pin (1Y3) connects FDKE end; The 15th pin (2A3) connects the 31st pin of single-chip microcomputer; The 16th pin (1Y2) connects MCFD end; The 17th pin (2A4) connects the 32nd pin of single-chip microcomputer; Connection layout image-position sensor MCCD end after the 5th, the 6th pin of the 18th pin (1Y1) connection signal acquisition process chip U13; The 20th pin (VCC) connection+5V power supply; The model of triode P8 is 2SA1013; 1 pin of the 49th resistance R 49 connects 1 pin of the 44th resistance R 44 and the base stage of triode P8; Connect+5V power supply after 1 pin of the emitter of 2 pin connecting triode P8 of the 44th resistance R 44,1 pin of the 11st capacitor C 11 and the 8th electric capacity E8; The collector electrode of triode P8 connects one end of loud speaker B4, ground connection after other end connection 2 pin of the 11st capacitor C 11 of loud speaker B4 and 2 pin of the 8th electric capacity E8;
Signal acquisition processing circuit comprises signal acquisition process chip U13, U14, photoelectricity spacer G5 and resistance R 47, the model of photoelectricity spacer G5 is PC817C, the model of signal acquisition process chip U13 is 74HC21, and the model of signal acquisition process chip U14 is 74HC138; After the 1st pin (1A) connection the 2nd pin (1B) of signal acquisition process chip U13, connect the 28th pin of single-chip microcomputer; Map interlinking image-position sensor MCCD end after the 18th pin of the 4th pin (1C) connection the 5th pin (1D), button control chip U8; After 1 pin of the 6th pin (1Y) connection the 47th resistance R 47, connect KGDYKZ end; The 8th pin (2Y) connects CN end; The 9th pin (2A) connects the 7th pin (Y7) of signal acquisition process chip U14; The 10th pin (2B) connects the 9th pin (Y6) of U14; The 12nd pin (2C) connects the 10th pin (Y5) of U14; The 13rd pin (2D) connects the 11st pin (Y4) of U14; Connect+5V power supply after the 0th pin (E1) of the 14th pin (Vcc) connection U14 and the 16th pin (Vcc); The 1st pin (A0) of signal acquisition process chip U14 connects AD13 end; The 2nd pin (A1) connects AD14 end; The 3rd pin (A2) connects AD15 end; The 12nd pin (Y3) connects LCMCN end; The 4th pin (F1) connects the rear ground connection of the 7th pin (GND) of the 5th pin (F2), the 6th pin (GND) and U13; The 3rd pin (NC) of signal acquisition process chip U13, the 13rd pin (Y2) of signal acquisition process chip U14, the 14th pin (Y1) and the 15th pin (Y0) are unsettled; 2 pin of the 47th resistance R 47 connect 2 pin of the 5th photoelectricity spacer G5; Connect+5 power supplys of 1 pin of the 5th photoelectricity spacer G5; 3 pin connect CDK1 end; Connect+5A of 4 pin power supply;
Signal output apparatus comprises binding post J6, resistance R 38～R42, and the 3rd pin of binding post J6 connects the 8th pin of single-chip microcomputer, connect PO6 end after 1 pin of the 42nd resistance R 42; The 5th pin connects the 11st pin of single-chip microcomputer, connect PO4 end after 1 pin of the 41st resistance R 41; The 1st pin connects the 42nd pin of single-chip microcomputer, connect P24 end after 1 pin of the 38th resistance R 38; The 6th pin connects PO3 end; The 4th pin connects the 10th pin of single-chip microcomputer, connect PO5 end after 1 pin of the 40th resistance R 40; After 1 pin of the 2nd pin connection single-chip microcomputer the 44th pin, the 39th resistance R 39, connect P23 end; Ground connection after the 9th pin, the 10th pin connect; The 7th pin, the 8th pin are unsettled; Connect+5V power supply after 2 pin connection 2 pin of the 41st resistance R 41,2 pin of 2 pin of the 40th resistance R 40, the 42nd resistance R 42 and 2 pin of the 39th resistance R 39 of the 38th resistance R 38;
Parallel circuit comprises photoelectricity isolation drive chip U9, operational amplifier U1 and U4, photoelectricity spacer G1, G2 and G6, triode N1, diode Z4, adjustable potentiometer P1 and P6, resistance R 2, R4, R5, R19, R31～R34, R36, R46, R48, R59 and R60, electric capacity E5, E17, E21, C4 and C19; The model of photoelectricity isolation drive chip U9 is MCI4066, and the model of photoelectricity spacer is PC817C, and the model of operational amplifier is LM358, the model of diode is TL431, the model of triode is 2N5551, and electric capacity E5, E17, E21 are ceramic disc capacitors, and capacitor C 4 and C19 are electrochemical capacitors; The 3rd pin (Out2) of described photoelectricity isolation drive chip U9 connects CDK3 end after connecting the 2nd pin (Out1), the 10th pin (Out4) and the 8th pin (IN3); After 1 pin of the 1st pin (IN3) connection the 4th pin (IN2), the 9th pin (Out3), the 11st pin (IN4) and the 34th resistance R 34, connect CDK2 end; After 2 pin of the 6th pin (Ctrl3) connection the 5th pin (Ctrl2), the 13rd pin (Ctrl1), the 12nd pin (Ctrl4) and the 46th resistance R 46, connect CDK1 end; The 14th connect+5A of pin (VCC) power supply; The 7th pin (GND) ground connection; 2 pin of the 34th resistance R 34 connect 1 pin of the 4th operational amplifier U4; After 4 pin of 1 pin connection the 4th operational amplifier U4 of the 46th resistance R 46, connect ZD-end; Connect+5V of the 8 pin power supply of the 4th operational amplifier U4; 2 pin of U4 connect 7 pin, 2 pin of the 60th resistance R 60, connect CDDLFD end after 6 pin of operational amplifier U1; 3 pin of U4 connect 2 pin of the 59th resistance R 59,1 pin of the 6th adjustable potentiometer P6 and 2 pin (sliding contact); After 1 pin of 5 pin connection the 32nd resistance R 32 of U4, connect CE end; 6 pin of U4 connect 1 pin of the 60th resistance R 60 and 2 pin of the 33rd resistance R 33; After being connected, 1 pin of 2 pin of the 32nd resistance R 32 and the 33rd resistance R 33 connects ZD-end; 1 pin of 3 pin connection the 4th diode Z4 of the 6th adjustable potentiometer P6 and 2 pin, 1 pin of the 19th capacitor C 19 are, 2 pin of 1 pin of the 21st electric capacity E21 and the 31st resistance R 31; Connect+5 power supplys of 1 pin of the 31st resistance R 31; Ground connection after 2 pin of 1 pin connection 3 pin of the 4th diode Z4,2 pin of the 19th capacitor C 19 and the 21st electric capacity E21 of the 59th resistance R 59; 1 pin of the 1st operational amplifier U1 connects 2 pin of 2 pin and the 48th resistance R 48; 3 pin of U1 connect 1 pin of the 17th electric capacity E17, connect CDK3 end after 2 pin of the 36th resistance; 4 pin of U1 connect 3 pin of the 1st adjustable potentiometer P1, connect ZD-end after 1 pin of 2 pin of the 17th electric capacity E17, the 36th resistance R 36; 5 pin of U1 connect 2 pin (sliding contact) of the 1st adjustable potentiometer P1; 7 pin of U1 connect 1 pin of the 2nd resistance R 2; Connect+5A of the 1 pin power supply of the 1st adjustable potentiometer P1; 1 pin of the 48th resistance R 48 connects 1 pin of the 6th photoelectricity spacer G6; 2 pin of G6 connect ZD-end; 3 pin of G6 connect DYKE-end; 4 pin of G6 connect DYKE+ end; 2 pin of the 2nd resistance R 2 connect 1 pin of the 5th electric capacity E5 and 4 pin of the 1st photoelectricity spacer G1; 2 pin of the 5th electric capacity E5 connect ZD-end; 3 pin of the 1st photoelectricity spacer G1 connect CB end; Connect+5V power supply after 1 pin connection the 2nd 1 pin of photoelectricity spacer G2 of G1 and 4 pin of G2; 2 pin of G1 connect king's 3 pin and 2 pin of the 19th resistance R 19; 1 pin of the 19th resistance R 19 connects MCCD end; 2 pin of the 2nd photoisolator G2 connect 2 pin of the 4th resistance R 4; 1 pin of the 4th resistance R 4 connects 3 pin (collector electrode) of the 1st triode N1; 1 pin 9 (base stage) of the 1st triode N1 connects 1 pin of the 5th resistance R 5; After 2 pin of 2 pin connection the 4th capacitor C 4 of the 5th resistance R 5, connect FB end; The 4th capacitor C 4R 1 pin connects the rear ground connection of 2 pin (emitter) of the 1st triode N1.
Core parts of the present invention are single-chip microcomputer 8XC196KC20, LM358 operational amplifier and drive chip MC14066, High Density Integration single-chip microcomputer 8XC196KC20 is the dynamic-configuration that belongs to 24 bit CPU special function registers, 48 byte ram registers, 8MHz16 position bus speed, 58 I/O ports, 16 WatchDog Timers, can realize one-off programming and be with temperature extended channel.Coordinate have two independently, the dual operational amplifier LM358 of high-gain, internal frequency compensation, being suitable for the very wide single supply of supply voltage scope uses, also be applicable to duplicate supply mode of operation, under the condition of work of recommending, source current and independent of power voltage.Therefore, the present invention has internal frequency compensation, direct voltage gain high (about 100dB), unit gain bandwidth (about 1MHz), supply voltage wide ranges, single supply (3-30V), duplicate supply (± 1.5 one ± 15V), low power consumption current are suitable for the features such as powered battery, low input bias current, low input offset voltage and offset current, common-mode input voltage range be wide, can be embodied as the multifunctional safe quick charge of all kinds of energy-storage batteries chargings.The present invention also adopts to be had four and independently has the controlled numeral of two-way signaling gating or analog signal switch, the COMS logical circuit MC14066 of realization to the modulation of signal, demodulation, copped wave, this circuit can be realized adjusting to current input signal by photoelectricity shielding system, can be operated in relatively high power occasion again, bring into play the advantage of full-bridge circuit.
A kind of Based Intelligent Control of the present invention is multi-functional, polymorphic type energy-storage battery quick charging system is controlled by single-chip microcomputer in real time to the charging voltage in charging process, electric current, whole charging system is feedback control system, single-chip microcomputer is by detecting in real time the whole charging process of electric current, voltage and temperature monitoring in charging process, effectively avoided overcurrent in charging process, overvoltage and superheating phenomenon, charging process is carried out with security and stability.
Because signals collecting need be used photoelectricity isolation drive, the present invention selects PC817C special photoelectric spacer, drives chip MC14066 to form parallel circuit.
A kind of Based Intelligent Control of the present invention is multi-functional, polymorphic type energy-storage battery quick charging system, adopts the basic defencive function of BMS battery management system, comprises following several battery protection control loop:
1) charging control loop
Select Freescale 8XC196KC20 single-chip microcomputer to carry out data acquisition and control as control core, adopt four tri-state data buffer 7,4HC,244 eight homophase Three-State/line drives, by photoisolator, be connected with the two-way controlled numeral of MC14066 or analog signal.
Program storage is fast operation in CPU, and disposal ability is large.The high-precision A/D converter in 24, this integrated chip Liaol6 road, can directly detect the charging voltage of storage battery, electric current and temperature, and 2 road PWM can directly output to the break-make of MC14066 chip controls LM358, has simplified the design of SCM peripheral circuit.When charging, containing braking energy, reclaim, when the charging voltage of arbitrary battery surpasses set point, charging voltage reduces automatically, prevents battery overcharge.
2) voltage detecting loop
The present invention selects electric resistance partial pressure type structure, be connected in parallel on monitoring voltage signal in charging circuit, voltage signal carries A/D converter from PAD0 mouth through single-chip microcomputer and reaches single-chip microcomputer and process, this structure can select corresponding range to detect voltage according to the virtual voltage of outside automatically, make voltage more hour, the voltage accuracy detecting is higher, contributes to control more accurately the variation of the charging voltage in charging process.Possess low-voltage variation function (UV), during electric discharge, the discharge voltage of arbitrary battery during lower than set point, stops electric discharge, prevents battery over-discharge simultaneously.
3) current detection circuit
The present invention selects Hall-type current sensor to detect charging current signal, and the current signal that detects is processed to the A/D converter carrying through single-chip microcomputer from PAD1 mouth through certain conversion reach single-chip microcomputer and process, this sensor accuracy is high, can accurately detect the variation of charging current 0.1A.Possess overcurrent protection function (OC), during charge and discharge, the electric current of battery surpasses set point, the growth of volitional check electric current simultaneously.Also possess in addition short-circuit protection function (SC), during charge and discharge and parking resting state, run into battery and be short-circuited, automatic shutdown circuit.
4) temperature detection loop
The present invention selects thermistor to detect battery temperature signal in charging process, during practical application, thermistor is attached to and on battery, detects battery temperature, this thermistor can accurately detect the variable quantity of battery temperature in charging process, temperature signal is processed through PAD2 oral instructions to single-chip microcomputer, prevent that in charging process, battery is overheated, make steady, safe the carrying out of charging process energy.There is high temperature protection function (OT); while being no matter charging or electric discharge or parking resting state, the temperature of arbitrary battery starts battery thermal management system while surpassing set point, reduce battery temperature; when surpass permitting coroner's maximum temperature, automatic shutdown circuit immediately.Have low-temperature protection function (UT), during charging, the temperature of battery during lower than set point, changes charging stream automatically, generally will reduce to 1/3 of charging current; During electric discharge, the temperature of battery during lower than set point, starts battery thermal management system, improves battery temperature.
The present invention selects 12864 liquid crystal display screens with Chinese word library, liquid crystal screen module is connected with PA, the PB mouth of single-chip microcomputer, terminal voltage and the temperature that can show in real time charging voltage, charging current and battery in charging process, and at one's leisure can displaying calendar, the duty ratio of 4 road PWM ripples etc.
The present invention selects 4x4 matrix keyboard.By button, switch to the interfaces such as the terminal voltage of the duty ratio demonstration of accumulator charging method selection, charge parameter setting, calendar adjustment, 4 road PWM ripples and charging voltage, charging current, battery and temperature demonstration.
The high-frequency alternating current alternating cycles that the output frequency of PWM is set by a timer/counter determines, the duty ratio of native system PWM waveform can be expressed as: [(PWMPERx-PWMDTYx)/PWMPERx] * 100%, wherein PWMPERx represents PWM channel register, and PWMDTYx represents PWM passage duty cycle register.
A kind of Based Intelligent Control of the present invention is multi-functional, the systems soft ware C language compilation of polymorphic type energy-storage battery quick charging system, through compilation, artificial debugging, write in the internal program memory of single-chip microcomputer, the layer of structure, the function modoularization that realize systems soft ware, the readability of software, maintainability and extensibility are strong.
A kind of Based Intelligent Control of the present invention is multi-functional, the operation principle of polymorphic type energy-storage battery quick charging system is: first 220V single phase industrial frequence alternating current is carried out to rectification, through excessive capacitor filtering, obtain again the direct current of 300V left and right, by capacitor filtering and voltage stabilizing processing, obtain voltage adjustable, through inductance capacitor filtering, finally obtaining the direct current that ripple is very little is energy-storage battery charging.First data acquisition circuit gathers battery status information data, by electronic control unit (ECU (vehicle-mounted computer), CPU), carry out data processing and analysis again, according to analysis result, intrasystem correlation function module is sent to control command, and to extraneous transmission of information.It is that 6.5V, 9V, 5V are its power supply that each MC14066 chip needs 3 electric pressures, and wherein 5V voltage is the power supply of 8XC196KC20 single-chip microcomputer simultaneously.
A kind of Based Intelligent Control of the present invention is multi-functional, polymorphic type energy-storage battery quick charging system is for dissimilar storage battery; designed corresponding charging method, software is mainly partly comprised of the detection of battery quality, charging stage and charge protection etc. before initialization, charging.
The main using lithium iron phosphate of the present invention is tested, and its charging stage is comprised of low current charge stage, constant current charge stage, constant voltage charge stages 3 part, and its program flow diagram as shown in Figure 4.
Charging stage: after battery detecting program completes, start battery to carry out low current charge, charge rate is about 1/5C left and right; When low current charge to cell voltage reaches reference value, system enters the constant current charge stage, and in the quick charge stage that this stage is energy-storage battery, charge rate is 1-2C; When charging voltage reaches the maximum charging voltage of battery of setting, system enters the constant voltage charge stage, and along with cell voltage rises gradually, charging current reduces gradually; When charging current is reduced to setting reference value, system judgement energy-storage battery abundance stops charging.
Charge protection part: in charging process, constantly whether whether monitoring cell voltage reach limit value over safety value, temperature or rate of temperature change, stops immediately charging if any above-mentioned situation.Detecting cell voltage is that whether detected temperatures and rate of temperature change reach limit value in order to prevent that lithium ion battery and lead accumulator from overcharging, and is in order to prevent that ni-mh and nickel-cadmium cell from overcharging.
The above-mentioned charging stage, for lithium ion battery design, mainly tests by ferric phosphate lithium cell group in reality, for other type energy-storage battery, has set corresponding charging method on software; Same lithium ion battery of lead accumulator charging stage, i.e. first little pre-charge, then constant current charge, last constant voltage charge, when constant voltage charge electric current is little to a certain extent time, system judgement battery is sufficient also stops charging; Nickel-cadmium cell, first little pre-charge, then constant current charge fast, when cell voltage being detected and decline for the first time, system judgement battery is sufficient also stops charging; Ni-MH battery, first little pre-charge, quicker constant current charge, when zero growth rate appears in cell voltage, sufficient also the stopping of judgement battery charged.
Lead accumulator and lithium ion battery self-discharge rate are low, after battery is full of, can directly stop charging, ni-mh and NI-G electricity self-discharge rate is high, during as night left unguarded charging, can after battery abundance, adopt trickle charge mode to supplement electric charge to battery, make energy-storage battery keep full charge state.
Claims (1)
1. multi-functional, the polymorphic type energy-storage battery quick charging system of a Based Intelligent Control, it is characterized in that, by main circuit and parallel circuit, formed, main circuit comprises single-chip microcomputer, voltage input circuit, power circuit, oscillating circuit, keyboard input and Display and Alarm Circuit, signal acquisition processing circuit and signal output apparatus, and power circuit connects parallel circuit in addition;
Single-chip microcomputer model is 8XC196KC20, and its 1st pin (Vcc) connects 2 pin of the 43rd resistance R 43 after being connected with the 37th pin (Vpp), the 64th pin (Busw) and the 2nd pin (EA); After 1 pin of the 4th pin (P0.3) connection the 43rd resistance R 43, connect PO3 end; The 5th pin (P0.1) connects AC1 end; The 6th pin (P0.0) connection 1 pin of the 8th capacitor C 8,2 pin of 1 pin of the 16th electric capacity E16, the 1st resistance R 1 are, connect AC0 end after 1 pin of 2 pin of the 3rd diode, the 5th adjustable potentiometer P5 and 2 pin (sliding contact) connection; The 7th pin (P0.2) connects AC7 end after being connected with 1 pin of the 9th capacitor C 9,1 pin of the 6th electric capacity E6; The 9th pin (P0.7) connects BUSY end; The 13rd pin (VREF) connects 1 pin of the 26th resistance R 26; The 16th pin (RESET) connects the 1st pin of 2 pin of the 25th resistance R 25,1 pin of the 15th electric capacity E15 and power management chip U10; The 19th pin (P1.0) connects the 2nd pin (1A1) of button control chip U8; The 20th pin (P1.1) connects the 4th pin (1A2) of button control chip U8; The 21st pin (P1.2) connects the 6th pin (1A3) of button control chip U8; The 22nd pin (P1.3) connects the 8th pin (1A4) of button control chip U8; The 24th pin (HSI.0) connects 2 pin of the 28th resistance R 28; The 25th pin (HSI.1) connects 2 pin of the 45th resistance R 45; The 28th pin (HSO.0) connects the 1st pin (1A) and the 2nd pin (1B) of signal acquisition process chip U13; The 30th pin (P1.5) connects the 13rd pin (2A2) of button control chip U8; The 31st pin (P1.6) connects the 15th pin (2A3) of button control chip U8; The 32nd pin (P1.7) connects the 17th pin (2A4) of button control chip U8; ((HSO.3) connects the 11st pin ((2A1) of button control chip U8 to the 35th pin; The 38th pin (P2.7) connects BUSY end; The 40th pin (WRL/WR) connects WR end; After the 42nd pin (P2.4) connection 1 pin of the 38th resistance R 38 and the 1st pin of binding post J6, connect the P24 end of binding post J6; The 43rd pin (READY) connects 1 pin of the 53rd resistance R 53; After the 11st 1 pin of pin (P0.4) connection R41 resistance R 41 and the 5th pin of binding post J6, connect the PO4 end of binding post J6; After the 10th pin (P0.5) connection 1 pin of the 40th resistance R 40 and the 4th pin of binding post J6, connect the PO5 end of binding post J6; After the 8th pin (P0.6) connection 1 pin of the 42nd resistance R 42 and the 3rd pin of binding post J6, connect the PO6 end of binding post J6; After the 2nd pin of the 44th pin (P2.3) connection the 39th resistance R 39 and binding post J6, connect the P23 end of binding post J6; The 45th pin (AD15/P4.7) connects AD15 end; The 46th pin (AD14/P4.6) connects AD14 end; The 47th pin (AD13/P4.5) connects AD13 end; The 48th pin (AD12/P4.4) connects AD12 end; The 49th pin (AD11/P4.3) connects AD11 end; The 50th pin (AD10/P4.2) connects AD10 end; The 51st pin (AD9/P4.1) connects AD9 end; The 52nd pin (AD8/P4.0) connects AD8 end; The 53rd pin (AD7/P3.7) connects AD7 end; The 54th pin (AD6/P3.6) connects AD6 end; The 55th pin (AD5/P3.5) connects AD5 end; The 56th pin (AD4/P3.4) connects AD4 end; The 57th pin (AD3/P3.3) connects AD3 end; The 58th pin (AD2/P3.2) connects AD2 end; The 59th pin (AD1/P3.1) connects AD1 end; The 60th pin (AD0/P3.0) connects AD0 end; The 61st pin (RD) connects RD end; The 62nd pin (ALE) connects ALE end; The 66th pin connects one end, 2 pin of the 30th resistance R 30 and 2 pin of the 12nd capacitor C 12 of crystal oscillator XTAL1; The 67th pin connects shake 1 pin of the other end of device XTAL1,1 pin of the 30th resistance R 30 and the 13rd capacitor C 13 of crystal; The 12nd pin (ANGND) of single-chip microcomputer, the 14th pin (VSS), the 15th pin (P2.2), the 36th pin (GND), the 3rd pin (NMI), the 68th pin (Vss) ground connection; The 17th pin (P2.1) of single-chip microcomputer, the 18th pin (P2.0), the 23rd pin (P1.4/PWM2), the 26th pin (HSO.4), the 27th pin (HSO.5), the 29th pin (HSO.1), the 33rd pin (P2.6), the 34th pin (HSO.2), the 39th pin (P2.5), the 41st pin (WRH/BHE), the 63rd pin (INST) and the 65th pin (CLKOUT) are unsettled;
Voltage input circuit comprises diode Z3 and Z2, adjustable potentiometer P5, resistance R 1, R26, R27 and R29, capacitor C 7, C8, C9, E6, E13 and E16, and the model of diode Z2 is TL431, the model of diode Z3 is 1N5994A; Capacitor C 7, C8, C9 are electrochemical capacitors, and electric capacity E6, E13 and E16 are ceramic disc capacitors; Ground connection after 3 pin of 1 pin (anode) the connection adjustable potentiometer P5 of described the 3rd diode Z3, connects AC0 end after 1 pin of 2 pin (negative electrode) connection the 5th adjustable potentiometer P5 of the 3rd diode Z3 and 2 pin (sliding contact), 2 pin of the 1st resistance R 1,1 pin of 1 pin of the 16th electric capacity E16, the 8th capacitor C 8 and the 6th pin of single-chip microcomputer; After 1 pin of 1 pin of the 6th electric capacity E6, the 9th capacitor C 9 and 7 pins of single-chip microcomputer, connect AC0 end; Ground connection after 2 pin of 2 pin of 2 pin of 2 pin of the 16th electric capacity E16, the 8th capacitor C 8, the 6th electric capacity E6, the 9th capacitor C 9 connect; 1 pin of the 1st resistance R 1 connects ZD-end; 1 pin of the 2nd diode Z2 connects 1 pin of the 7th capacitor C 7, connect 2 pin of the 29th resistance R 29 after 1 pin of the 13rd electric capacity E13; 2 pin of the 2nd diode Z2 connect 2 pin of the 26th resistance R 26 and 1 pin of the 27th resistance R 27; 3 pin of the 2nd diode connect 2 ends of 2 pin, the 7th capacitor C 7 and the 27th resistance R 27 of the 13rd electric capacity E13; 2 pin of the 2nd diode 2 connect 1 pin of the 27th resistance and 2 pin of the 26th resistance R 26; 1 pin of the 26th resistance R 26 connects the 13rd pin of single-chip microcomputer;
Power circuit comprises power management chip U10, resistance R 25 and electric capacity E15, and E15 is ceramic disc capacitor; The model of power management chip U10 is MC34064, and its 1st pin (RESET) connects the 16th pin of 2 pin of the 25th resistance, 1 pin of the 15th electric capacity E15 and single-chip microcomputer; The 2nd pin (IN) connects 1 pin and supply voltage+5V end of the 25th resistance R 25; Ground connection after 2 pin of the 3rd pin (GND) connection the 15th electric capacity E15;
Oscillating circuit comprises crystal oscillator XTAL1, resistance R 30 and capacitor C 12, C13, and capacitor C 12, C13 are electrochemical capacitors; One end of crystal oscillator XTAL1 connects 1 pin of the 67th pin of single-chip microcomputer, 1 pin of the 30th resistance R 30 and the 13rd capacitor C 13, the other end connects 2 pin of the 66th pin of single-chip microcomputer, 2 pin of the 30th resistance R 30 and the 12nd capacitor C 12, and 1 pin of the 12nd capacitor C 12 connects 2 pin of the 13rd capacitor C 13;
Keyboard input and Display and Alarm Circuit comprise button control chip U8, triode P8, resistance R 28, R44, R45 and R49, capacitor C 11 and E8 and loud speaker B4, the model of button control chip U8 is 74HC244, the model of triode P8 is 2SA1013, capacitor C 11 is electrochemical capacitor, and electric capacity E8 is ceramic disc capacitor; The 2nd pin (1A1) of button control chip U8 connects the 19th pin of single-chip microcomputer; The 3rd pin (2Y4) connects LCMCS2 end; The 4th pin (1A2) connects the 20th pin of single-chip microcomputer; The 5th pin (2Y3) connects LCMRS end; The 6th pin (1A3) connects the 21st pin of single-chip microcomputer; The 7th pin (2Y2) connects LREST end; The 8th pin (1A4) connects the 22nd pin of single-chip microcomputer; The 9th pin (2Y1) connects 2 pin of the 49th resistance R 49; The 1st pin (1G) connects the 10th pin (GND) and the rear ground connection of the 19th pin (2G); The 11st pin (2A1) connects the 35th pin of single-chip microcomputer; The 12nd pin (1Y4) connects CDDLLB end; The 13rd pin (2A2) connects the 30th pin of single-chip microcomputer; The 14th pin (1Y3) connects FDKE end; The 15th pin (2A3) connects the 31st pin of single-chip microcomputer; The 16th pin (1Y2) connects MCFD end; The 17th pin (2A4) connects the 32nd pin of single-chip microcomputer; Connection layout image-position sensor MCCD end after the 5th, the 6th pin of the 18th pin (1Y1) connection signal acquisition process chip U13; The 20th pin (VCC) connection+5V power supply; The model of triode P8 is 2SA1013; 1 pin of the 49th resistance R 49 connects 1 pin of the 44th resistance R 44 and the base stage of triode P8; Connect+5V power supply after 1 pin of the emitter of 2 pin connecting triode P8 of the 44th resistance R 44,1 pin of the 11st capacitor C 11 and the 8th electric capacity E8; The collector electrode of triode P8 connects one end of loud speaker B4, ground connection after other end connection 2 pin of the 11st capacitor C 11 of loud speaker B4 and 2 pin of the 8th electric capacity E8;
Signal acquisition processing circuit comprises signal acquisition process chip U13, U14, photoelectricity spacer G5 and resistance R 47, the model of photoelectricity spacer G5 is PC817C, the model of signal acquisition process chip U13 is 74HC21, and the model of signal acquisition process chip U14 is 74HC138; After the 1st pin (1A) connection the 2nd pin (1B) of signal acquisition process chip U13, connect the 28th pin of single-chip microcomputer; Map interlinking image-position sensor MCCD end after the 18th pin of the 4th pin (1C) connection the 5th pin (1D), button control chip U8; After 1 pin of the 6th pin (1Y) connection the 47th resistance R 47, connect KGDYKZ end; The 8th pin (2Y) connects CN end; The 9th pin (2A) connects the 7th pin (Y7) of signal acquisition process chip U14; The 10th pin (2B) connects the 9th pin (Y6) of U14; The 12nd pin (2C) connects the 10th pin (Y5) of U14; The 13rd pin (2D) connects the 11st pin (Y4) of U14; Connect+5V power supply after the 0th pin (E1) of the 14th pin (Vcc) connection U14 and the 16th pin (Vcc); The 1st pin (A0) of signal acquisition process chip U14 connects AD13 end; The 2nd pin (A1) connects AD14 end; The 3rd pin (A2) connects AD15 end; The 12nd pin (Y3) connects LCMCN end; The 4th pin (F1) connects the rear ground connection of the 7th pin (GND) of the 5th pin (F2), the 6th pin (GND) and U13; The 3rd pin (NC) of signal acquisition process chip U13, the 13rd pin (Y2) of signal acquisition process chip U14, the 14th pin (Y1) and the 15th pin (Y0) are unsettled; 2 pin of the 47th resistance R 47 connect 2 pin of the 5th photoelectricity spacer G5; Connect+5 power supplys of 1 pin of the 5th photoelectricity spacer G5; 3 pin connect CDK1 end; Connect+5A of 4 pin power supply;
Signal output apparatus comprises binding post J6, resistance R 38～R42, and the 3rd pin of binding post J6 connects the 8th pin of single-chip microcomputer, connect PO6 end after 1 pin of the 42nd resistance R 42; The 5th pin connects the 11st pin of single-chip microcomputer, connect PO4 end after 1 pin of the 41st resistance R 41; The 1st pin connects the 42nd pin of single-chip microcomputer, connect P24 end after 1 pin of the 38th resistance R 38; The 6th pin connects PO3 end; The 4th pin connects the 10th pin of single-chip microcomputer, connect PO5 end after 1 pin of the 40th resistance R 40; After 1 pin of the 2nd pin connection single-chip microcomputer the 44th pin, the 39th resistance R 39, connect P23 end; Ground connection after the 9th pin, the 10th pin connect; The 7th pin, the 8th pin are unsettled; Connect+5V power supply after 2 pin connection 2 pin of the 41st resistance R 41,2 pin of 2 pin of the 40th resistance R 40, the 42nd resistance R 42 and 2 pin of the 39th resistance R 39 of the 38th resistance R 38;
Parallel circuit comprises photoelectricity isolation drive chip U9, operational amplifier U1 and U4, photoelectricity spacer G1, G2 and G6, triode N1, diode Z4, adjustable potentiometer P1 and P6, resistance R 2, R4, R5, R19, R31～R34, R36, R46, R48, R59 and R60, electric capacity E5, E17, E21, C4 and C19; The model of photoelectricity isolation drive chip U9 is MCI4066, and the model of photoelectricity spacer is PC817C, and the model of operational amplifier is LM358, the model of diode is TL431, the model of triode is 2N5551, and electric capacity E5, E17, E21 are ceramic disc capacitors, and capacitor C 4 and C19 are electrochemical capacitors; The 3rd pin (Out2) of described photoelectricity isolation drive chip U9 connects CDK3 end after connecting the 2nd pin (Out1), the 10th pin (Out4) and the 8th pin (IN3); After 1 pin of the 1st pin (IN3) connection the 4th pin (IN2), the 9th pin (Out3), the 11st pin (IN4) and the 34th resistance R 34, connect CDK2 end; After 2 pin of the 6th pin (Ctrl3) connection the 5th pin (Ctrl2), the 13rd pin (Ctrl1), the 12nd pin (Ctrl4) and the 46th resistance R 46, connect CDK1 end; The 14th connect+5A of pin (VCC) power supply; The 7th pin (GND) ground connection; 2 pin of the 34th resistance R 34 connect 1 pin of the 4th operational amplifier U4; After 4 pin of 1 pin connection the 4th operational amplifier U4 of the 46th resistance R 46, connect ZD-end; Connect+5V of the 8 pin power supply of the 4th operational amplifier U4; 2 pin of U4 connect 7 pin, 2 pin of the 60th resistance R 60, connect CDDLFD end after 6 pin of operational amplifier U1; 3 pin of U4 connect 2 pin of the 59th resistance R 59,1 pin of the 6th adjustable potentiometer P6 and 2 pin (sliding contact); After 1 pin of 5 pin connection the 32nd resistance R 32 of U4, connect CE end; 6 pin of U4 connect 1 pin of the 60th resistance R 60 and 2 pin of the 33rd resistance R 33; After being connected, 1 pin of 2 pin of the 32nd resistance R 32 and the 33rd resistance R 33 connects ZD-end; 1 pin of 3 pin connection the 4th diode Z4 of the 6th adjustable potentiometer P6 and 2 pin, 1 pin of the 19th capacitor C 19 are, 2 pin of 1 pin of the 21st electric capacity E21 and the 31st resistance R 31; Connect+5 power supplys of 1 pin of the 31st resistance R 31; Ground connection after 2 pin of 1 pin connection 3 pin of the 4th diode Z4,2 pin of the 19th capacitor C 19 and the 21st electric capacity E21 of the 59th resistance R 59; 1 pin of the 1st operational amplifier U1 connects 2 pin of 2 pin and the 48th resistance R 48; 3 pin of U1 connect 1 pin of the 17th electric capacity E17, connect CDK3 end after 2 pin of the 36th resistance; 4 pin of U1 connect 3 pin of the 1st adjustable potentiometer P1, connect ZD-end after 1 pin of 2 pin of the 17th electric capacity E17, the 36th resistance R 36; 5 pin of U1 connect 2 pin (sliding contact) of the 1st adjustable potentiometer P1; 7 pin of U1 connect 1 pin of the 2nd resistance R 2; Connect+5A of the 1 pin power supply of the 1st adjustable potentiometer P1; 1 pin of the 48th resistance R 48 connects 1 pin of the 6th photoelectricity spacer G6; 2 pin of G6 connect ZD-end; 3 pin of G6 connect DYKE-end; 4 pin of G6 connect DYKE+ end; 2 pin of the 2nd resistance R 2 connect 1 pin of the 5th electric capacity E5 and 4 pin of the 1st photoelectricity spacer G1; 2 pin of the 5th electric capacity E5 connect ZD-end; 3 pin of the 1st photoelectricity spacer G1 connect CB end; Connect+5V power supply after 1 pin connection the 2nd 1 pin of photoelectricity spacer G2 of G1 and 4 pin of G2; 2 pin of G1 connect king's 3 pin and 2 pin of the 19th resistance R 19; 1 pin of the 19th resistance R 19 connects MCCD end; 2 pin of the 2nd photoisolator G2 connect 2 pin of the 4th resistance R 4; 1 pin of the 4th resistance R 4 connects 3 pin (collector electrode) of the 1st triode N1; 1 pin 9 (base stage) of the 1st triode N1 connects 1 pin of the 5th resistance R 5; After 2 pin of 2 pin connection the 4th capacitor C 4 of the 5th resistance R 5, connect FB end; The 4th capacitor C 4R 1 pin connects the rear ground connection of 2 pin (emitter) of the 1st triode N1.
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| CN107086635A (en) * | 2017-06-02 | 2017-08-22 | 扬州市纵横光电科技有限公司 | A kind of energy storage charging-discharging controller with dual control heating function |
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| CN111060828A (en) * | 2019-12-30 | 2020-04-24 | 华人运通(江苏)技术有限公司 | Battery state monitoring method and device |
| CN112002948A (en) * | 2020-07-16 | 2020-11-27 | 清远市巨劲科技有限公司 | Unmanned aerial vehicle new forms of energy battery management system |
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| CN104184196B (en) | 2016-03-16 |
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