CN104156049A - Power domain verification device, facility and method - Google Patents
Power domain verification device, facility and method Download PDFInfo
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Abstract
The invention provides a power domain verification device, facility and method. The device comprises a processing unit, a power switch connected with a power domain unit, a clock signal generation unit, a signal judgment unit, a time storage unit, a process time point comparison unit and a process time calculation unit. The processing unit triggers the power switch according to the power source state information of the power domain unit to connect or disconnect a path for supplying power to the power domain unit. The signal judgment unit converts a power domain control signal into a level signal according to the stimulation of the power domain control signal, the duration time is stored by the time storage unit, the process time point comparison unit judges two adjacent working state time points to determine whether a process is completed or not, and the process time calculation unit calculates the difference of the two adjacent working state time points to determine the time of a power domain for changing the working state. By means of the power domain verification device, facility and method, the power domain power-off working process and the power domain power-on working process are automatically detected, and the aim of judging whether output clamping values are correct or not is achieved.
Description
Technical field
The present invention relates to power management techniques field, relate in particular to a kind of power domain demo plant, equipment and method.
Background technology
Along with the fast rise of SOC chip-scale, the power consumption of controlling jumbo chip has become the thorny problem of chip industry.Chip is divided into different power domain, and by turn-offing not the power supply of operating circuit place power domain, to save power consumption be that direct effect is the most significantly saved power consumption means at present.But due to the complex circuit designs in many power supplies territory, so validation difficulty is large.So, also lack at present verification platform effectively easily and fast.
Summary of the invention
In view of the above problems, the invention provides a kind of a kind of power domain demo plant, equipment and method that overcomes the problems referred to above or address the above problem at least partly.
The invention provides a kind of power domain demo plant, duty for a plurality of power domain of control chip unit, this device comprises processing unit and a plurality of power switch, each power switch is connected with this power domain unit, this processing unit produces corresponding power domain control signal according to the power state information of the power domain unit detecting, and triggers corresponding power switch conducts or is cut to the path that power domain unit powers.This device also comprises:
Clock signal generation unit, for generation of clock signal.
Signal judging unit, the incentive action of the power domain control signal that the clock signal producing according to this clock signal generation unit produces this processing unit is converted to corresponding level signal by this power domain control signal.
Time memory cell, the duration of the level signal of being exported by this signal judging unit for storage under the timing effect at a timer.
Flow time point comparing unit, adjacent two time points that duty is corresponding of each power domain control signal of storing for obtaining respectively this time memory cell, and time point is compared to determine whether corresponding flow process completes.And
Flow time computing unit, for obtaining the corresponding time point of adjacent two duties of each power domain control signal that this time memory cell stores, and computing time is poor, with unit, true corresponding power territory, changes the time that duty was experienced.
The present invention also provides a kind of power domain Authentication devices, comprises power supply, and the power domain Authentication devices being as above somebody's turn to do.
The present invention also provides a kind of power domain verification method, and the method comprises:
Detect the power supply status of power domain unit, and produce corresponding power domain control signal according to the power state information detecting.
According to the power domain control signal producing, control the path that power supply is the power supply of power domain unit.
According to clock signal, the incentive action of power domain control signal is converted to corresponding level signal by this power domain control signal.
The duration of the level signal of timing preservation output.
Obtain respectively adjacent two time points that duty is corresponding of power domain control signal of storage, and time point is compared to determine whether corresponding flow process completes.And
Obtain the corresponding time point of adjacent two duties of power domain control signal of storage, and computing time is poor, to determine that corresponding power territory changes the time that duty was experienced.
A kind of power domain demo plant provided by the invention, equipment and method, corresponding time point and the detection of duration of by power domain unit, being closed or being opened adjacent two duties that produce in flow process obtain corresponding information, and then judge that whether flow process is correct, thereby realized, automatic detection power domain is closed electric workflow, power domain is opened electric workflow and the whether correct object of output clamp value, solve in prior art the complex circuit designs due to many power supplies territories, so the large and technical matters that cannot fast and effeciently verify of validation difficulty.
Accompanying drawing explanation
Fig. 1 is the high-level schematic functional block diagram of the power domain demo plant in embodiment of the present invention;
Fig. 2 is the high-level schematic functional block diagram that the power domain demo plant in embodiment of the present invention carries out level signal conversion portion;
Fig. 3 be in embodiment of the present invention up and down along the high-level schematic functional block diagram of judgment sub-unit;
Fig. 4 is the schematic flow sheet of the power domain verification method in embodiment of the present invention;
Fig. 5 is the method sub-process schematic diagram that utilizes clock signal to encourage power domain control signal in embodiment of the present invention.
Label declaration:
Equipment 10
Device 100
Clock signal generation unit 101
Signal judging unit 102
Up and down along judgment sub-unit 1021,1022,1023,1024,1025,1026
First order register 1027
The second utmost point register 1028
Judge module 1029
Power switch unit 103
Level conversion unit 104
Clamper unit 105
Time memory cell 106
Upper fall time storing sub-units 1061,1062,1063,1064,1065,1066
Timing unit 107
Flow time computing unit 108
Flow time point comparing unit 109
Clamper inspection unit 110
Detection record unit 111
Processing unit 112
Power domain unit 113
Power supply 20
Embodiment
By describing technology contents of the present invention, structural attitude in detail, being realized object and effect, below in conjunction with embodiment and coordinate accompanying drawing to be explained in detail.
Refer to Fig. 1, for the high-level schematic functional block diagram of the power domain demo plant in embodiment of the present invention, this device 100 can be applied to comprise in the electronic equipment 10 of SOC (System-on-a-Chip) chip to control the duty in this SOC chip different electrical power territory.This device 100 comprises clock signal generation unit 101, signal judging unit 102, power switch unit 103, level conversion unit 104, clamper unit 105, time memory cell 106, timing unit 107, flow time computing unit 108, flow time point comparing unit 109, clamper inspection unit 110, detection record unit 111 and processing unit 112.
This device 100 also comprises a plurality of power domain unit 113, function treatment circuit on each corresponding chip in power domain unit 113, and for example, RTC real-time clock power domain, PMU Power Management Unit power domain, image are processed power domain etc.This electronic equipment 10 comprises the power supply unit 20 that is used to chip that working power is provided.Further, each power domain unit 113 and a corresponding connection of power switch 103.
This processing unit 112 is for detection of the power supply status of each power domain unit 113, and produce corresponding power domain control signal according to the power state information detecting, wherein, this power domain control signal comprises that the power domain power supply producing successively closes electric control signal, power domain clock switch signal, power switch control signal, power domain reset signal, clamper control signal.
Particularly, when this processing unit 112 need to be closed one or more power domain unit 113 (hereinafter to be referred as until unit, powered-down territory) according to the testing result judgement to the power supply status of each power domain unit 113, produce successively effective power domain power supply and close electric control signal, power domain clock switch shutdown signal, invalid power domain reset signal and effective clamp control signal.This processing unit 112 produces this effective power domain power supply and closes electric control signal with powered-down switch controlling signal, trigger power switch 103 these power switch control signals of response and close, thereby cut off the electricity supply 20 for this path for the treatment of unit, powered-down territory 113 power supply, make this treat that 113 power down of unit, powered-down territory close.After this supply path until powered-down unit 113 cuts off, this processing unit 112 also detects its power supply status and is output as the power state information of closed condition, and the signal that this clamp units 105 these effective clamp control signals of response treat that by this powered-down unit 113 outputs to the power domain unit 113 of other normal work is clamped down at fixing level, with the random level of avoiding not having the power domain unit 113 of power supply 20 power supplies to export, power domain unit 113 of other normal work are impacted.
When this processing unit 112 need to be opened one or more power domain unit 113 (hereinafter to be referred as until unit, power-on territory) according to the testing result judgement to the power supply status of each power domain unit 113, produce successively invalid power domain power supply and close electric control signal, effective power domain reset signal, invalid clamp control signal and invalid power domain reset signal.This processing unit 112 produces this invalid power domain power supply and closes electric control signal to turn on the power switch control signal, trigger power switch 103 these power switch control signals of response and open, thereby connection power supply 20 is this supply path for the treatment of unit, power-on territory 113, and this unit, power-on territory 113 is worked on power.This treats that unit, power-on territory 113 also responds this effective power domain reset signal and resets, and circuit can again normally be worked after powering on, and in unlatching, responds afterwards this invalid power domain reset signal and cancel reset.
This level conversion unit 104 for carrying out voltage transitions between unit, different electrical power territory 113, and making can proper communication between unit, different electrical power territory 113.
Further, in the process that electric-opening or power down are closed on power domain unit 113, these clock signal generation unit 101 clockings, in the present embodiment, this clock signal generation unit 101 is high frequency clock signal generation unit, for generation of high frequency clock signal.The incentive action of the power domain control signal that the clock signal that this signal judging unit 102 produces according to this clock signal generation unit 101 produces this processing unit 112 is converted to corresponding level signal by this power domain control signal, and, set in advance varying level signal effective or effective when negative edge when rising edge.For example, set in advance power domain power supply pass electric control signal effective when rising edge level, and be invalid when negative edge level, when power domain power supply pass electric control signal is exported rising edge level signal through the excitation of the clock signal of these clock signal generation unit 101 generations, this power domain power supply pass electric control signal is effective.Thereby, as mentioned above, under the processing of this signal judging unit 102, the power domain control signal that processing unit 112 is produced is converted to utilizes rising edge level signal or negative edge level signal to characterize its validity, to show in this device 100 the correlation behavior information in electric-opening in each power domain 113 or power down closing process, as power domain resets, power domain is clamped down on etc.
This time memory cell 106 is stored the lasting time of level signal of being exported by signal judging unit 102 under the timing effect of timer 107,, from rising edge level signal, become the time that negative edge level signal experiences, or become from negative edge level signal the time that rising edge level signal experiences.
Please refer to Fig. 2, this signal judging unit 102 comprises that up and down, along judgment sub-unit 1021,1022,1023,1024,1025 and 1026, this time memory cell 106 comprises fall time storing sub-units 1061,1062,1063,1064,1065 and 1066.To be treated to example along 1061 pairs of power domain power supplys pass electric control signals of judgment sub-unit 1021 and upper fall time storing sub-units up and down, be elaborated below, wherein, setting in advance this power domain power supply pass electric control signal is that rising edge level is effective.
Corresponding rising edge level signal or negative edge level signal are exported in the excitation that this clock signal producing according to this clock signal generation unit 101 along judgment sub-unit 1021 is up and down closed electric control signal to this power domain power supply.When output rising edge level signal, show that power domain unit 113 in device 100 is in power down closing process, when output negative edge level signal, show that power domain unit 113 in device 100 is in the opening process that powers on.
Please refer to Fig. 3, in embodiment of the present invention up and down along the high-level schematic functional block diagram of judgment sub-unit, each includes first order register 1027, the second utmost point register 1028 and judge module 1029 along judgment sub-unit up and down.Equally, to be treated to example along 1061 pairs of power domain power supplys pass electric control signals of judgment sub-unit 1021 and upper fall time storing sub-units up and down, be elaborated.
This first order register 1027 receives power domain and closes electric control signal and clock signal, this second level register 1028 receives value and the clock signal of these first order register 1027 outputs, and this judge module 1029 carries out the upper and lower judgement along level signal according to the value of these second level register 1028 outputs.In the present embodiment, when the values that the value of exporting when first order register 1027 is height, these second level register 1028 outputs are low, judge module 1029 is defined as rising edge level signal.When the value of first order register 1027 output is values low, 1028 outputs of second level register while being high, this judge module 1029 is defined as negative edge level signal.
On this, fall time storing sub-units 1061 is preserved its lasting time according to the level signal of output.
Similarly, this receives the power state information of power domain clock switch signals, clamper control signal, power switch control signal, power domain reset signal and power supply along judgment sub-unit 1022,1023,1024,1025 and 1026 correspondences up and down, and by the clock signal excitation of clock signal generation unit 101 generations, is exported corresponding rising edge signal or negative edge signal respectively as mentioned above.On this, fall time storing sub-units 1061,1062,1063,1064,1065 and 1066 records according to the timing effect of timer 107 duration of corresponding rising edge signal or negative edge signal respectively.
This flow time point comparing unit 109 obtains respectively adjacent two time points that duty is corresponding of each power domain control signal of storage in this time memory cell 106, and time point is compared to determine whether corresponding flow process completes,, when being greater than the time point of last duty, the time point of a rear duty is considered to correct order, flow process completes, otherwise output error state.
This flow time computing unit 108 obtains the corresponding time point of adjacent two duties of each power domain control signal of storage in this time memory cell 106, and computing time is poor, with unit, true corresponding power territory 113 from power on opening to the time that power down closed condition is experienced, or time of experiencing from the supreme electric-opening state of power down closed condition.
This detection record unit 111 is for recording the judged result of definite time of this flow time point computing unit 108 and 109 outputs of this flow time point comparing unit.
In the present embodiment, clamper control signal in the power domain control signal that 110 pairs of processing units of this clamper inspection unit 112 produce detects, to judge whether it meets expectation value, thereby determine that whether 105 pairs of these effects of clamping down on for the treatment of powered-down unit 113 of this clamp units are effective, clamper testing result is sent in this detection record unit 111 simultaneously and preserves.
Referring to Fig. 4, is the schematic flow sheet of the power domain verification method in embodiment of the present invention, and the method comprises:
Step S30, this processing unit 112 detects the power supply status of each power domain unit 113, and produces corresponding power domain control signal according to the power state information detecting.
Wherein, this power domain control signal comprises that the power domain power supply producing successively closes electric control signal, power domain clock switch signal, power switch control signal, power domain reset signal, clamper control signal.
When this processing unit 112 need to be closed one or more power domain unit 113 (hereinafter to be referred as until unit, powered-down territory) according to the testing result judgement to the power supply status of each power domain unit 113, produce successively effective power domain power supply and close electric control signal, power domain clock switch shutdown signal, invalid power domain reset signal and effective clamp control signal.
When this processing unit 112 need to be opened one or more power domain unit 113 (hereinafter to be referred as until unit, power-on territory) according to the testing result judgement to the power supply status of each power domain unit 113, produce successively invalid power domain power supply and close electric control signal, effective power domain reset signal, invalid clamp control signal and invalid power domain reset signal.
Step S31, this processing unit 112 closes electric control signal according to the power domain power supply producing and opens or closes power switch control signal, trigger power switch 103 these power switch control signals of response and open or close, thereby control power supply 20, for this, treating the supply path of unit, power-on territory 113.
This processing unit 112 produces this effective power domain power supply and closes electric control signal with powered-down switch controlling signal, trigger power switch 103 these power switch control signals of response and close, thereby cut off the electricity supply 20 for this path for the treatment of unit, powered-down territory 113 power supply, make this treat that 113 power down of unit, powered-down territory close.
This processing unit 112 produces this invalid power domain power supply and closes electric control signal to turn on the power switch control signal, trigger power switch 103 these power switch control signals of response and open, thereby connection power supply 20 is this supply path for the treatment of unit, power-on territory 113, and this unit, power-on territory 113 is worked on power.
Step S32, the incentive action of the power domain control signal that the clock signal that this signal judging unit 102 produces according to this clock signal generation unit 101 produces this processing unit 112 is converted to corresponding level signal by this power domain control signal.
Wherein, set in advance varying level signal when rising edge effectively or effective when negative edge.For example, set in advance power domain power supply pass electric control signal effective when rising edge level, and be invalid when negative edge level, when power domain power supply pass electric control signal is exported rising edge level signal through the excitation of the clock signal of these clock signal generation unit 101 generations, this power domain power supply pass electric control signal is effective.Thereby, as mentioned above, under the processing of this signal judging unit 102, the power domain control signal that processing unit 112 is produced is converted to utilizes rising edge level signal or negative edge level signal to characterize its validity, to show in this device 100 the correlation behavior information in electric-opening in each power domain 113 or power down closing process, as power domain resets, power domain is clamped down on etc.
Please refer to Fig. 5, this step S32 also comprises following sub-step:
Sub-step S320, this first order register 1027 is according to the power domain control signal receiving and the corresponding value of clock signal output.
Sub-step S321, this second level register 1028 is according to the value of these first order register 1027 outputs and the corresponding value of clock signal output.
Sub-step S322, this judge module 1029 carries out the upper and lower judgement along level signal according to the value of these second level register 1028 outputs.
In the present embodiment, when the values that the value of exporting when first order register 1027 is height, these second level register 1028 outputs are low, judge module 1029 is defined as rising edge level signal.When the value of first order register 1027 output is values low, 1028 outputs of second level register while being high, this judge module 1029 is defined as negative edge level signal.
Step S33, this time memory cell 106 is stored the lasting time of level signal of being exported by signal judging unit 102 under the timing effect of timer 107.
Lasting time of this level signal is for to become from rising edge level signal the time that negative edge level signal experiences, or becomes from negative edge level signal the time that rising edge level signal experiences.
Step S34, this flow time point comparing unit 109 obtains respectively adjacent two time points that duty is corresponding of each power domain control signal of storage in this time memory cell 106, and time point is compared to determine whether corresponding flow process completes.
Wherein, when the time point of a rear duty is greater than the time point of last duty, this flow time point comparing unit 109 thinks that flow process is correct order, and flow process completes, otherwise output error state.
Step S35, this flow time computing unit 108 obtains the corresponding time point of adjacent two duties of each power domain control signal of storage in this time memory cell 106, and computing time is poor, with unit, true corresponding power territory 113 from power on opening to the time that power down closed condition is experienced, or time of experiencing from the supreme electric-opening state of power down closed condition.
Step S36, this detection record unit 111 records the judged result of definite time of this flow time point computing unit 108 and 109 outputs of this flow time point comparing unit.
In the present embodiment, clamper control signal in the power domain control signal that 110 pairs of processing units of this clamper inspection unit 112 produce detects, to judge whether it meets expectation value, thereby determine that whether 105 pairs of these effects of clamping down on for the treatment of powered-down unit 113 of this clamp units are effective, clamper testing result is sent in this detection record unit 111 simultaneously and preserves.
A kind of power domain demo plant provided by the invention, equipment and method, corresponding time point and the detection of duration of by power domain unit, being closed or being opened adjacent two duties that produce in flow process obtain corresponding information, and then judge that whether flow process is correct, thereby realized, automatic detection power domain is closed electric workflow, power domain is opened electric workflow and the whether correct object of output clamp value, solve in prior art the complex circuit designs due to many power supplies territories, so the large and technical matters that cannot fast and effeciently verify of validation difficulty.
The foregoing is only embodiments of the invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes instructions of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.
Claims (13)
1. a power domain demo plant, duty for a plurality of power domain of control chip unit, described device comprises processing unit and a plurality of power switch, each power switch is connected with power domain unit described in, described processing unit produces corresponding power domain control signal according to the power state information of the power domain unit detecting, and triggers corresponding power switch conducts or is cut to the path that power domain unit powers; It is characterized in that, described device also comprises:
Clock signal generation unit, for generation of clock signal;
Signal judging unit, the incentive action of the power domain control signal that the clock signal producing according to described clock signal generation unit produces described processing unit is converted to corresponding level signal by described power domain control signal;
Time memory cell, the duration of the level signal of being exported by described signal judging unit for storage under the timing effect at a timer;
Flow time point comparing unit, adjacent two time points that duty is corresponding of each power domain control signal of storing for obtaining respectively described time memory cell, and time point is compared to determine whether corresponding flow process completes; And
Flow time computing unit, for obtaining the corresponding time point of adjacent two duties of each power domain control signal that described time memory cell stores, and computing time is poor, with unit, true corresponding power territory, changes the time that duty was experienced.
2. power domain demo plant as claimed in claim 1, is characterized in that, described device also comprises:
Detection record unit, for recording the judged result of definite time of described flow time point computing unit and the output of described flow time point comparing unit.
3. power domain demo plant as claimed in claim 1, it is characterized in that, described power domain control signal comprises that the power domain power supply producing successively closes electric control signal, power domain clock switch signal, power switch control signal, power domain reset signal, clamper control signal.
4. power domain demo plant as claimed in claim 3, is characterized in that, described device also comprises:
Clamp units is clamped down at fixing level for the described power domain unit of closing being outputed to the signal of the power domain unit of other normal work when a power domain unit is closed.
5. power domain demo plant as claimed in claim 4, is characterized in that, described device also comprises:
Clamper inspection unit, for the clamper control signal of the power domain control signal of described processing unit generation is detected, to judge whether it meets expectation value, thereby definite described clamp units treats that to described whether the effect of clamping down on of powered-down unit is effective.
6. power domain demo plant as claimed in claim 3, it is characterized in that, described signal judging unit comprise each signal setting in corresponding described power domain control signal up and down along judgment sub-unit, described time memory cell comprises corresponding described up and down along the corresponding upper fall time storing sub-units arranging of judgment sub-unit; Described in each, along judgment sub-unit, comprise up and down:
First order register, for receiving described power domain control signal and clock signal,
The second utmost point register, for receiving value and the clock signal of described first order register output; And
Judge module, for carrying out the upper and lower judgement along level signal according to the value of described second level register output.
7. a power domain Authentication devices, comprises power supply, it is characterized in that, comprises the power domain Authentication devices as described in claim 1～6 any one.
8. a power domain verification method, is characterized in that, described method comprises:
Detect the power supply status of power domain unit, and produce corresponding power domain control signal according to the power state information detecting;
According to the power domain control signal producing, control the path that power supply is the power supply of power domain unit;
According to clock signal, the incentive action of power domain control signal is converted to corresponding level signal by described power domain control signal;
The duration of the level signal of timing preservation output;
Obtain respectively adjacent two time points that duty is corresponding of power domain control signal of storage, and time point is compared to determine whether corresponding flow process completes; And
Obtain the corresponding time point of adjacent two duties of power domain control signal of storage, and computing time is poor, to determine that corresponding power territory changes the time that duty was experienced.
9. Power Supply Verification method as claimed in claim 8, is characterized in that, described method also comprises:
Record described power domain and change the judged result whether time that duty experiences and corresponding flow process complete.
10. Power Supply Verification method as claimed in claim 8, is characterized in that, the described step that the incentive action of power domain control signal is converted to corresponding level signal by described power domain control signal according to clock signal comprises:
By first order register root, according to the power domain control signal receiving and clock signal, export corresponding value;
Value and the corresponding value of clock signal output by second level register root according to described first order register output; And
According to the value of described second level register output, carry out the upper and lower judgement along level signal.
11. Power Supply Verification methods as claimed in claim 8, it is characterized in that, described power domain control signal comprises that the power domain power supply producing successively closes electric control signal, power domain clock switch signal, power switch control signal, power domain reset signal, clamper control signal.
12. Power Supply Verification methods as claimed in claim 11, is characterized in that, the described step that is the path of power domain unit power supply according to the power domain control signal control power supply producing also comprises afterwards:
The signal that the described power domain unit of closing is outputed to the power domain unit of other normal work when a power domain unit is closed is clamped down at fixing level.
13. Power Supply Verification methods as claimed in claim 12, is characterized in that, described method also comprises:
Clamper control signal in described power domain control signal is detected, to judge whether it meets expectation value, thereby determine and treat that to described whether the effect of clamping down on of powered-down unit is effective.
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| US11775717B2 (en) | 2019-12-30 | 2023-10-03 | Chengdu Haiguang Integrated Circuit Design Co., Ltd. | Chip design method, chip design device, chip, and electronic device |
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