CN104135155A - Pulse width limiting circuit of inverter - Google Patents
Pulse width limiting circuit of inverter Download PDFInfo
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- CN104135155A CN104135155A CN201410396623.5A CN201410396623A CN104135155A CN 104135155 A CN104135155 A CN 104135155A CN 201410396623 A CN201410396623 A CN 201410396623A CN 104135155 A CN104135155 A CN 104135155A
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Abstract
The invention discloses a pulse width limiting circuit of an inverter power supply, which comprises a main inverter circuit, a rectification output circuit, a driving circuit, a current sampling circuit, a power supply IC1, a first voltage division circuit, a voltage follower circuit, an integrating circuit, a second voltage division circuit, an operational amplifier IC2 and an operational amplifier IC 3. The pulse width limiting circuit of the inverter power supply can effectively adjust the output pulse width, so that the circuit always works in a safe current range, the occurrence of magnetic biasing is effectively avoided, the circuit structure is simple, the switching speed of a power tube is not required to be reduced, the absorption energy of a power tube absorption loop is not required to be increased, the turn-on and turn-off loss of the power tube is greatly reduced, and the production cost is reduced.
Description
Technical field
The present invention relates to inverter, relate in particular to a kind of Width Limitation circuit of inverter.
Background technology
Inverter welding power source is called for short inverter, has high, the lightweight advantage of efficiency, and current domestic annual production has reached ten million platform, starts as more and more family and unit are used.Inverter industry has wide prospect, cause increasing enterprise to start to set foot in this field, under new development form, the function of inverter is more and more stronger and price is more and more lower, cause every cost of enterprise to improve constantly, it is more and more meagre that profit becomes.Therefore, for how reducing product after cost, how improving product reliability, how becoming the most important thing at the situation decline low production production cost that does not reduce product reliability.
The Master control chip of inverter is when work at present, when inverter pulsewidth is the widest and occur that asymmetry is duty ratio maximum, because pulse duration now reaches the widest, Master control chip cannot increase pulsewidth again and adjust asymmetry, cause main inverter circuit easily to occur bias phenomenon, the two brachium pontis size of current that are bridge circuit are asymmetric, wherein a brachium pontis electric current is bigger than normal, another brachium pontis electric current is less than normal, as adjusted not in time, the power tube of the side that electric current is bigger than normal will generate heat seriously, after long-time multicycle magnetic bias, main transformer may enter saturation condition, now just there is the danger burning out.And the mode of current anti-magnetic bias, mainly by reducing the switching speed of power tube, the absorption energy that increases power tube absorption circuit effectively reduces magnetic bias, but this kind of mode also increased opening of power tube and turn-off power loss, the increase of output power that causes absorption circuit, cause heat in machine to strengthen, therefore need larger radiator and heat radiation wind speed, cause occurring the series of problems such as product cost rising, machine efficiency reduction.
Summary of the invention
The present invention is directed to the defects such as in the machine existing in prior art, heat is large, product cost is high, machine efficiency is low, a kind of Width Limitation circuit of new inverter is provided.
In order to solve the problems of the technologies described above, the present invention is achieved through the following technical solutions:
A kind of Width Limitation circuit of inverter, comprise main inverter circuit, rectifying output circuit, drive circuit, current sampling circuit, power supply IC1, described rectifying output circuit, drive circuit is connected with main inverter circuit respectively, described main inverter circuit is connected with the current feedback terminal of power supply IC by current sampling circuit, the output OUTA of described power supply IC1 is connected with drive circuit respectively with output OUTB, also comprise the first bleeder circuit, voltage follower circuit, integrating circuit, the second bleeder circuit, operational amplifier IC2, operational amplifier IC3, the first described bleeder circuit is leaded up to voltage follower circuit, current-limiting resistance R16 is connected with the PWM adjustable side of power supply IC1, another road is connected with the reference voltage terminal of power supply IC1, the output OUTA of described power supply IC1 is connected with integrating circuit by diode D2, the output OUTB of described power supply IC1 is connected with integrating circuit by diode D1, described integrating circuit is connected with the in-phase input end of operational amplifier IC2, output one tunnel of described operational amplifier IC2 is connected with the inverting input of operational amplifier IC2, the resistance R 12 of separately leading up to is connected with the inverting input of operational amplifier IC3, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by the second bleeder circuit, the output of operational amplifier IC3 is leaded up to resistance R 13 and is connected with the inverting input of operational amplifier IC3, separately lead up to resistance R 14, diode D5 is connected with the PWM adjustable side of power supply IC1.
The reference voltage terminal of power supply IC1 is by arriving the PWM adjustable side of power supply IC1 after the first bleeder circuit dividing potential drop, give the preset level in PWM adjustable side of power supply IC1, by regulating the voltage of the PWM adjustable side of power supply IC1, the output OUTA of controllable power IC1 and the impulse magnitude of output OUTB, when main inverter circuit pulse duration is narrower, by current sampling circuit, arrive the current feedback terminal of power supply IC, make output OUTA and the output OUTB output burst pulse of power supply IC1, through integrating circuit dividing potential drop and arrive the inverting input of operational amplifier IC3 after operational amplifier IC2, if now the in-phase input end voltage of operational amplifier IC3 is lower than inverting input, the output of operational amplifier IC3 is exported high level, if the high level of operational amplifier IC3 output is higher than the PWM adjustable side voltage of power supply IC1, now diode D5 cut-off, resistance R 14, on diode D5, do not have electric current to flow through, the output end voltage that is operational amplifier IC3 does not have any impact to power supply IC1, circuit working complete the dividing potential drop that depends on the first bleeder circuit, when main inverter circuit pulse is very wide, the output OUTA of power supply IC1 and the output pulse of output OUTB broaden, the in-phase input end voltage that finally arrives operational amplifier IC3 is higher, now the in-phase input end voltage of operational amplifier IC3 is higher than anti-phase input terminal voltage, the output output low level of operational amplifier IC3, if now the output end voltage of operational amplifier IC3 is lower than the PWM adjustable side voltage of power supply IC1, now diode D5 conducting, resistance R 14, thereby on diode D5, having electric current to flow through drags down the PWM adjustable side voltage of power supply IC1, and then the output OUTA of power supply IC1 and the output pulse width of output OUTB are narrowed down, circuit is always worked within the scope of safe current, effectively avoided the generation of bias phenomenon, and circuit structure is simple, without reducing the switching speed of power tube and the absorption energy that increases power tube absorption circuit, greatly reduced opening and turn-off power loss of power tube, reduced production cost.
As preferably, the Width Limitation circuit of a kind of inverter described above, also comprise triode Q1, operational amplifier IC4, the base stage of described triode Q1 is leaded up to divider resistance R6 and is connected with the output OUTA of power supply IC1, the divider resistance R7 of separately leading up to is connected with ground, the collector electrode of described triode Q1 is connected with VCC, the emitter of described triode Q1 is connected with the in-phase input end of operational amplifier IC4 by diode D3, described diode D3 two ends are parallel with resistance R 9, the inverting input of described operational amplifier IC4 is connected with the second bleeder circuit, the output of described operational amplifier IC4 is by diode D4, resistance R 15 is connected with the PWM adjustable side of power supply IC1.
The output OUTA of power supply IC1, output OUTB pass through drive circuit, main inverter circuit, rectifying output circuit to late-class circuit, wherein main inverter circuit also arrives the current feedback terminal of power supply IC1 by current sampling circuit, in use, when if the late-class circuit of rectifying output circuit has short circuit or load to cross reconstructed image, the large electric current producing may burn out main inverter circuit, and this partial circuit can limiting short-circuit current, make electric current all the time in safe range, avoided the possibility burning out.
As preferably, the Width Limitation circuit of a kind of inverter described above, also comprises capacitor C 2, capacitor C 5, and described capacitor C 2 is parallel to the two ends of divider resistance R7, described capacitor C 5 one end are connected with the in-phase input end of operational amplifier IC4, other end ground connection.Play filter action, make circuit more stable.
As preferably, the Width Limitation circuit of a kind of inverter described above, the first described bleeder circuit comprises resistance R 1, resistance R 2, potentiometer VT1, described resistance R 2 one end ground connection, the other end is connected with the reference voltage terminal of power supply IC1 by potentiometer VT1, resistance R 1, and described voltage follower circuit is connected with potentiometer VT1.
The bleeder circuit of connecting that resistance R 1, resistance R 2 and potentiometer VT1 form, makes just can change the center tap voltage of potentiometer VT1 by regulator potentiometer VT1, thereby and then is transported to the preset voltage of rear class change power supply IC.
As preferably, the Width Limitation circuit of a kind of inverter described above, the second described bleeder circuit comprises resistance R 8, resistance R 10, resistance R 11, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by resistance R 8, and a end of described resistance R 8 is connected with ground by resistance R 10, resistance R 11.
After the bleeder circuit dividing potential drop forming through resistance R 8, resistance R 10, resistance R 11, the voltage of resistance R 10 and the tie point of resistance R 11 is as the input voltage of the inverting input of rear class operational amplifier IC4, the input voltage through the voltage of resistance R 8 and the tie point of resistance R 10 as the in-phase input end of rear class operational amplifier IC3.
As preferably, the Width Limitation circuit of a kind of inverter described above, also comprise capacitor C 3, capacitor C 4, capacitor C 6, a end of described resistance R 8, b end are connected with ground by capacitor C 4, capacitor C 3 respectively, and the two ends of described resistance R 11 are parallel with capacitor C 6.Play filter action, make circuit more stable.
As preferably, the Width Limitation circuit of a kind of inverter described above, described integrating circuit comprises resistance R 4, resistance R 5, capacitor C 1, the anode of described diode D1 is connected with resistance R 4 respectively with the anode of diode D2, described resistance R 4 lead up to resistance R 5 with ground be connected, another road is connected with the in-phase input end of operational amplifier IC2, and described capacitor C 1 is parallel to the two ends of resistance R 5.
In the integrating circuit that resistance R 4, resistance R 5, capacitor C form, resistance R 4 forms bleeder circuit with resistance R 5, but owing to there being the effect of capacitor C 1, make electric capacity both end voltage namely resistance R 5 both end voltage can not suddenly change, make capacitor C 1 and resistance R 5 both end voltage present a kind of rising process and slow decreasing process.
As preferably, the Width Limitation circuit of a kind of inverter described above, described resistance R 13 two ends are also parallel with capacitor C 6.Play filter action, make circuit more stable.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of the Width Limitation circuit of a kind of inverter of the present invention.
Embodiment
Below in conjunction with accompanying drawing 1 and embodiment, the present invention is described in further detail, but they are not limitations of the present invention:
embodiment 1
As shown in Figure 1, a kind of Width Limitation circuit of inverter, comprise main inverter circuit 2, rectifying output circuit 1, drive circuit 3, current sampling circuit 8, power supply IC1, described rectifying output circuit 1, drive circuit 3 is connected with main inverter circuit 2 respectively, described main inverter circuit 2 is connected with the current feedback terminal of power supply IC by current sampling circuit 8, the output OUTA of described power supply IC1 is connected with drive circuit 3 respectively with output OUTB, it is characterized in that: also comprise the first bleeder circuit 7, voltage follower circuit 6, integrating circuit 4, the second bleeder circuit 5, operational amplifier IC2, operational amplifier IC3, the first described bleeder circuit 7 is leaded up to voltage follower circuit 6, current-limiting resistance R16 is connected with the PWM adjustable side of power supply IC1, another road is connected with the reference voltage terminal of power supply IC1, the output OUTA of described power supply IC1 is connected with integrating circuit 4 by diode D2, the output OUTB of described power supply IC1 is connected with integrating circuit 4 by diode D1, described integrating circuit 4 is connected with the in-phase input end of operational amplifier IC2, output one tunnel of described operational amplifier IC2 is connected with the inverting input of operational amplifier IC2, the resistance R 12 of separately leading up to is connected with the inverting input of operational amplifier IC3, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by the second bleeder circuit 5, the output of operational amplifier IC3 is leaded up to resistance R 13 and is connected with the inverting input of operational amplifier IC3, separately lead up to resistance R 14, diode D5 is connected with the PWM adjustable side of power supply IC1.
During work, the reference voltage terminal of power supply IC1 is by arriving the PWM adjustable side of power supply IC1 after the first bleeder circuit 7 dividing potential drops, give the preset level in PWM adjustable side of power supply IC1, by regulating the voltage of the PWM adjustable side of power supply IC1, the output OUTA of controllable power IC1 and the impulse magnitude of output OUTB, wherein output OUTA and output OUTB are symmetrical complement output, be that width is identical, the pulse of opposite direction, the pulse of output OUTA output arrives integrating circuit 4 through diode D2, the pulse of output OUTB output arrives integrating circuit 4 through diode D1, after processing, integrating circuit 4 arrives the in-phase input end of operational amplifier IC2, because the output of operational amplifier IC2 is connected with inverting input, make the multiplication factor of operational amplifier IC2 equal 1, be that operational amplifier IC2 is voltage follower, therefore the voltage of the in-phase input end of operational amplifier IC2 input is output to the inverting input of operational amplifier IC3, the in-phase input end of operational amplifier IC3 is connected with the VC end of power supply IC1 by the second bleeder circuit 5.Because operational amplifier IC3 is differential amplifier, when main inverter circuit 2 pulse durations are when narrower, by the current feedback terminal of current sampling circuit 8 to power supply IC, make output OUTA and output OUTB output burst pulse, the voltage of inverting input that arrives operational amplifier IC3 is lower, if now the in-phase input end voltage of operational amplifier IC3 is higher than anti-phase input terminal voltage, the output of operational amplifier IC3 is exported high level, by the PWM adjustable side voltage higher than power supply IC1, cause the diode D5 cannot conducting, therefore now diode D5 and resistance R 14 no currents flow through, the voltage that is operational amplifier IC3 does not have any impact to power supply IC1, circuit working complete the dividing potential drop that depends on the first bleeder circuit 7, otherwise, when pulse duration is wider, output OUTA and output OUTB output pulse also broaden thereupon, the voltage of inverting input that finally arrives operational amplifier IC3 is higher, if now the anti-phase input terminal voltage of operational amplifier IC3 is higher than in-phase input end voltage, the output output low level of operational amplifier IC3, if now the output end voltage of operational amplifier IC3 is lower than the PWM adjustable side voltage of power supply IC1, diode D5 conducting, now in diode D5 and resistance R 14, there is electric current to flow through, and the PWM adjustable side voltage of power supply IC1 is dragged down, thereby reduce the output OUTA of power supply IC1 and the output pulse width of output OUTB, circuit is always worked within the scope of safe current, effectively avoided the generation of bias phenomenon.
As preferably, also comprise triode Q1, operational amplifier IC4, the base stage of described triode Q1 is leaded up to divider resistance R6 and is connected with the output OUTA of power supply IC1, the divider resistance R7 of separately leading up to is connected with ground, the collector electrode of described triode Q1 is connected with VCC, the emitter of described triode Q1 is connected with the in-phase input end of operational amplifier IC4 by diode D3, described diode D3 two ends are parallel with resistance R 9, the inverting input of described operational amplifier IC4 is connected with the second bleeder circuit 5, the output of described operational amplifier IC4 is by diode D4, resistance R 15 is connected with the PWM adjustable side of power supply IC1.
During work, the voltage of the output OUTA output of power supply IC1 arrives the base stage of triode Q1 after by divider resistance R6 and divider resistance R7 dividing potential drop, because triode Q1 is for penetrating a grade follower, therefore the voltage of emitter and the voltage of base stage of triode Q1 equate, the voltage of the emitter of triode Q1 is through resistance R 9, after diode D3, arrive the in-phase input end of operational amplifier IC4, the inverting input of operational amplifier IC4 is connected with the VC end of power supply IC1 by the second bleeder circuit 5, because operational amplifier IC4 is voltage comparator, when circuit is normally worked, be that the in-phase input end voltage of operational amplifier IC4 is during higher than anti-phase input terminal voltage, the output output high level of operational amplifier IC4, PWM adjustable side voltage higher than power supply IC1, now diode D4 cannot conducting, in diode D4 and resistance R 15, no current flows through, therefore now operational amplifier IC4 does not have any impact to power supply IC1, otherwise, when there is short circuit in the late-class circuit of rectifying output circuit 1, the electric current of main inverter circuit 2 will increase, and by the current feedback terminal of current sampling circuit 8 to power supply IC, make the pulse narrowing of the output OUTA output of power supply IC1, the voltage of the inverting input of final arrival operational amplifier IC4 is lower, the in-phase input end voltage that makes operational amplifier IC4 is now during lower than anti-phase input terminal voltage, the output output low level of operational amplifier IC4, and lower than the PWM adjustable side voltage of power supply IC1, now diode D4 conducting, in diode D4 and resistance R 15, there is electric current to flow through, and then drag down the PWM adjustable side voltage of power supply IC1, make the output OUTA of power supply IC1 and the pulse duration of output OUTB narrower, thereby main inverter circuit 2 and rectifying output circuit 1 operating current are diminished, and operating current is remained in safe range, the danger of having avoided main inverter circuit 2 to burn out.
As preferably, also comprise capacitor C 2, capacitor C 5, described capacitor C 2 is parallel to the two ends of divider resistance R7, and described capacitor C 5 one end are connected with the in-phase input end of operational amplifier IC4, other end ground connection.
As preferably, the first described bleeder circuit 7 comprises resistance R 1, resistance R 2, potentiometer VT1, described resistance R 2 one end ground connection, the other end is connected with the reference voltage terminal of power supply IC1 by potentiometer VT1, resistance R 1, and described voltage follower circuit 6 is connected with potentiometer VT1.
As preferably, the second described bleeder circuit 5 comprises resistance R 8, resistance R 10, resistance R 11, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by resistance R 8, and a end of described resistance R 8 is connected with ground by resistance R 10, resistance R 11.
As preferably, also comprise capacitor C 3, capacitor C 4, capacitor C 6, a end of described resistance R 8, b end are connected with ground by capacitor C 4, capacitor C 3 respectively, and the two ends of described resistance R 11 are parallel with capacitor C 6.
As preferably, described integrating circuit 4 comprises resistance R 4, resistance R 5, capacitor C 1, the anode of described diode D1 is connected with resistance R 4 respectively with the anode of diode D2, described resistance R 4 lead up to resistance R 5 with ground be connected, another road is connected with the in-phase input end of operational amplifier IC2, and described capacitor C 1 is parallel to the two ends of resistance R 5.
As preferably, described resistance R 13 two ends are also parallel with capacitor C 6.
In a word, the foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the scope of the present patent application patent change and modify, and all should belong to covering scope of the present invention.
Claims (8)
1. the Width Limitation circuit of an inverter, comprise main inverter circuit (2), rectifying output circuit (1), drive circuit (3), current sampling circuit (8), power supply IC1, described rectifying output circuit (1), drive circuit (3) is connected with main inverter circuit (2) respectively, described main inverter circuit (2) is connected with the current feedback terminal of power supply IC by current sampling circuit (8), the output OUTA of described power supply IC1 is connected with drive circuit (3) respectively with output OUTB, it is characterized in that: also comprise the first bleeder circuit (7), voltage follower circuit (6), integrating circuit (4), the second bleeder circuit (5), operational amplifier IC2, operational amplifier IC3, described the first bleeder circuit (7) is leaded up to voltage follower circuit (6), current-limiting resistance R16 is connected with the PWM adjustable side of power supply IC1, another road is connected with the reference voltage terminal of power supply IC1, the output OUTA of described power supply IC1 is connected with integrating circuit (4) by diode D2, the output OUTB of described power supply IC1 is connected with integrating circuit (4) by diode D1, described integrating circuit (4) is connected with the in-phase input end of operational amplifier IC2, output one tunnel of described operational amplifier IC2 is connected with the inverting input of operational amplifier IC2, the resistance R 12 of separately leading up to is connected with the inverting input of operational amplifier IC3, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by the second bleeder circuit (5), the output of operational amplifier IC3 is leaded up to resistance R 13 and is connected with the inverting input of operational amplifier IC3, separately lead up to resistance R 14, diode D5 is connected with the PWM adjustable side of power supply IC1.
2. the Width Limitation circuit of a kind of inverter according to claim 1, it is characterized in that: also comprise triode Q1, operational amplifier IC4, the base stage of described triode Q1 is leaded up to divider resistance R6 and is connected with the output OUTA of power supply IC1, the divider resistance R7 of separately leading up to is connected with ground, the collector electrode of described triode Q1 is connected with VCC, the emitter of described triode Q1 is connected with the in-phase input end of operational amplifier IC4 by diode D3, described diode D3 two ends are parallel with resistance R 9, the inverting input of described operational amplifier IC4 is connected with the second bleeder circuit (5), the output of described operational amplifier IC4 is by diode D4, resistance R 15 is connected with the PWM adjustable side of power supply IC1.
3. the Width Limitation circuit of a kind of inverter according to claim 2, it is characterized in that: also comprise capacitor C 2, capacitor C 5, described capacitor C 2 is parallel to the two ends of divider resistance R7, and described capacitor C 5 one end are connected with the in-phase input end of operational amplifier IC4, other end ground connection.
4. the Width Limitation circuit of a kind of inverter according to claim 1, it is characterized in that: described the first bleeder circuit (7) comprises resistance R 1, resistance R 2, potentiometer VT1, described resistance R 2 one end ground connection, the other end is connected with the reference voltage terminal of power supply IC1 by potentiometer VT1, resistance R 1, and described voltage follower circuit (6) is connected with potentiometer VT1.
5. the Width Limitation circuit of a kind of inverter according to claim 1, it is characterized in that: described the second bleeder circuit (5) comprises resistance R 8, resistance R 10, resistance R 11, the in-phase input end of described operational amplifier IC3 is connected with the VC end of power supply IC1 by resistance R 8, and a end of described resistance R 8 is connected with ground by resistance R 10, resistance R 11.
6. the Width Limitation circuit of a kind of inverter according to claim 5, it is characterized in that: also comprise capacitor C 3, capacitor C 4, capacitor C 6, the a end of described resistance R 8, b end are connected with ground by capacitor C 4, capacitor C 3 respectively, and the two ends of described resistance R 11 are parallel with capacitor C 6.
7. the Width Limitation circuit of a kind of inverter according to claim 1, it is characterized in that: described integrating circuit (4) comprises resistance R 4, resistance R 5, capacitor C 1, the anode of described diode D1 is connected with resistance R 4 respectively with the anode of diode D2, described resistance R 4 lead up to resistance R 5 with ground be connected, another road is connected with the in-phase input end of operational amplifier IC2, and described capacitor C 1 is parallel to the two ends of resistance R 5.
8. the Width Limitation circuit of a kind of inverter according to claim 1, is characterized in that: described resistance R 13 two ends are also parallel with capacitor C 6.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410396623.5A CN104135155B (en) | 2014-08-13 | 2014-08-13 | Pulse width limiting circuit of inverter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410396623.5A CN104135155B (en) | 2014-08-13 | 2014-08-13 | Pulse width limiting circuit of inverter |
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| CN104135155A true CN104135155A (en) | 2014-11-05 |
| CN104135155B CN104135155B (en) | 2016-08-17 |
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| CN201410396623.5A Active CN104135155B (en) | 2014-08-13 | 2014-08-13 | Pulse width limiting circuit of inverter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016090959A1 (en) * | 2014-12-08 | 2016-06-16 | 深圳市科陆电子科技股份有限公司 | Switching power supply double-pulse pulse width constraint circuit and implementation method therefor |
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| JPH0984388A (en) * | 1995-09-11 | 1997-03-28 | Nissan Motor Co Ltd | Ac motor controller |
| CN2567867Y (en) * | 2002-07-05 | 2003-08-20 | 北京通力环电气股份有限公司 | Invertor controller |
| CN203216959U (en) * | 2013-04-25 | 2013-09-25 | 永康市帝普特科技有限公司 | Floating digital display meter power supply structure |
| CN203734536U (en) * | 2013-09-24 | 2014-07-23 | 许继集团有限公司 | Limited bipolarity control circuit employing PWM control chip |
| CN204089599U (en) * | 2014-08-13 | 2015-01-07 | 永康市帝普特科技有限公司 | A kind of pulsewidth limiting circuit of inverter |
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2014
- 2014-08-13 CN CN201410396623.5A patent/CN104135155B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0984388A (en) * | 1995-09-11 | 1997-03-28 | Nissan Motor Co Ltd | Ac motor controller |
| CN2567867Y (en) * | 2002-07-05 | 2003-08-20 | 北京通力环电气股份有限公司 | Invertor controller |
| CN203216959U (en) * | 2013-04-25 | 2013-09-25 | 永康市帝普特科技有限公司 | Floating digital display meter power supply structure |
| CN203734536U (en) * | 2013-09-24 | 2014-07-23 | 许继集团有限公司 | Limited bipolarity control circuit employing PWM control chip |
| CN204089599U (en) * | 2014-08-13 | 2015-01-07 | 永康市帝普特科技有限公司 | A kind of pulsewidth limiting circuit of inverter |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016090959A1 (en) * | 2014-12-08 | 2016-06-16 | 深圳市科陆电子科技股份有限公司 | Switching power supply double-pulse pulse width constraint circuit and implementation method therefor |
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| CN104135155B (en) | 2016-08-17 |
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Effective date of registration: 20220523 Address after: 321300 unit 1, building 2, No. 528, Jiuding Road, Yongkang Economic Development Zone, Jinhua City, Zhejiang Province (self declaration) Patentee after: Zhejiang jundi Electronic Technology Co.,Ltd. Address before: Zone 208, No. 189, Zizheng Road, Yongkang Economic Development Zone, Jinhua, Zhejiang 321300 Patentee before: YONGKANG TIGTOP TECHNOLOGY CO.,LTD. |