CN104125461A - Large-size image compression processing system and method - Google Patents
Large-size image compression processing system and method Download PDFInfo
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- CN104125461A CN104125461A CN201310152278.6A CN201310152278A CN104125461A CN 104125461 A CN104125461 A CN 104125461A CN 201310152278 A CN201310152278 A CN 201310152278A CN 104125461 A CN104125461 A CN 104125461A
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Abstract
The invention discloses a large-size image compression processing system and a method. The image compression processing system comprises a storage device used for storing image data and an FPGA. The FPGA is embedded with a cutting module, a plurality of parallel compression modules and a combination module, wherein the cutting module is used for reading a to-be-processed image in the storage device, cutting the image into a plurality of image blocks and distributing the image blocks respectively to the plurality of compression modules; the compression modules are used for carrying out compression processing on the distributed image blocks respectively so as to form a plurality of compression data flows; and the combination module is used for combining the plurality of compression data flows. The invention also provides a large-size image compression processing method. When the technical scheme of the invention is applied, the efficiency of carrying out compression processing on the large-size image is high, the cost is low, and the system is simple.
Description
Technical field
The present invention relates to image processing field, especially relate to a kind of large-sized image compression processing system and method.
Background technology
Along with the development of multimedia technology and the communication technology, storage and the transmission of multimedia computer to information data had higher requirement, and particularly has the digital picture communications of huge data volume, and therefore image compression and video compression are widely applied.
Be mainly the application that DSP or ASIC image are processed special chip to image Compression mode at present, most such process chip maximum can be processed picture size in 1080P left and right, and is widely used in present image processing field.If but will compress the image of larger molded dimension, the image-capable of such chip in efficiency and speed just is all difficult to reach, if therefore will process large-scale sized image in the prerequisite lower compression that reaches desirable frame per second, must increase the quantity of process chip, so just correspondingly increase chip manufacturing cost, but also caused the problems such as system complexity.
So, in the current high-definition image technology demand that particularly HD video shows, compression and the processing of the new type of compression mode of being badly in need of having efficient disposal ability to large-scale sized image.
Summary of the invention
The technical problem to be solved in the present invention is, low or cost large, the defect of system complex for above-mentioned large-sized image Compression efficiency of prior art, a kind of large-sized image compression processing system and method are provided, and efficiency is high and cost is low, system is simple.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of large-sized image compression processing system, comprise the memory for storing image data, described image compression processing system also comprises FPGA, and described FPGA is embedded with:
Cut apart module, for reading pending image from described memory, and described image is divided into multiple image blocks, and distribute to respectively multiple compression modules;
Multiple parallel compression modules, for respectively distributed image block being compressed to processing, to form multiple compressed data streams;
Composite module, for combining described multiple compressed data streams.
In image compression processing system of the present invention, described memory is DDR.
In image compression processing system of the present invention, described compression module compresses processing according to the compression standard of JPEG to each image block.
In image compression processing system of the present invention, described image compression processing system also comprises the interface module being connected with described FPGA, for outwards transmitting the compressed data stream after combination.
The present invention also constructs a kind of large-sized image compress processing method, comprising:
A. the module of cutting apart being embedded in FPGA reads pending image from memory, and described image is divided into multiple image blocks, and distributes to respectively the multiple compression modules that are embedded in FPGA;
B. many parallel compression modules compress processing to distributed image block respectively, to form multiple compressed data streams;
C. the composite module being embedded in FPGA combines described multiple compressed data streams.
In image compress processing method of the present invention, to cut apart module and carry out image reading taking picture element matrix as unit, described steps A comprises:
A1. cutting apart module adopts multiplex mode poll to detect multiple compression modules whether to have read request, if corresponding compression module has read request, perform step A2;
A2. give picture element matrix to be read in the corresponding image block of the corresponding compression module address in memory according to the big or small dispensed of the quantity of compression module and picture element matrix;
A3. read corresponding picture element matrix according to calculated address, and read picture element matrix is distributed to corresponding compression module.
In image compress processing method of the present invention, in described step B, each compression module compresses processing according to the compression standard of JPEG to each image block.
In image compress processing method of the present invention, in described step B, each compression module compresses to each image block the step of processing and comprises:
B1. corresponding image block is divided into multiple subgraphs, the width that the width of each subgraph is described image block, the height that the height of each subgraph is picture element matrix;
B2. successively each subgraph is compressed according to the compression standard of JPEG, to form the compressed data stream of each subgraph, and compress laggard horizontal reset at previous subgraph;
B3. the compressed data stream of each subgraph is buffered in the corresponding First Input First Output of respective image piece.
In image compress processing method of the present invention, described step C is:
C1. composite module is read by turns operation in order to the corresponding First Input First Output of each image block, and read compressed data stream is combined in order, and, in the middle of adjacent two compressed data streams, insert blank signal according to the separation standard redefining.
In image compress processing method of the present invention, before described step B1, also comprise:
B0. compression module judges whether the completely signal of queue of receiving that corresponding First Input First Output returns, if so, stops data compression; If not, perform step B1.
Implement technical scheme of the present invention, in the time large-sized image being compressed to processing, in FPGA inside, first this large-sized image is divided into multiple image blocks, then, image block after multiple image compression module are cut apart each respectively carries out parallelly compressed processing, to form multiple compressed data streams, finally by composite module, multiple compressed data streams is combined.Compared to existing technology, owing to compressing by hardware in FPGA, and FPGA possesses the features such as design flexibility is strong, computing ability is strong, simultaneously, the compression being walked abreast to cutting apart become multiple graph blocks by multiple compression modules, it is independent that multiple pressure channels keep, and do not interfere with each other, therefore, meet the compression requirement of large-size images, improved picture compression efficiency, and cost is low, system is simple.In addition, under different picture size requires, only need to change FPGA indoor design (determining as required the compression module of suitable quantity), and need not increase hardware cost.
Brief description of the drawings
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is the logic diagram of the large-sized image compression processing system embodiment mono-of the present invention;
Fig. 2 is the logic diagram of the large-sized image compression processing system embodiment bis-of the present invention;
Fig. 3 is the flow chart of the large-sized image compress processing method embodiment mono-of the present invention;
Fig. 4 is the flow chart of steps A preferred embodiment in Fig. 3;
Fig. 5 is the schematic diagram of cutting apart module reads image data of two passages;
Fig. 6 is the flow chart of step B preferred embodiment in Fig. 3;
Fig. 7 is two schematic diagrames that compression module compression is processed;
Fig. 8 is the form schematic diagram of the compressed data stream after combination.
Embodiment
The logic diagram of the large-sized image compression processing system embodiment mono-of the present invention as shown in Figure 1, this image compression processing system comprises FPGA10 and memory 20, and FPGA10 is embedded with cuts apart module 11, two parallel compression modules 12,12 ' and composite module 13.Wherein, memory 20 is for storing image data, and this image is large-sized image.Cut apart module 11 for reading pending image from memory 20, and this image be divided into two image blocks, and distribute to respectively this two compression modules 12,12 '.Compression module 12,12 ' for respectively distributed image block being compressed to processing, to form multiple compressed data streams, preferably, compression module 12,12 ' each image block is compressed to processing according to the compression standard of JPEG.Composite module 13 is for combining multiple compressed data streams.Finally it should be noted that, the present invention does not limit the quantity of compression module, in other embodiments, the quantity of compression module also can be three, four, six, eight etc., correspondingly, cut apart module 11 read image is divided into three, four, six or eight image blocks, and distribute to respectively each compression module.In the time that the image compression processing system that uses this embodiment compresses processing to large-sized image, in FPGA inside, first this large-sized image is divided into multiple image blocks, then, image block after multiple image compression module are cut apart each respectively carries out parallelly compressed processing, to form multiple compressed data streams, finally by composite module, multiple compressed data streams are combined.Compared to existing technology, owing to compressing by hardware in FPGA, and FPGA possesses the features such as design flexibility is strong, computing ability is strong, simultaneously, the compression being walked abreast to cutting apart become multiple graph blocks by multiple compression modules, it is independent that multiple pressure channels keep, and do not interfere with each other, therefore, meet the compression requirement of large-size images, improved picture compression efficiency, and cost is low, system is simple.In addition, under different picture size requires, only need to change FPGA indoor design (determining as required the compression module of suitable quantity), and need not increase hardware cost.
Fig. 2 is the logic diagram of the large-sized image compression processing system embodiment bis-of the present invention, in this embodiment, memory is DDR(Double Data Rate, Double Data Rate synchronous DRAM) 21, and, compare the embodiment shown in Fig. 1, only, the image compression processing system of this embodiment also comprises interface module 30 to difference, and this interface module 30 is connected with FPGA10, and for outwards transmitting the compressed data stream after combination, this interface module 30 is for example Ethernet interface.
In a preferred embodiment of the large-sized image compression processing system of the present invention, the major function of cutting apart module is to coordinate chip external memory interface, compress the address of required data by accurate calculating, data are transferred out to compressed and multiplexed module rapidly and accurately.Therefore, the main design principle of cutting apart module is: determine port number M according to the quantity of compression module, the picture segmentation in memory is become to M piece, each passage is responsible for the data input of single compression module.Cut apart module simultaneously also by taking multiplex mode to read and write alternately the interface of single memory, and carry out image reading taking picture element matrix as unit, the inadequate situation of this interface more for port number and memory, can be well for multiple compression modules provide data.The read-write protocol of the interface based on to memory, the main feature of cutting apart module is: 1. the address of accurate computed image data, this is decided by compression module quantity and picture element matrix.2. pair individual interface time-sharing multiplex, this mainly relies on the reasonability of the design of internal state machine.
Then, multiple compression modules carry out piecemeal compression to image, accurately fast view data are compressed to processing according to the compression standard of JPEG.Large-scale sized image is carried out to piecemeal compression, and reconfigure and ensure to meet Joint Photographic Experts Group according to Joint Photographic Experts Group to obtaining data flow after compression.The cardinal principle of this compression method is: according to the separation standard that redefines of Joint Photographic Experts Group.Under this standard, a large size picture is divided into M piece according to the quantity M of compression module in column direction by image, and is assigned on different compression modules and processes.So be equivalent to that large-size images is divided into several image blocks and compress, the 1/M that each image block width (width) is original image, highly (height) is constant.For single compression module, it is responsible for the compression of a corresponding image block.In one embodiment, an image block is divided into multiple subgraphs, according to redefining separation standard, single compression module is at every turn using being of a size of the height that width*8(8 is picture element matrix) subgraph compress as a pictures, between data flow after every subgraph compresses, insert blank signal, with reset (RST), after compression is processed, by respectively independently the compressed data stream of subgraph reconfigure the compressed data stream that becomes original image, and redefine at JPEG under the guarantee of separation standard and can normally show.
Fig. 3 is the flow chart of the large-sized image compress processing method embodiment mono-of the present invention, and this image compress processing method comprises:
A. the module of cutting apart being embedded in FPGA reads pending image from memory, and described image is divided into multiple image blocks, and distributes to respectively the multiple compression modules that are embedded in FPGA;
B. many parallel compression modules compress processing to distributed image block respectively, to form multiple compressed data streams;
C. the composite module being embedded in FPGA combines described multiple compressed data streams.
Fig. 4 is the flow chart of steps A preferred embodiment in Fig. 3, and this steps A specifically comprises:
A1. cutting apart module adopts multiplex mode poll to detect multiple compression modules whether to have read request, if corresponding compression module has read request, perform step A2; If not, repeated execution of steps A1;
A2. give picture element matrix to be read in the corresponding image block of the corresponding compression module address in memory according to the big or small dispensed of the quantity of compression module and picture element matrix, it should be noted that at this, in conjunction with Fig. 5, cut apart module read data from memory and read taking picture element matrix as unit, picture element matrix is for example: 16*8,8*8;
A3. read corresponding picture element matrix according to calculated address, and read picture element matrix is distributed to corresponding compression module.
Finally it should be noted that, by the multiplexing mode of this interface mode successively by the original image in memory (for example cut apart module, in 640*480) taking picture element matrix as unit is read into corresponding compression module, like this, the multiple picture element matrixs that read in each compression module have just formed corresponding image block.If original image is 640*480, the quantity of compression module is four, through cut apart module by column split after, the image block that each compression module distributes is 160*480.
Implement the technical scheme of this embodiment, at memory (for example, DDR) interface limited amount or the more situation of passage, according to the quantity of compression module, image being carried out to piecemeal reads, and keep independently fetch channel, each passage (for example has general data interaction signal, compression module sends read request and cuts apart module according to read request read data from memory to memory by cutting apart module) as shaking hands, ensure that data do not enter corresponding compression module in order taking picture element matrix as unit disorderly, the ASIC interface of such Interface design in compared to existing technology, do not need the buffer memory of the inner a large amount of memory space of design as image, greatly reduce the resource occupation amount of design.
In step B, each compression module can compress processing to each image block according to the compression standard of JPEG.
Fig. 6 is the flow chart of step B preferred embodiment in Fig. 3, and in step B, each compression module compresses to each image block the step of processing and specifically comprises:
B1. corresponding image block is divided into multiple subgraphs, the width of each subgraph is the width of described image block, and the height that the height of each subgraph is picture element matrix, in conjunction with Fig. 7, for example, original image is 640*480, and picture element matrix is 16*8, and the quantity of compression module is two, two image block F1, F2 cutting apart are 320*480, by image block F1 be divided into multiple subgraph F11 ..., F1n, by image block F2 be divided into multiple subgraph F21 ..., F2n, each subgraph is 320*8;
B2. successively each subgraph is compressed according to the compression standard of JPEG, to form the compressed data stream of each subgraph, and compress laggard horizontal reset at previous subgraph, to ensure that next subgraph can normally compress, by this way until this single compression module is complete to corresponding image block compression;
B3. the compressed data stream of each subgraph is buffered in the corresponding First Input First Output of respective image piece, it should be noted that at this, the corresponding First Input First Output of each image block, the compressed data stream, forming after each subgraph compression of this image block is put into the corresponding First Input First Output of this image block.
In Fig. 3, in step C preferred embodiment, this step C is specially:
Composite module is read by turns operation in order to the corresponding First Input First Output of each image block, and read compressed data stream is combined in order, and, in the middle of adjacent two compressed data streams, insert blank signal according to the separation standard redefining, in conjunction with Fig. 8, RST0, RST1 ..., RST2*(n-1) be inserted blank signal, and, at head insert head fileinfo, insert end mark EOI at afterbody, like this, completed the compression of a two field picture.And then, according to the method described above, then carry out the compression of subsequent frame.
In addition, if First Input First Output is full, and corresponding compression module is still carrying out data compression, can cause like this loss of data, for avoiding the generation of this situation, preferably, and can be before step B1, execution step B0:
B0. compression module judges whether to receive the completely signal of queue that corresponding First Input First Output returns, and if so, stops data compression, until this queue is by read operation, " expire " signal is zero, again proceeds to compress; If not, perform step B1.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various changes, combination and variation.Within the spirit and principles in the present invention all, any amendment of doing, be equal to replacement, improvement etc., within all should being included in claim scope of the present invention.
Claims (10)
1. a large-sized image compression processing system, comprises the memory for storing image data, it is characterized in that, described image compression processing system also comprises FPGA, and described FPGA is embedded with:
Cut apart module, for reading pending image from described memory, and described image is divided into multiple image blocks, and distribute to respectively multiple compression modules;
Multiple parallel compression modules, for respectively distributed image block being compressed to processing, to form multiple compressed data streams;
Composite module, for combining described multiple compressed data streams.
2. image compression processing system according to claim 1, is characterized in that, described memory is DDR.
3. image compression processing system according to claim 1, is characterized in that, described compression module compresses processing according to the compression standard of JPEG to each image block.
4. image compression processing system according to claim 1, is characterized in that, described image compression processing system also comprises the interface module being connected with described FPGA, for outwards transmitting the compressed data stream after combination.
5. a large-sized image compress processing method, is characterized in that, comprising:
A. the module of cutting apart being embedded in FPGA reads pending image from memory, and described image is divided into multiple image blocks, and distributes to respectively the multiple compression modules that are embedded in FPGA;
B. many parallel compression modules compress processing to distributed image block respectively, to form multiple compressed data streams;
C. the composite module being embedded in FPGA combines described multiple compressed data streams.
6. image compress processing method according to claim 5, is characterized in that, cuts apart module and carries out image reading taking picture element matrix as unit, and described steps A comprises:
A1. cutting apart module adopts multiplex mode poll to detect multiple compression modules whether to have read request, if corresponding compression module has read request, perform step A2;
A2. give picture element matrix to be read in the corresponding image block of the corresponding compression module address in memory according to the big or small dispensed of the quantity of compression module and picture element matrix;
A3. read corresponding picture element matrix according to calculated address, and read picture element matrix is distributed to corresponding compression module.
7. image compress processing method according to claim 5, is characterized in that, in described step B, each compression module compresses processing according to the compression standard of JPEG to each image block.
8. image compress processing method according to claim 5, is characterized in that, in described step B, each compression module compresses to each image block the step of processing and comprises:
B1. corresponding image block is divided into multiple subgraphs, the width that the width of each subgraph is described image block, the height that the height of each subgraph is picture element matrix;
B2. successively each subgraph is compressed according to the compression standard of JPEG, to form the compressed data stream of each subgraph, and compress laggard horizontal reset at previous subgraph;
B3. the compressed data stream of each subgraph is buffered in the corresponding First Input First Output of respective image piece.
9. image compress processing method according to claim 8, is characterized in that, described step C is:
Composite module is read by turns operation in order to the corresponding First Input First Output of each image block, and read compressed data stream is combined in order, and, in the middle of adjacent two compressed data streams, insert blank signal according to the separation standard redefining.
10. image compress processing method according to claim 9, is characterized in that, before described step B1, also comprises:
B0. compression module judges whether the completely signal of queue of receiving that corresponding First Input First Output returns, if so, stops data compression; If not, perform step B1.
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