CN104122925B - A kind of internal electrical source generating circuit being applied to Power Management Unit - Google Patents
A kind of internal electrical source generating circuit being applied to Power Management Unit Download PDFInfo
- Publication number
- CN104122925B CN104122925B CN201410345542.2A CN201410345542A CN104122925B CN 104122925 B CN104122925 B CN 104122925B CN 201410345542 A CN201410345542 A CN 201410345542A CN 104122925 B CN104122925 B CN 104122925B
- Authority
- CN
- China
- Prior art keywords
- nmos pass
- voltage
- pass transistor
- control signal
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention provides a kind of internal electrical source generating circuit being applied to Power Management Unit, comprising: internal electric source, for receiving the output voltage of input power, and produce internal supply voltage for other circuit modules and power; Reference voltage current module, for receiving described internal supply voltage, produces reference voltage and reference current; Overvoltage detection module, for according to the output voltage of input power and described reference voltage, produces the first control signal, the second control signal and the 3rd control signal; Linear voltage regulator, for controlling according to described first control signal, the second control signal and the 3rd control signal, when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator be operated in safe operating voltage range, and forbid that described linear voltage regulator is to other module for power supply.Invention increases the security of Power Management Unit application, be more suitable for various different application conditions.
Description
Technical field
The present invention relates to technical field of power management, particularly relate to a kind of internal electrical source generating circuit being applied to Power Management Unit.
Background technology
As everyone knows, Power Management Unit (PMU) needs various protection circuit, such as overvoltage protection usually, overcurrent protection, under-voltage protection and short-circuit protection etc.The input powers such as adapter, USB power source and battery are Power Management Unit when powering, the situation of the voltage that the output voltage being easy to the Power Management Unit selected by occurring can bear higher than this Power Management Unit.When Power Management Unit is connected to the too high input power of output voltage, the too high output voltage that this input power provides can puncture the electronic component on Power Management Unit chip, causes this electronic component generation excessive pressure damages.
Such as, the input power used is adapter, if the wrong adapter of user, the output voltage of the adapter causing user to select is far above the output voltage of the adapter that should select.Thus the output voltage of this adapter is too high, exceed the voltage that connected Power Management Unit can be born, this too high input voltage can puncture the electronic component on Power Management Unit chip, causes this electronic component generation excessive pressure damages.
Summary of the invention
In view of this, the invention provides a kind of internal electrical source generating circuit being applied to Power Management Unit, improve the security of Power Management Unit application, be more suitable for various different application conditions.
The present invention also provides a kind of internal electrical source generating circuit being applied to Power Management Unit, comprising:
Internal power supply, for receiving the output voltage of input power, and produces internal supply voltage for other circuit modules and powers;
Reference voltage current module, for receiving described internal supply voltage, produces reference voltage and reference current;
Overvoltage detection module, for according to the output voltage of input power and described reference voltage, produces the first control signal, the second control signal and the 3rd control signal;
Linear voltage regulator, for controlling according to described first control signal, the second control signal and the 3rd control signal, when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator be operated in safe operating voltage range, and forbid that described linear voltage regulator is to other module for power supply.
Further, linear voltage regulator of the present invention is not also for exceeding the overvoltage detection threshold of setting during at the output voltage of input power, make described linear voltage regulator to other module for power supply.
Further, the present invention also comprises between an output voltage being connected to described input power and ground, and the first electric capacity of voltage regulation of its noise of filtering.
Further, internal power supply of the present invention comprises the first nmos pass transistor, second nmos pass transistor, 3rd nmos pass transistor, 4th nmos pass transistor, and first resistance and the second resistance, the drain and gate of described first nmos pass transistor all links the output voltage of described input power, the source electrode of described first nmos pass transistor and substrate link the drain and gate of described second nmos pass transistor, the source electrode of described second nmos pass transistor and substrate link one end of described first resistance, the other end of described first resistance links one end of described second resistance, the other end of described second resistance links the drain and gate of described 3rd nmos pass transistor, the source electrode of described 3rd nmos pass transistor and substrate link the drain and gate of described 4th nmos pass transistor, source electrode and the substrate of described 4th nmos pass transistor link ground.
Further, the present invention also comprise one be connected to the internal supply voltage of described internal power supply and between ground, and the second electric capacity of voltage regulation of its noise of filtering.
Further, overvoltage detection module of the present invention comprises the first voltage divider, overvoltage comparator and wave filter, described first voltage divider receives the output voltage of input power, described overvoltage comparator is sent to after carrying out dividing potential drop, the output voltage of the described input power received compares with the described reference voltage received by described overvoltage comparator, described wave filter carries out filtering to the output signal of described overvoltage comparator, exports the first control signal, the second control signal and the 3rd control signal.
Further, first voltage divider of the present invention comprises the 3rd resistance and the 4th resistance, the output voltage of input power described in one termination of described 3rd resistance, described 4th resistance of other end serial connection, the other end ground connection of described 4th resistance, the output voltage of described input power sends to the input end of described overvoltage comparator after the pressure drop of described 3rd resistance.
Further, linear voltage regulator of the present invention comprises error amplifier, level translator, PMOS transistor, second voltage divider, first switch and second switch, between the output voltage that described level translator is connected to described input power and ground, described error amplifier receives feedback voltage and reference voltage, output signal is to described level translator and the first switch respectively, described first control signal and the second control signal send to described level translator to control the level conversion of described level translator respectively, described 3rd control signal controls the disconnection of described first switch or closes, and the control end of described error amplifier is connected through described first switch, described 3rd control signal controls the disconnection of described second switch or closes, and the drain electrode of described PMOS transistor is connected through described second switch, described second switch also receives the internal supply voltage of described internal power supply, the source electrode of described PMOS transistor is connected the output voltage of described input power with substrate, the grid of described PMOS transistor connects described level translator, voltage between drain electrode and ground is as the output voltage of described linear voltage regulator, described output voltage through described second voltage divider as feedback voltage.
Further, level translator of the present invention comprises the 5th nmos pass transistor, 6th nmos pass transistor, 7th nmos pass transistor, 8th nmos pass transistor, 9th nmos pass transistor and the 5th resistance, one end of described 5th resistance connects the output voltage of described input power, the other end connects grid and the drain electrode of described 5th nmos pass transistor, the source electrode of described 5th nmos pass transistor is connected the drain electrode of described 6th nmos pass transistor with substrate, the grid of described 6th nmos pass transistor connects the output voltage of described error amplifier, the source electrode of described 6th nmos pass transistor is connected the drain electrode of described 7th nmos pass transistor with substrate, the source electrode of described 7th nmos pass transistor and Substrate ground, grid connects the first control signal, the drain electrode of described 8th nmos pass transistor connects source electrode and the substrate of described 6th nmos pass transistor, the source electrode of described 8th nmos pass transistor connects the drain electrode of the 9th nmos pass transistor, the grid of described 8th nmos pass transistor connects the bias voltage of described reference voltage current module output, the substrate of described 8th nmos pass transistor connects the source electrode of described 9th nmos pass transistor and substrate and ground connection, the grid of described 9th nmos pass transistor connects described second control signal.When the output voltage of input power does not exceed overvoltage detection threshold, described first control signal and the 3rd control signal are high level, and described second control signal is low level, the 7th nmos pass transistor conducting, 9th nmos pass transistor cut-off, the first switch and second switch disconnect; When the output voltage of input power exceedes overvoltage detection threshold, the first control signal and the 3rd control signal are low level, and the second control signal is high level, the 7th nmos pass transistor cut-off, and the 9th nmos pass transistor conducting, the first switch and second switch close.
Further, second voltage divider of the present invention comprises the 6th resistance and the 7th resistance, one end of described 6th resistance connects the internal supply voltage of described internal power supply through described second switch, the output voltage of described linear voltage regulator sends to described error amplifier through the pressure drop of described 6th resistance as feedback voltage, the other end of described 6th resistance connects described 7th resistance, the other end ground connection of described 7th resistance.
Further, the present invention also comprises a filter capacitor, between the output voltage being connected to described linear voltage regulator and ground.
From above technical scheme, the control signal that overvoltage detection module of the present invention produces according to the output voltage of input power and described reference voltage, control linear voltage stabilizer is when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator be operated in safe operating voltage range, and forbid that described linear voltage regulator is to other module for power supply.Like this, can when power-supply system be connected to the too high input power of output voltage, the electronic component on protection power source administrative unit chip, prevents electronic component by excessive pressure damages.Invention increases the security of Power Management Unit application, be more suitable for various different application conditions.
Accompanying drawing explanation
Fig. 1 is the circuit diagram that the present invention is applied to the internal electrical source generating circuit of Power Management Unit;
The circuit diagram of Fig. 2 overvoltage detection module of the present invention.
Embodiment
The control signal that overvoltage detection module of the present invention produces according to the output voltage of input power and described reference voltage, control linear voltage stabilizer is when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator be operated in safe operating voltage range, and forbid that described linear voltage regulator is to other module for power supply.Like this, can when power-supply system be connected to the too high input power of output voltage, the electronic component on protection power source administrative unit chip, prevents electronic component by excessive pressure damages.Invention increases the security of Power Management Unit application, be more suitable for various different application conditions.
Specific implementation of the present invention is further illustrated below in conjunction with accompanying drawing of the present invention.
See Fig. 1, the invention provides a kind of internal electrical source generating circuit being applied to Power Management Unit, comprising:
Internal power supply 11, for receiving the output voltage DCIN/USBIN of input power, and produces internal supply voltage VL for other circuit modules and powers.
Wherein, input power DCIN/USBIN can be adapter, USB power source and battery etc., and in order to noise decrease interference, the present invention also comprises between an output voltage being connected to described input power and ground, and the first electric capacity of voltage regulation C1 of its noise of filtering.This first electric capacity of voltage regulation C1 is in parallel with described internal power supply 11.
Particularly, described internal power supply 11 comprises the first nmos pass transistor N10, second nmos pass transistor N11, 3rd nmos pass transistor N12, 4th nmos pass transistor N13, and the first resistance R11 and the second resistance R12, the drain and gate of described first nmos pass transistor N10 all links the output voltage DCIN/USBIN of described input power, the source electrode of described first nmos pass transistor N10 and substrate link the drain and gate of described second nmos pass transistor N11, the source electrode of described second nmos pass transistor N11 and substrate link one end of described first resistance R11, the other end of described first resistance R11 links one end of described second resistance R12, the other end of described second resistance R12 links the drain and gate of described 3rd nmos pass transistor N12, the source electrode of described 3rd nmos pass transistor N12 and substrate link the drain and gate of described 4th nmos pass transistor N13, source electrode and the substrate of described 4th nmos pass transistor N13 link ground.
When threshold voltage sum lower than the threshold voltage of the 3rd nmos pass transistor N12 and the 4th nmos pass transistor N13 of the voltage of input power DCIN/USBIN, the internal supply voltage VL of described input power is 0.When threshold voltage sum higher than the threshold voltage of the 3rd nmos pass transistor N12 and the 4th nmos pass transistor N13 of the voltage of input power DCIN/USBIN, the internal supply voltage VL of described input power equals DCIN/USBIN*R12/ (R11+R12), if the resistance of the first resistance R11 equals the resistance of the second resistance R12, the voltage of the internal supply voltage VL of described input power equals 1/2*DCIN/USBIN, like this, if the nmos pass transistor voltage breakdown that the voltage of input power DCIN/USBIN is less than 2 times, the voltage of the internal supply voltage VL of described input power is just less than nmos pass transistor voltage breakdown, device in circuit is all operated within safe operating voltage.Meanwhile, the internal supply voltage VL of described input power is also used for as other circuit modules are powered.
Further, in order to noise decrease interference, also comprise one and be connected between the internal supply voltage VL of described internal power supply and ground, and the second electric capacity of voltage regulation of its noise of filtering, it is used for stable internal supply voltage VL.
Reference voltage current module 12, for receiving described internal supply voltage VL, produces reference voltage and reference current.
Overvoltage detection module 13, for according to the output voltage of input power and described reference voltage, produce the first control signal (control signal1), the second control signal (control signal2) and the 3rd control signal (control signal3).
Referring to Fig. 2, described overvoltage detection module 13 comprises the first voltage divider 131, overvoltage comparator 132 and wave filter 133, described first voltage divider 131 receives the output voltage of input power, described overvoltage comparator 132 is sent to after carrying out dividing potential drop, the described voltage received compares with the described reference voltage received by described overvoltage comparator 132, the output signal of described wave filter 133 to described overvoltage comparator 132 carries out filtering, exports the first control signal, the second control signal and the 3rd control signal.
Described first voltage divider 131 comprises the 3rd resistance R13 and the 4th resistance R14, the output voltage of input power described in one termination of described 3rd resistance R13, the described 4th resistance R14 of other end serial connection, the other end ground connection of described 4th resistance R14, the output voltage of described input power sends to the input end of described overvoltage comparator 132 after the pressure drop of described 3rd resistance R13.
Linear voltage regulator 14 (LDO), for controlling according to described first control signal, the second control signal and the 3rd control signal, when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator 14 be operated in safe operating voltage range, and forbid that described linear voltage regulator 14 is to other module for power supply.
Described overvoltage detection threshold is set with experience as required by those of ordinary skill in the art.
In one exemplary embodiment, linear voltage regulator 14 of the present invention comprises error amplifier (EA) 141, level translator 142, PMOS transistor P1, second voltage divider 143, first switch (swich1) 144 and second switch (swich2) 145, between the output voltage that described level translator 142 is connected to described input power and ground, described error amplifier 141 receives feedback voltage and reference voltage, output signal is to described level translator 142 and the first switch 144 respectively, described first control signal and the second control signal send to described level translator 142 respectively, control the level conversion of described level translator 142, described 3rd control signal controls the disconnection of described first switch 144 or closes, and the control end of described error amplifier 141 is connected through described first switch 144, described first switch 144 also receives the internal supply voltage VL of described internal power supply 11, described 3rd control signal controls the disconnection of described second switch 145 or closes, and the drain electrode of described PMOS transistor P1 is connected through described second switch 145, described second switch 145 also receives the output voltage VL of described internal power supply 11, the source electrode of described PMOS transistor is connected the output voltage of described input power with substrate, the grid of described PMOS transistor P1 connects described level translator 142, voltage between its drain electrode and ground is as the output voltage VSYS of described linear voltage regulator 14, described output voltage VSYS through described second voltage divider 143 dividing potential drop as feedback voltage.
Wherein, described level translator 142 comprises the 5th nmos pass transistor N1, 6th nmos pass transistor N2, 7th nmos pass transistor N3, 8th nmos pass transistor N4, 9th nmos pass transistor N5 and the 5th resistance R2, one end of described 5th resistance R2 connects the output voltage of described input power, the other end connects grid and the drain electrode of described 5th nmos pass transistor N1, the source electrode of described 5th nmos pass transistor N1 is connected the drain electrode of described 6th nmos pass transistor N2 with substrate, the grid of described 6th nmos pass transistor N2 connects the output voltage of described error amplifier 141, the source electrode of described 6th nmos pass transistor N2 is connected the drain electrode of described 7th nmos pass transistor N3 with substrate, the source electrode of described 7th nmos pass transistor N3 and Substrate ground, grid connects the first control signal, the drain electrode of described 8th nmos pass transistor N4 connects source electrode and the substrate of described 6th nmos pass transistor N2, the source electrode of described 8th nmos pass transistor N4 connects the drain electrode of the 9th nmos pass transistor N5, the grid of described 8th nmos pass transistor N4 connects the bias voltage of described reference voltage current module 12 output, the substrate of described 8th nmos pass transistor N4 connects the source electrode of described 9th nmos pass transistor N5 and substrate and ground connection, the grid of described 9th nmos pass transistor N5 connects described second control signal.
In addition, described second voltage divider comprises the 6th resistance R3 and the 7th resistance R4, one end of described 6th resistance R3 connects the internal supply voltage VL of described input power 11 through described second switch 145, the output voltage of described linear voltage regulator 14 sends to described error amplifier 141 through the pressure drop of described 6th resistance R3 as feedback voltage, the other end of described 6th resistance R3 connects described 7th resistance R4, the other end ground connection of described 7th resistance R4.
Preferably, the present invention also comprises a filter capacitor C3, between the output voltage being connected to described linear voltage regulator 14 and ground, and the noise in the output voltage of linear voltage regulator 14 described in filtering.
If the voltage of input power DCIN/USBIN does not exceed the overvoltage detection threshold of setting, overvoltage detection module 13 can not provide overvoltage signal, first control signal and the 3rd control signal are all high level, second control signal is low level, 7th nmos pass transistor N3 conducting, 9th nmos pass transistor N5 ends, and the first switch and second switch disconnect.If the voltage of input power DCIN/USBIN exceedes the overvoltage detection threshold of setting, overvoltage detection module 13 provides overvoltage signal, first control signal and the 3rd control signal are all low levels, second control signal is high level, 7th nmos pass transistor N3 ends, 9th nmos pass transistor N5 conducting, the first switch and second switch close.Now, electric current flows through the 5th resistance R2,5th nmos pass transistor N1, the 6th nmos pass transistor N2, the 8th nmos pass transistor N4, the 9th nmos pass transistor N5 are to ground, and this electric current ensures that the pressure reduction on the 5th resistance R2 is less than the threshold voltage of PMOS transistor P1, ensure PMOS transistor P1 cut-off.Meanwhile, first switch closes, the grid of the 6th nmos pass transistor N2 is moved to internal supply voltage VL, voltage between the drain and gate making the 6th nmos pass transistor N2 is within safe voltage scope, voltage between the source electrode of the 6th nmos pass transistor N2 and grid is also within safe voltage scope, so the 6th nmos pass transistor N2 can not be damaged.The source voltage of the 6th nmos pass transistor N2 is less than internal supply voltage VL, so the 7th nmos pass transistor N3, the 8th nmos pass transistor N4, the 9th nmos pass transistor N5 are operated within safe operating voltage range, all can not damage.Meanwhile, overvoltage protection signal closes other modules of being powered by the output voltage VSYS of described linear voltage regulator 14.Second switch closes, and the drain electrode of PMOS transistor P1 is moved to internal supply voltage VL, makes the drain-source voltage of PMOS transistor P1 within range of safety operation.
When the voltage drop of input power DCIN/USBIN is to lower than overvoltage detection threshold, after overvoltage detection module 12 detects, the first control signal and the 3rd control signal become high level, and the second control signal becomes low level, then second switch disconnects, and the first switch also disconnects.7th nmos pass transistor N3 conducting, the 9th nmos pass transistor N5 ends.Described linear voltage regulator 14 normally works afterwards, and the voltage of adjustment input power DCIN/USBIN produces output voltage VSYS, wait output voltage VSYS normal after, control signal is enable by output voltage VSYS other module as power supply.
From the above, the present invention can when power-supply system be connected to the too high input power of output voltage, and the electronic component on protection power source administrative unit chip, prevents electronic component by excessive pressure damages.Invention increases the security of Power Management Unit application, be more suitable for various different application conditions.
In specific implementation of the present invention, described linear voltage regulator 14 is not also for exceeding the overvoltage detection threshold of setting during at the output voltage of input power, make described linear voltage regulator 14 to other module for power supply.
Therefore, the present invention when the output voltage of input power does not exceed the overvoltage detection threshold of setting, normally to other module for power supply.But; when the output voltage of input power exceedes the overvoltage detection threshold of setting; carry out overvoltage protection; overvoltage detection module 13 produces control signal; the inner member of control linear voltage stabilizer 14 is operated in safe operating voltage range, and forbids that described linear voltage regulator 14 is to other module for power supply.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within the scope of protection of the invention.
Claims (11)
1. be applied to an internal electrical source generating circuit for Power Management Unit, it is characterized in that, comprising:
Internal power supply, for receiving the output voltage of input power, and produces internal supply voltage for other circuit modules and powers;
Reference voltage current module, for receiving described internal supply voltage, produces reference voltage and reference current;
Overvoltage detection module, for according to the output voltage of input power and described reference voltage, produces the first control signal, the second control signal and the 3rd control signal;
Linear voltage regulator, for controlling according to described first control signal, the second control signal and the 3rd control signal, when the output voltage of input power exceedes the overvoltage detection threshold of setting, make the inner member of linear voltage regulator be operated in safe operating voltage range, and forbid that described linear voltage regulator is to other module for power supply.
2. internal electrical source generating circuit according to claim 1, is characterized in that, described linear voltage regulator is not also for exceeding the overvoltage detection threshold of setting during at the output voltage of input power, makes described linear voltage regulator to other module for power supply.
3. internal electrical source generating circuit according to claim 1, is characterized in that, also comprises between an output voltage being connected to described input power and ground, and the first electric capacity of voltage regulation of its noise of filtering.
4. internal electrical source generating circuit according to claim 1, it is characterized in that, described internal power supply comprises the first nmos pass transistor, second nmos pass transistor, 3rd nmos pass transistor, 4th nmos pass transistor, and first resistance and the second resistance, the drain and gate of described first nmos pass transistor all links the output voltage of described input power, the source electrode of described first nmos pass transistor and substrate link the drain and gate of described second nmos pass transistor, the source electrode of described second nmos pass transistor and substrate link one end of described first resistance, the other end of described first resistance links one end of described second resistance, the other end of described second resistance links the drain and gate of described 3rd nmos pass transistor, the source electrode of described 3rd nmos pass transistor and substrate link the drain and gate of described 4th nmos pass transistor, source electrode and the substrate of described 4th nmos pass transistor link ground.
5. internal electrical source generating circuit according to claim 4, is characterized in that, also comprises between an internal supply voltage being connected to described internal power supply and ground, and the second electric capacity of voltage regulation of its noise of filtering.
6. internal electrical source generating circuit according to claim 1, it is characterized in that, described overvoltage detection module comprises the first voltage divider, overvoltage comparator and wave filter, described first voltage divider receives the output voltage of input power, described overvoltage comparator is sent to after carrying out dividing potential drop, the output voltage of the described input power received compares with the described reference voltage received by described overvoltage comparator, described wave filter carries out filtering to the output signal of described overvoltage comparator, exports the first control signal, the second control signal and the 3rd control signal.
7. internal electrical source generating circuit according to claim 6, it is characterized in that, described first voltage divider comprises the 3rd resistance and the 4th resistance, the output voltage of input power described in one termination of described 3rd resistance, described 4th resistance of other end serial connection, the other end ground connection of described 4th resistance, the output voltage of described input power sends to the input end of described overvoltage comparator after the pressure drop of described 3rd resistance.
8. internal electrical source generating circuit according to claim 1, it is characterized in that, described linear voltage regulator comprises error amplifier, level translator, PMOS transistor, second voltage divider, first switch and second switch, between the output voltage that described level translator is connected to described input power and ground, described error amplifier receives feedback voltage and reference voltage, output signal is to described level translator and the first switch respectively, described first control signal and the second control signal send to described level translator to control the level conversion of described level translator respectively, described 3rd control signal controls the disconnection of described first switch or closes, and the control end of described error amplifier is connected through described first switch, described first switch also receives the internal supply voltage of described internal power supply, described 3rd control signal controls the disconnection of described second switch or closes, and the drain electrode of described PMOS transistor is connected through described second switch, described second switch also receives the internal supply voltage of described internal power supply, the source electrode of described PMOS transistor is connected the output voltage of described input power with substrate, the grid of described PMOS transistor connects described level translator, voltage between drain electrode and ground is as the output voltage of described linear voltage regulator, described output voltage through described second voltage divider as feedback voltage.
9. internal electrical source generating circuit according to claim 8, it is characterized in that, described level translator comprises the 5th nmos pass transistor, 6th nmos pass transistor, 7th nmos pass transistor, 8th nmos pass transistor, 9th nmos pass transistor and the 5th resistance, one end of described 5th resistance connects the output voltage of described input power, the other end connects grid and the drain electrode of described 5th nmos pass transistor, the source electrode of described 5th nmos pass transistor is connected the drain electrode of described 6th nmos pass transistor with substrate, the grid of described 6th nmos pass transistor connects the output voltage of described error amplifier, the source electrode of described 6th nmos pass transistor is connected the drain electrode of described 7th nmos pass transistor with substrate, the source electrode of described 7th nmos pass transistor and Substrate ground, grid connects the first control signal, the drain electrode of described 8th nmos pass transistor connects source electrode and the substrate of described 6th nmos pass transistor, the source electrode of described 8th nmos pass transistor connects the drain electrode of the 9th nmos pass transistor, the grid of described 8th nmos pass transistor connects the bias voltage of described reference voltage current module output, the substrate of described 8th nmos pass transistor connects the source electrode of described 9th nmos pass transistor and substrate and ground connection, the grid of described 9th nmos pass transistor connects described second control signal, when the output voltage of input power does not exceed overvoltage detection threshold, described first control signal and the 3rd control signal are high level, described second control signal is low level, 7th nmos pass transistor conducting, 9th nmos pass transistor cut-off, first switch and second switch disconnect, when the output voltage of input power exceedes overvoltage detection threshold, the first control signal and the 3rd control signal are low level, and the second control signal is high level, the 7th nmos pass transistor cut-off, and the 9th nmos pass transistor conducting, the first switch and second switch close.
10. internal electrical source generating circuit according to claim 9, it is characterized in that, described second voltage divider comprises the 6th resistance and the 7th resistance, one end of described 6th resistance connects the internal supply voltage of described internal power supply through described second switch, the output voltage of described linear voltage regulator sends to described error amplifier through the pressure drop of described 6th resistance as feedback voltage, the other end of described 6th resistance connects described 7th resistance, the other end ground connection of described 7th resistance.
11. internal electrical source generating circuits according to claim 10, is characterized in that, also comprise a filter capacitor, between the output voltage being connected to described linear voltage regulator and ground.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410345542.2A CN104122925B (en) | 2014-07-18 | 2014-07-18 | A kind of internal electrical source generating circuit being applied to Power Management Unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410345542.2A CN104122925B (en) | 2014-07-18 | 2014-07-18 | A kind of internal electrical source generating circuit being applied to Power Management Unit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104122925A CN104122925A (en) | 2014-10-29 |
CN104122925B true CN104122925B (en) | 2015-08-05 |
Family
ID=51768377
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410345542.2A Expired - Fee Related CN104122925B (en) | 2014-07-18 | 2014-07-18 | A kind of internal electrical source generating circuit being applied to Power Management Unit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104122925B (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019129607A (en) * | 2018-01-24 | 2019-08-01 | トヨタ自動車株式会社 | Power supply controller |
CN108880194A (en) * | 2018-06-22 | 2018-11-23 | 上海艾为电子技术股份有限公司 | A kind of voltage transmission circuit |
CN109087613A (en) | 2018-10-29 | 2018-12-25 | 惠科股份有限公司 | Overcurrent protection circuit and display driving device |
CN110647200A (en) * | 2019-10-09 | 2020-01-03 | 苏州浪潮智能科技有限公司 | Voltage regulating circuit and voltage regulating method thereof |
CN112181041B (en) * | 2020-10-26 | 2022-05-17 | 中国电子科技集团公司第十四研究所 | Boosting power supply and input/output circuit based on MOS (Metal oxide semiconductor) transistor |
CN113783160B (en) * | 2021-11-11 | 2022-04-01 | 浙江大学 | Undervoltage protection circuit and power module |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7570035B2 (en) * | 2007-08-01 | 2009-08-04 | Zerog Wireless, Inc. | Voltage regulator with a hybrid control loop |
CN102279613B (en) * | 2011-06-21 | 2012-05-30 | 江苏晟楠电子科技有限公司 | Linear voltage stabilizer with current-limiting short circuit protection |
CN202372877U (en) * | 2011-12-27 | 2012-08-08 | 无锡华润矽科微电子有限公司 | Circuit structure capable of realizing power drive control and linear voltage stabilization |
CN202404470U (en) * | 2011-12-29 | 2012-08-29 | 深圳市芯海科技有限公司 | Power management circuit and electronic body scale |
CN203520222U (en) * | 2013-11-12 | 2014-04-02 | 北京经纬恒润科技有限公司 | LDO (low dropout regulator) |
CN103606895B (en) * | 2013-12-06 | 2016-01-20 | 万科思自控信息(中国)有限公司 | A kind of overvoltage turn-off protection circuit |
-
2014
- 2014-07-18 CN CN201410345542.2A patent/CN104122925B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN104122925A (en) | 2014-10-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104122925B (en) | A kind of internal electrical source generating circuit being applied to Power Management Unit | |
CN103545803B (en) | Device power supply (DPS) interface circuit protection device | |
CN107785990B (en) | Backup power control circuit | |
US8559151B2 (en) | Enhanced charger over voltage protection FET | |
KR101784740B1 (en) | Battery protection circuit and battery pack including same | |
JP5792552B2 (en) | Power supply control system and semiconductor integrated circuit | |
US20140111899A1 (en) | Protecting circuit | |
US9977475B2 (en) | Over voltage protection for a communication line of a bus | |
CN105591538B (en) | Universal serial bus power transfering device | |
CN103066655A (en) | Monitoring circuit of battery pack voltage | |
CN203522124U (en) | Short circuit protection circuit and DC power supplying device | |
US9041343B2 (en) | System and method for protecting a power consuming circuit | |
CN101976823B (en) | Undervoltage protection circuit for battery | |
CN104753034B (en) | Electronic device and its charge protector | |
CN105471018A (en) | Charging/discharging control device and battery device | |
CN203674691U (en) | Undervoltage and overvoltage protection circuit for power supply circuit | |
CN106253455B (en) | A kind of power supply circuit | |
CN106033240A (en) | Interface power supply circuit | |
CN104218529A (en) | Power switching circuit and electronic device | |
CN108141030B (en) | Protect circuit | |
CN104660229A (en) | PWM modulation device and output power limiting circuit thereof | |
CN105990330A (en) | Electrostatic discharge protection device | |
CN204681073U (en) | Data and charging coffret protective circuit | |
CN207652024U (en) | A kind of short-circuit protection detection circuit | |
CN104882869A (en) | Mobile device data interface protective circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150805 Termination date: 20160718 |