CN104122282A - Circuit tracing using a focused ion beam - Google Patents
Circuit tracing using a focused ion beam Download PDFInfo
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- CN104122282A CN104122282A CN201410164753.6A CN201410164753A CN104122282A CN 104122282 A CN104122282 A CN 104122282A CN 201410164753 A CN201410164753 A CN 201410164753A CN 104122282 A CN104122282 A CN 104122282A
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- integrated circuit
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/303—Contactless testing of integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Analysing Materials By The Use Of Radiation (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Methods and systems for tracing circuitry on integrated circuits using focused ion beam based imaging techniques. A first component or node on an integrated circuit is coupled to a second component or node on the same integrated circuit. After an external bias is applied to the first component or node, a focused ion beam is applied to the integrated circuit and an image is taken using an electron detector. The features or components on the integrated circuit which are coupled to the second component or node will show up in high contrast on the resulting image. The method may also involve applying a bias to a node or component and then using focused ion beam imaging techniques (through an electron detector) to arrive at an image of the integrated circuit. Components coupled to the node will appear in high contrast in the resulting image.
Description
Technical field
The present invention relates to a kind of circuit tracing.More particularly the present invention relates to for by adopting focused ion beam to follow the tracks of the method and system that circuit on integrated circuit connects to come catching circuits image.
Background technology
The wisdom of enterprise is paid attention in twentieth century early stage technological revolution of late period to 21st century.Company, especially those are engaged in hi-tech, attempt to determine that what technology opponent will be applied to the company of their last word.For this reason, integrated circuit, particularly high value, the microchip of cutting edge, is constantly carried out reverse engineering, and analyzing anatomical, to determine what kind of their inner structure and interconnection be.
At present, the dissection of integrated circuit and analysis relate to the process of an arduous effort.Every one deck of multilayer chiop is all careful exposure, then creates picture.Produce mosaic image and, then review arduously this vestige, determine which feature and assembly interconnect.Can imagine, just capped in order to ensure interested feature, the feature that the process of this resource-intensive leads to errors and the uninterested region of possibility be imaged analysis,
Therefore, need a system, method, and equipment can reduce the circuit followed the tracks of on integrated circuit and the needed energy of interconnection of electronic circuit.
Summary of the invention
The invention provides for follow the tracks of the method and system of the electronic circuit on integrated circuit by employing focused ion beam imaging technique.The first assembly on integrated circuit or node are connected to the second assembly or the node on same integrated circuit.Then, an external bias is applied to described the first assembly or node.One focused ion beam is applied to described integrated circuit, and uses an electron detector to gather image.The feature that is connected to the second assembly on integrated circuit or assembly will produce high-contrast on result images.The method can be used in iterative process, and this iterative process in order to which assembly being identified on integrated circuit with which feature is connected.The method also comprises that applying a bias voltage gives a node or assembly, and uses subsequently focused ion beam imaging technique (by an electron detector) to obtain the pattern of this integrated circuit.Other assemblies or the node that are connected to this node that has been applied in bias voltage or assembly can present high-contrast on result images.
According to a first aspect of the invention, provide a kind of method for the imaging circuit on integrated circuit, the method comprises:
A. the first part of described integrated circuit is connected to the second part of described integrated circuit;
B. apply one and be biased into described the first part;
C. make described integrated circuit be exposed under a focused ion beam; And
D. use electron detector to gather the image of integrated circuit;
Wherein, described the first part is not connected by described integrated circuit with described the second part; With
Wherein, have at least a portion present high-contrast with respect to the remainder in image at the image of steps d collection, described at least a portion is a part for described integrated circuit, and this part is described the second part that is connected to described integrated circuit.
According to a second aspect of the invention, provide a kind of for following the tracks of the interconnective method at an integrated circuit, the method comprises:
A. remove the layer of described integrated circuit to expose the parts of described integrated circuit;
B. the first node of described integrated circuit is connected to the Section Point of described integrated circuit;
C. apply an external bias to described first node;
D. use focused ion beam and electron detector to catch the image of at least a portion of described integrated circuit;
E. determine which assembly on integrated circuit is noted as high-contrast on image;
Wherein, before step b, described first node and Section Point are not connected to each other by described integrated circuit.
According to a third aspect of the present invention, provide a kind of method for the imaging circuit on integrated circuit, the method comprises:
A. apply an external bias in the first of described integrated circuit;
B. described integrated circuit is exposed under a focused ion beam;
C. gather the image of described integrated circuit;
Wherein, the described image collecting in step c, the second portion that has shown described integrated circuit, this second portion presents high-contrast with respect to the remainder in image, and described first and second portion are connected to each other by a common path in integrated circuit.
Accompanying drawing explanation
Embodiments of the invention are described with reference to figure below, and the same numbers in different accompanying drawings represents identical element, wherein:
Fig. 1 and Fig. 2 illustrate to illustrate focused ion beam (FIB) technology;
Fig. 3 is the image from FIB, and the IC feature of high-contrast is described;
Fig. 3 A is the image from FIB, shows the connection between two features on IC;
Fig. 4 is the image that utilizes the high contrast characteristics of FIB;
Fig. 5 is the characteristic image with dieelctric sheet deposition in Fig. 4;
Fig. 6 be in Fig. 4 have by the known features of short circuit and by the image of the feature of the node of short circuit unknown characteristics;
Fig. 7 is the image of the integrated circuit of Fig. 6, has shown because bias voltage is applied to known features the different parts of the IC of high-contrast; With
Fig. 8 is the schematic flow sheet of step according to an aspect of the present invention.
Specific embodiment
Focused ion beam (FIB) system made, in semicon industry, and has different purposes in a lot of different application.In FIB system, produce focused beam and accelerate to next column.By applying through the electromagnetic energy of system coil (and electrostatic lens), handle this light beam subsequently, consequent light beam occurs and penetrates sample/target in vacuum chamber.For FIB, compare electron beam, the light beam that should be comprised of ion, as ion beam, has more kinetic energy and energy and penetrates sample.By adding background gas and passing through low-yield shock sample, new material can deposit.Can be by handling light beam and adding gas, material can one accurate and controllable mode remove and deposit.Calibrating gas can comprise xenon difluoride, tetramethyl-ring tetrasiloxane (TMCTS), platinum, tungsten, and other known gases.
In ion beam, penetrate after sample, ion, atom and electronics are launched (being mainly secondary electron).These electronics can be used for creating an image---and this image can be by being used an electron detector to obtain and signal and this ion beam of synchronously this collection scan.Material and other factors of depending on sample, may be launched by more or less electronics.Therefore, this image can be used to identify the region of the sample taking on a different character.For instance, metallic circuit can send varying number
Electronics, compares electric Jie field, and this makes metallic circuit present different images.
Explanation with reference to 1, one schematic view illustrating focused ion beam technology of figure.In Fig. 1, can see, focused ion beam (coming from gallium ion source) is applied to sample.The sample of ion beam formula is launched electronics.These electronics detect by secondary electron detector.Can go out from ejected electron member the image of sample.Can be as shown in Figure 1, by by a feature ground connection of sample and transmit positive particle, just can obtain the bright image for the feature of ground connection.This is because secondary electron detector receives an electron concentration higher than unearthed feature.
When ion beam penetrates a semi-conductive region along with embedded dopant material, a well-known phenomenon occurs.When N doped silicon and P doped silicon are hit by ion beam, their behavior performance is different, and this result images demonstrates the difference of storeroom contrast.Except semi-conductive material is also showing in varying degrees this behavior performance, be called voltage-contrast.
By explaining, provide Fig. 2.In this width figure, two features on an integrated circuit (IC) are connected by a circuit.When focused ion beam is applied in feature, on integrated circuit, the feature of ground connection produces a brighter image.Again, this is that the electron concentration of the unearthed feature of concentration ratio of the electronics from ground connection feature that receives due to secondary electron detector is high.
Explanation by Fig. 2 can be extended concept, and a focused ion beam can be used for penetrating sample, and this sample has mixed dielectric material and metal interconnected (for example, the IC chip of time delay).By being fabricated onto the outside of the specific region of circuit, connect, and apply one and be biased into these regions, the quantity that is the electric power that produced by ion beam strikes when these regions can produce great changes.Use this technology, when drawing secondary electron output figure, the specific region of the integrated circuit in result images, than other regions, can show higher brightness (that is, higher contrast).Example as shown in Figure 3, the biased and FIB of integrated circuit features/components is applied in.Can find out, the feature that has applied bias voltage has high-contrast than other features on IC.
The region of this high brightness (or high-contrast) can be extended with normal circuit editor FIB operation.By deposition of dielectric materials, milling access hole and plated metal interconnection, field or new assembly or a node that this bias voltage regions can be new with on IC are connected.When clashing into by focused ion beam, any region that is connected to this bias voltage in the result images of output that is derived from secondary electron detector, all will there is equally high-contrast in assembly or node.This can be used for determining which feature on IC, node, or assembly and which region, and feature, node or assembly connect.
With reference to Fig. 3 A-6, known features and the region of the unknown or the step of the connection between feature in IC have been described.In a schematic diagram, Fig. 3 A has shown the desired result of the feature of two short circuits on IC.Can find out, a known feature (buffer attribute with high-contrast) is and adjacent feature short circuit that this adjacent feature is also a buffering.Yellow piece representative between the Buffer Unit the highlighting buffering adjacent with it is connected these a bufferings short circuit with another, as shown in Figure 3A.
In Fig. 4, known features (buffering) is that FIB bias voltage and that obtain from this image has shown the high-contrast that has with respect to other features IC.In Fig. 5, a dielectric piece is deposited on the node of known features and known features and exposes a unknown characteristics (not with the feature of bias voltage).In Fig. 6, node known features and unknown characteristics is by being deposited on two conductive materials between node and short circuit.Once short circuit, therefore two nodes are connected and on the node of short circuit, apply bias voltage and have at any node, execute biased effect on feature or assembly, this any node, and feature or assembly are connected with a position feature.Therefore, when focused ion beam was applied to IC when upper with bias voltage simultaneously, than part or the region of the no-bias on IC, these are connected to the node of unknown feature, feature, or assembly also will appear at height (or higher) contrast.
With reference to Fig. 7, in the lower middle portion of image, this short-circuited region (that is the region that, bias voltage is employed) has been described.Compare with remainder in IC, the feature of the IC that should be connected with unknown characteristics presents high-contrast.As seen in Fig. 7, these features comprise the input of power switch and the output to next buffer zone.
It should be pointed out that the example providing in Fig. 3 A-7 should not be regarded as limitation of the present invention.Any feature, node, or the assembly on integrated circuit or chip can be used as first or initial component or node.This first assembly can or be connected to second assembly by short circuit, and this applies bias voltage and focused ion beam and realize to integrated circuit by having precedence in any suitable manner.And in the example providing, also can use FIB deposition and remove insulation course and metal interconnected, also can use other technology.And the focused ion beam that this example is used derives from gallium ion source, other ion guns, as simple substance gold, iridium, xenon, neon, and any other suitable ion gun can use.
Also should be noted that, for best result, this first and second node or assembly are connected to each other via integrated circuit, and this preferably has precedence over and is not connected one to the other to another node for the object of bias voltage and imaging or assembly.
In one embodiment, one aspect of the present invention, first integrated circuit (IC) chip or mould must be prepared, and use standard is called dorsal part sample preparation methods.This comprises that installation mold arrives prone insulating carrier, then removes die body silicon, and it uses wet type or dry-etching until grid level assembly is exposed.Mould can be further processed, and discloses interested concrete layer from behind by the technology of standard.A method is 1 grade of exposing metal.Once interested level or assembly expose, a signal path expands to interested node from external source, assembly or feature, and this uses external power source conventionally.
Apply after bias voltage, then sample is placed on to a focused ion beam chamber.Then this chamber is taken out with vacuum pump, this sample is exposed to FIB light beam.By changing the situation of light beam, the condition of imaging detector, and external bias, can show this signal node by thering is very high mutually contrast, this high-contrast is than the remainder of the imaging detector circuit of secondary electron (SE), interested node or feature can present and be illuminated, and the remainder of circuit is dark.
Once interested feature is biased and present high-contrast, the region of this high-contrast can be extended.Use the ability of focused ion beam technology, with accurately deposition of insulative material and conductive material, this signal path expands to the new part at a feature or circuit.In an independent transistorized situation, this original bias voltage signal (for example can be applied to a transistorized node, grid, source class, or drain electrode contact), use focused ion beam deposition technology, this bias voltage signal (for example can expand to another transistorized node, grid, source electrode or drain electrode contact).Once this bias voltage signal has expanded to new feature, other any nodes are connected to this node, will appear in bright SE image.
Should be noted that, when signal path can be by the invisible extension of many metal levels (surpass 10 modern IC), place is connected to another metal 1st district arbitrarily, will be visible immediately at SE image.
Once the new node connecting is found, this process can be repeated, and next node can be illuminated.By continuing across circuit and forming these, connect, this circuit can pass IC chip subsequently.Can imagine, for relating to a plurality of transistorized circuit, this process only relates to the deposition of conductor, with short source, touches drain electrode contact, and the application of bias voltage is to apply this focused ion beam to sample.
It should be pointed out that one aspect of the present invention can apply external bias simply to an assembly or node, have precedence over and apply focused ion beam to integrated circuit.Apply after focused ion beam, image is to use electron detector to take.Feature on integrated circuit or assembly are connected to feature or the assembly that is applied in bias voltage, and this will be presented on the result images of high-contrast.The method can be used for identification by node or the assembly of a co-route on integrated circuit.
The technology of general introduction can be used for grid level circuit, contact level circuit, or any required metal level (as metal 1).
It should be pointed out that the information of using image that said process obtains can further process to obtain further image.For example image enhancement technique can be applicable to the digital version of image, and this image comes from said process, with further interpretation component, and the feature on node and integrated circuit.
We are to be further noted that the image of catching in the process of iteration repeatedly, can be used for determining which feature has become a bias voltage relevant portion or integrated circuit part.For example, the image of iteration A (have precedence over and apply a short circuit part that is biased into IC) is compared to image with iteration A+1 (after in the application to this bias voltage), highlighted to see the part of which IC.Image reduces, and image is processed and image superimposing technique can be used for this process of robotization, and the part of the image by outstanding or high-contrast is determined.
Various parameters for the conditions and environment of focused ion beam, can be adjusted and/or be set to best resultant image quality.These parameters comprise voltage, electric current, and the time of stop, and other parameters etc.For the people who is proficient in focused ion beam technology for those, these parameters and impact thereof and setting are well-known.The parameter capable of regulating of electron detector is comprised to brightness to obtain suitable picture quality, contrast and line average degree.
The scope that bias voltage is applied to interested feature is+arrive-24V of 24V.This bias voltage may depend on the feature that focused ion beam condition and IC are imaged.For example the characteristic of this IC can comprise pattern density, conductor width/resistance, mass of medium and conductor quality.Preferably, bias current will be limited to prevent the electric arc between conductor.Therefore within the scope of this bias voltage is preferably in microampere.
One aspect of the present invention can be considered as a process and describe in detail by process flow diagram 8.This process originates in step 10, preparation IC.As mentioned above, this step may relate to the assembly that is exposed on IC to grid level.Step 20 is that feature of connection or node arrive another feature or node, this can use and comprise FIB dielectric deposit, once (known feature has been connected to a unknown feature, the interconnected relationship of feature is not clear), then bias voltage can be applied to connection features (step 30) focused ion beam now can be for integrated circuit (step 40), electron detector can be used for producing IC image (step 50).IC feature is connected to and will produces bias voltage node or the feature of high-contrast image.
The alternative structure that the people that the present invention is understood can contemplate and above-mentioned all these embodiment or variation all belong to the protection domain that goes claim of the present invention.
Claims (15)
1. for a method for the imaging circuit on integrated circuit, the method comprises:
A. apply an external bias in the first of described integrated circuit;
B. described integrated circuit is exposed under a focused ion beam;
C. gather an image of described integrated circuit;
It is characterized in that, the described image collecting in step c has shown the second portion of described integrated circuit, this second portion presents high-contrast with respect to the remainder in described image, and described first and second portion are connected to each other by a common path in integrated circuit.
2. for a method for the imaging circuit on integrated circuit, the method comprises:
A. connect the first part of described integrated circuit and the second part of described integrated circuit;
B. apply one and be biased into described the first part;
C. described integrated circuit is exposed under a focused ion beam; And
D. use electron detector to gather the image of integrated circuit;
It is characterized in that, described the first part is not connected by described integrated circuit with described the second part; With
Wherein, the described image collecting in steps d has at least a portion and presents high-contrast with respect to the remainder in described image, described at least a portion is a part for described integrated circuit, and this part is described the second part that is connected to described integrated circuit.
3. method according to claim 2, it is characterized in that, by being used as described at least one part and an integrated circuit feature of described the second part to come repeating step a to d, wherein said integrated circuit feature is not connected with described at least one part as described the first part conventionally.
4. method according to claim 2, is characterized in that, step a realizes by deposition of dielectric materials between the first part and the second part and interconnect materials.
5. method according to claim 2, is characterized in that, described focused ion beam comes from described gallium ion source.
6. method according to claim 3, it is characterized in that, carry out the repeatedly iteration of described method, and further comprise a step, this step is the image of the described integrated circuit of the collection during iteration repeatedly relatively, in order to follow the trail of being connected of an integrated circuit feature and another integrated circuit feature.
7. for following the tracks of the interconnective method at an integrated circuit, the method comprises:
A. remove the layer of described integrated circuit to expose the assembly of described integrated circuit;
B. the first node of described integrated circuit is connected with the Section Point of described integrated circuit;
C. apply an external bias to described first node;
D. use focused ion beam and electron detector to catch an image of at least a portion of described integrated circuit;
E. the assembly of determining which integrated circuit in described image is noted as high-contrast;
It is characterized in that, before step b, described first node and Section Point are not connected to each other by described integrated circuit.
8. method according to claim 7, further comprise, repeating step b is to the step of step e, this step be used as at least one assembly in the described assembly marking in described image of described Section Point with one with described assembly not by the node of first node described in the conduct that part is connected each other of described integrated circuit.
9. method according to claim 7, is characterized in that, described focused ion beam is to come from a gallium ion source.
10. method according to claim 7, is characterized in that, described first node and described Section Point are the nodes on transistor.
11. methods according to claim 7, it is characterized in that, with cross to use different node on described integrated circuit repeatedly repeating step b to e, and comprise a step, the image that this step is relatively captured, determines by described step which assembly of which node is connected on described integrated circuit.
12. methods according to claim 12, is characterized in that, described step b is by using material outside described integrated circuit to come first node and Section Point described in short circuit to realize.
13. methods according to claim 12, is characterized in that, described step b is that dielectric material and the interconnect materials by being deposited between described first node and Section Point realizes.
14. 1 method methods according to claim 7, further comprise a step: apply the digital version of image described in image enhancement technique to, to strengthen described image.
15. methods according to claim 7, further comprise that repeating step b is to the step of e repeatedly, from previous iteration, use at least one assembly illustrating an image as described Section Point, and a node disconnect as this first node by described integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611060195.4A CN106842001B (en) | 2013-04-24 | 2014-04-23 | Using the circuit tracing of focused ion beam |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2,813,910 | 2013-04-24 | ||
| US13/869,749 | 2013-04-24 | ||
| CA2813910A CA2813910C (en) | 2013-04-24 | 2013-04-24 | Circuit tracing using a focused ion beam |
| US13/869,749 US8791436B1 (en) | 2013-04-24 | 2013-04-24 | Circuit tracing using a focused ion beam |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201611060195.4A Division CN106842001B (en) | 2013-04-24 | 2014-04-23 | Using the circuit tracing of focused ion beam |
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| CN104122282A true CN104122282A (en) | 2014-10-29 |
| CN104122282B CN104122282B (en) | 2017-01-18 |
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| CN201611060195.4A Active CN106842001B (en) | 2013-04-24 | 2014-04-23 | Using the circuit tracing of focused ion beam |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106409708A (en) * | 2015-07-28 | 2017-02-15 | 泰科英赛科技有限公司 | Circuit tracing using a focused ion beam |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113330293A (en) * | 2018-11-21 | 2021-08-31 | 泰科英赛科技有限公司 | Ion beam decladding system and method, topography enhanced decladded samples produced thereby, and imaging methods and systems related thereto |
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| CN106409708A (en) * | 2015-07-28 | 2017-02-15 | 泰科英赛科技有限公司 | Circuit tracing using a focused ion beam |
| CN106409708B (en) * | 2015-07-28 | 2022-02-22 | 泰科英赛科技有限公司 | Circuit tracking using focused ion beam |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104122282B (en) | 2017-01-18 |
| CN106842001B (en) | 2019-09-24 |
| CN106842001A (en) | 2017-06-13 |
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