CN104103667A

CN104103667A - Display unit and electronic apparatus

Info

Publication number: CN104103667A
Application number: CN201410137206.9A
Authority: CN
Inventors: 甚田诚一郎; 山田二郎
Original assignee: Sony Corp
Current assignee: Sony Corp
Priority date: 2013-04-11
Filing date: 2014-04-04
Publication date: 2014-10-15
Anticipated expiration: 2034-04-04
Also published as: CN104103667B; JP6115274B2; US20140306200A1; KR20140123002A; US9287333B2; JP2014207105A; TWI623094B; TW201440216A

Abstract

The invention relates to a display unit and an electronic apparatus. The display unit includes a pixel including a plurality of sub-pixels. The sub-pixels each include a plurality of light emission regions that are arranged away from one another. Each of the sub-pixels includes a single first electrode, a single second electrode provided in a lamination direction of the first electrode, and a light-emitting layer inserted between the first electrode and the second electrode in each of the light emission regions.

Description

Display unit and electronic equipment

The cross reference of related application

The application requires the formerly priority of patent application JP2013-083276 of Japan of submitting on April 11st, 2013, and its full content is hereby expressly incorporated by reference.

Technical field

The disclosure relates to the display unit with current-driven display and the electronic equipment that comprises this display unit.

Background technology

In recent years, the field of display units showing in carries out image, developed following display unit (organic EL(electroluminescence) display unit), the current drive-type Optical devices that its use luminosity changes according to the value of streaming current for example, as luminescent device (organic EL device), and the product of this display unit constantly becomes commercialized.Different from liquid-crystal apparatus etc., this luminescent device is selfluminous element, and this has got rid of the needs of the light source (backlight) to other setting.Therefore,, than the liquid crystal display that wherein needs light source, the feature of organic EL display unit comprises higher image visibility, lower power consumption and higher device response speed.

In display unit, conventionally need high image quality, therefore, developed for improving the various technology of picture quality.For example, the open No.2007-248484 of Japanese unexamined patent discloses a kind of display unit, and it is to be arranged on light guide section before each display unit and light has limited visual angle and improved front face brightness in the mode of the offside reflection of light guide section.This display unit for example can be applied to mobile device, and by design, limits visual angle and improve picture quality, has improved the visibility when from anterior view picture with the aid of pictures simultaneously.

Summary of the invention

In electronic equipment, conventionally need low-power consumption, and also the power consumption of desired display unit reduces.

Expectation provides a kind of display unit and electronic equipment that can reduce power consumption.

According to disclosure embodiment, provide a kind of display unit that comprises the pixel with a plurality of sub-pixels.Each sub-pixel comprises a plurality of luminous zones of arranging away from each other.Each sub-pixel comprises single the first electrode, at single second electrode of the laminating direction setting of the first electrode and be inserted in the luminescent layer between the first electrode and the second electrode in each luminous zone.

According to the embodiment of the present invention, a kind of electronic equipment is provided, it is provided with display unit and is configured to control the control part of the operation of display unit.Display unit comprises the pixel with a plurality of sub-pixels.Each sub-pixel comprises a plurality of luminous zones of arranging away from each other.Each sub-pixel comprises single the first electrode, at single second electrode of the stacked direction setting of the first electrode and be inserted in the luminescent layer between the first electrode and the second electrode in each luminous zone.The example of this electronic equipment can comprise television equipment, digital camera, personal computer, video camera or comprise the mobile terminal device of mobile phone.

According in the display unit of disclosure above-described embodiment and electronic equipment, a plurality of luminous zones that are arranged as are away from each other formed in each sub-pixel.Each sub-pixel has single the first electrode and single the second electrode, and luminescent layer is inserted between the first electrode and the second electrode corresponding to each luminous zone.

According to the display unit of disclosure above-described embodiment and electronic equipment, each sub-pixel is provided with a plurality of luminous zones that are arranged as away from each other, and this makes to reduce power consumption.

It will be appreciated that, general description above and detailed description are below exemplary, aim to provide further illustrating desired technology.

Accompanying drawing explanation

Comprised that accompanying drawing is to provide further understanding of the disclosure, accompanying drawing is merged in and forms the part of this specification.Accompanying drawing shows execution mode, and is used from specification one principle that this technology is described.

Fig. 1 is the block diagram illustrating according to the profile instance of the display unit of disclosure execution mode.

Fig. 2 is the schematic diagram illustrating according to the sub-pixel arrangements in the display part of the disclosure the first execution mode.

Fig. 3 is the circuit diagram that the profile instance of the display part shown in Fig. 2 is shown.

Fig. 4 is the sectional view that the simplification cross section structure of the display part shown in Fig. 2 is shown.

Fig. 5 is the key diagram that the configuration of the sub-pixel in the display part shown in Fig. 2 is shown.

Fig. 6 is the plane graph that the arrangement examples of the anode in the display part shown in Fig. 2 is shown.

Fig. 7 is the plane graph that the arrangement examples of the window in the display part shown in Fig. 2 is shown.

Fig. 8 is the sectional view that the profile instance of the window shown in Fig. 7 is shown.

Fig. 9 is the timing waveform that the operational instances of the display unit shown in Fig. 2 is shown.

Figure 10 is the key diagram that the light beam in the window shown in Fig. 8 is shown.

Figure 11 is another key diagram that the light beam in the window shown in Fig. 8 is shown.

Figure 12 A is the plane graph illustrating according to the arrangement examples of the window of the modification of the disclosure the first execution mode.

Figure 12 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 12 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 A is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 D is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 E is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 13 F is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 14 A is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 14 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 14 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 15 is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 16 is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the first execution mode.

Figure 17 is the sectional view illustrating according to the simplification cross section structure of the display part of another modification of the disclosure the first execution mode.

Figure 18 is the sectional view illustrating according to the simplification cross section structure of the display part of another modification of the disclosure the first execution mode.

Figure 19 is the key diagram that the subpixel configuration in the display part shown in Figure 18 is shown.

Figure 20 is the schematic diagram illustrating according to the sub-pixel arrangements in the display part of the disclosure the second execution mode.

Figure 21 is the plane graph that the arrangement examples of the anode in the display part shown in Figure 20 is shown.

Figure 22 is the plane graph of another example that the layout of the anode in the display part shown in Figure 20 is shown.

Figure 23 is the plane graph that the arrangement examples of the window in the display part shown in Figure 20 is shown.

Figure 24 A is the plane graph illustrating according to the arrangement examples of the window of the modification of the disclosure the second execution mode.

Figure 24 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 24 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 24 D is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 A is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 D is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 E is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 25 F is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 26 A is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 26 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the second execution mode.

Figure 27 is the schematic diagram illustrating according to the layout of the sub-pixel in the display part of the disclosure the 3rd execution mode.

Figure 28 is the circuit diagram that the profile instance of the display part shown in Figure 27 is shown.

Figure 29 is the plane graph of arrangement examples that the anode of the display part shown in Figure 27 is shown.

Figure 30 is the plane graph that the arrangement examples of the window in the display part shown in Figure 27 is shown.

Figure 31 is the timing waveform illustrating according to the operational instances of the display unit of the disclosure the 3rd execution mode.

Figure 32 A is the plane graph illustrating according to the arrangement examples of the window of the modification of the disclosure the 3rd execution mode.

Figure 32 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 32 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 33 is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 34 is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 35 is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 36 A is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 36 B is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 36 C is the plane graph illustrating according to the arrangement examples of the window of another modification of the disclosure the 3rd execution mode.

Figure 37 illustrates application according to the perspective view of the configuration of the outward appearance of the television equipment of the display unit of disclosure execution mode.

Figure 38 is the plane graph illustrating according to the arrangement examples of the window of modification.

Figure 39 is the plane graph illustrating according to the arrangement examples of the window of another modification.

Figure 40 is the circuit diagram illustrating according to the profile instance of the sub-pixel of another modification.

Figure 41 is the circuit diagram illustrating according to the profile instance of the sub-pixel of another modification.

Embodiment

Below, describe with reference to the accompanying drawings execution modes more of the present disclosure in detail.It should be noted that the order by providing is below described.

1. the first execution mode

2. the second execution mode

3. the 3rd execution mode

4. application examples

[profile instance]

Fig. 1 shows according to the profile instance of the display unit of disclosure execution mode.Display unit 1 is the active matrix type display that uses organic EL device.

Display unit 1 comprises display part 10 and drive division 20.Drive division 20 has picture signal handling part 21, timing generating unit 22, scanning line driving portion 23, power line drive division 26 and data wire drive division 27.

Display part 10 is configured so that a plurality of pixel Pix is arranged to the mode of matrix pattern.As described below, pixel Pix is by red, green, blue and white four sub pixel 11 configurations.

Fig. 2 shows the arrangement examples of the sub-pixel 11 in display part 10.Each pixel Pix has respectively redness (R), green (G), blue (R) and white (W) four sub-pixel 11R, 11G, 11B and 11W.In this example, these four sub-pixel 11R, 11G, 11B and 11W are arranged in the matrix of two row and two row in pixel Pix.More specifically, in pixel Pix, red (R) sub-pixel 11R, green (G) sub-pixel 11G, white (W) sub-pixel 11W and blueness (B) sub-pixel 11B are arranged in respectively upper left side, upper right side, lower left and lower right.Layout that it should be noted that these four sub-pixel 11R, 11G, 11B and 11W can preferably meet this layout.Yet it is not limited to this, and alternatively, can adopt other layouts arbitrarily.

Fig. 3 shows the example of the Circnit Layout of display part 10.A plurality of data wire DTL that display part 10 has in the row direction a plurality of scan line WSAL of extending and WSBL and a plurality of power line PL and extends at column direction.Scan line WSAL is connected with scanning line driving portion 23 with each the one end in WSBL, and one end of power line PL is connected with power line drive division 26, and one end of data wire DTL is connected with data wire drive division 27.The sub-pixel 11R that belongs to a pixel Pix is connected with same scan line WSAL with sub-pixel 11G, and the sub-pixel 11B that belongs to a pixel Pix is connected with same scan line WSBL with sub-pixel 11W.In addition, the sub-pixel 11R that belongs to a pixel Pix is connected with same data wire DTL with sub-pixel 11W, and the sub-pixel 11G that belongs to a pixel Pix is connected with same data wire DTL with sub-pixel 11B.In addition, four sub-pixel 11R, 11G, 11B and 11W belonging to a pixel Pix are connected with same power line PL.

Next, the Circnit Layout of sub-pixel 11 has been described as an example with sub-pixel 11R.It should be noted that this is equally applicable to the Circnit Layout of sub-pixel 11G, 11B and 11W.

Sub-pixel 11R comprises and writes transistor WSTr, driving transistors DRTr, capacitor Cs and luminescent device 19.Each writing in transistor WSTr and driving transistors DRTr can be by for example N-channel MOS (metal-oxide semiconductor (MOS)) TFT(thin-film transistor) configuration.In sub-pixel 11R, the grid that writes transistor WSTr is connected with scan line WSAL, and its source electrode is connected with data wire DTL, and its drain electrode is connected with the first end of capacitor Cs with the grid of driving transistors DRTr.The grid of driving transistors DRTr is connected with the first end of capacitor Cs with the drain electrode that writes transistor WSTr, and its drain electrode is connected with power line PL, and the second end of its source electrode and capacitor Cs and the anodic bonding of luminescent device 19.The first end of capacitor Cs is connected with the drain electrode that writes transistor WSTr with the grid of driving transistors DRTr, and the source electrode of its second end and driving transistors DRTr and the anodic bonding of luminescent device 19.Luminescent device 19 is to use organic EL device to be configured to the luminescent device of red (R) light of transmitting, and wherein, its anode is connected with the source electrode of driving transistors DRTr and the second end of capacitor Cs, and to its negative electrode, applies cathode voltage Vcath from drive division 20.

Fig. 4 shows the cross sectional view of display part 10.Display part 10 has substrate 200, grid 201, polysilicon 203, anode 212, insulating barrier 213, luminescent layer 214, negative electrode 215, insulating barrier 216 and colour filter 218.

Substrate 200 is support substrates of display part 10, and for example can be configured by glass or plastic material.On substrate 200, formed grid 201.Grid 201 for example can be by the material configuration such as molybdenum (Mo).On substrate 200 and grid 201, formed insulating barrier 202.This insulating barrier 202 for example can pass through such as silica (SiO ₂) and the material of silicon nitride (SiNx) make.On insulating barrier 202, polysilicon 203 is formed in the region corresponding to grid 201.Grid 201 and polysilicon 203 configuration driven transistor DRTr etc.It should be noted that in this example, transistor configures with so-called bottom grating structure, and wherein polysilicon 203 is formed on grid 201 tops.Yet this configuration is not limited to this, and transistor can be alternatively with so-called top gate structure configuration, and wherein polysilicon is formed on grid below.On polysilicon 203 and insulating barrier 202, formed insulating barrier 204.This insulating barrier 204 can by with the similar material configuration of insulating barrier 202.In addition,, in a part that forms the region of polysilicon 203, contact/wiring 205 forms through insulating barrier 204.Wiring 205 for example can be by three layers of configuration of titanium (Ti)/aluminium (Al)/titanium (Ti).

On insulating barrier 204, formed insulating barrier 211.Insulating barrier 211 can be for example by the material configuration such as polyimides and acrylic resin.On insulating barrier 211, formed anode 212.Anode 212 is connected in the mode through insulating barrier 211 with the contact/wiring 205 that relates to the source electrode of driving transistors DRTr.Anode 212 for example can be by the material configuration such as ITO/ aluminium alloy, aluminium alloy, ITO/ silver and ITO/Ag alloy.In other words, expectation anode 212 can have catoptrical characteristic.On anode 212 and insulating barrier 211, formed insulating barrier 213.Insulating barrier 213 for example can by with the similar material configuration of insulating barrier 211.On this insulating barrier 213, in a part that has formed the region of anode 212, be provided with a plurality of window WIN.On anode 212 and insulating barrier 213, luminescent layer 214 forms and covers a plurality of window WIN.Luminescent layer 214 is organic EL layers of red-emitting, green glow, blue light and white light.More specifically, the luminescent layer 214 of red-emitting (R) is formed in the region corresponding with sub-pixel 11R, the luminescent layer 214 of transmitting green light (G) is formed in the region corresponding with sub-pixel 11G, the luminescent layer 214 of transmitting blue light (B) is formed in the region corresponding with sub-pixel 11B, and the luminescent layer 214 of transmitting white (W) is formed in the region corresponding with sub-pixel 11W.On insulating barrier 213 and luminescent layer 214, be formed uniformly negative electrode 215.Negative electrode 215 is transparent or semitransparent electrodes, and for example can be by such as magnesium silver (MgAg) and IZO(registered trade mark) material configuration.In the situation that negative electrode 215 is made by MgAg, for example, can configure semitransparent cathode 215 by film thickness being set with several nanometer scale.In the situation that negative electrode 215 is made by IZO, for example, expectation negative electrode 215 forms with the film thickness in tens to several thousand nanometer range.More specifically, IZO is transparent material, therefore, can form IZO to realize the low sheet resistor of expectation with slightly large thickness.On negative electrode 215, formed in this example insulating barrier 216.Insulating barrier 216 for example can be by the material configuration such as silicon nitride (SiNx).Insulating barrier 216 is made by its refractive index material different from the refractive index of insulating barrier 213.Particularly, as the following describes, insulating barrier 213 and 216 refractive index are set to guarantee that the light entering from insulating barrier 216 sides is reflected at the rake PS of the insulating barrier 213 around window WIN.In addition, insulating barrier 216 also has and prevents such as invaded the function of the characteristic variations of the luminous efficiency causing in luminescent layer 214 by moisture.Insulating barrier 216 is attached to substrate 220, and on substrate 220, colour filter 218 and black battle array 219 form from the teeth outwards, as the insulating barrier 217 of the resin bed for sealing between substrate 220 and colour filter 218 and black gust 219.More specifically, the colour filter 218 of red (R) is formed in the region corresponding with sub-pixel 11R, the colour filter 218 of green (G) is formed in the region corresponding with sub-pixel 11G, the colour filter 218 of blue (B) is formed in the region corresponding with sub-pixel 11B, and the colour filter 218 of white (W) is formed in the region corresponding with sub-pixel 11W.

By means of this configuration, the light of the redness of sending from luminescent layer 214, green, blueness and white is propagated at the rightabout of the substrate 200 as support substrates.In other words, luminescent device 19 is so-called top emission structure luminescent devices.The light sending from luminescent device 19 is exported from display surface via colour filter 218.More specifically, the colour gamut of ruddiness (R) is regulated by redness (R) colour filter 218 of sub-pixel 11R, the colour gamut of green glow (G) is regulated by green (G) colour filter 218 of sub-pixel 11G, the colour gamut of blue light (B) is regulated by blueness (B) colour filter 218 of sub-pixel 11B, and the colour gamut of white light (G) is by white (W) colour filter 218 adjustings of sub-pixel 11W.It should be noted that in so not high application of the requirement of picture quality (colour gamut) etc., these colour filters 218 can be set.

Fig. 5 has schematically shown the configuration of four sub-pixels 11 in pixel Pix.At the sub-pixel 11R of red (R), the red light of sending from red light emitting layer 214 is through red color filter 218.In a similar fashion, the green light of sending from green light emitting layer 214 is through the green color filter 218 of green (G) sub-pixel 11G, the blue light sending from blue light-emitting layer 214 is through the blue color filter 218 of blue (B) sub-pixel 11B, and the white colour filter 218 that passes white (W) sub-pixel 11G from white luminous layer 214 white light sending.

Fig. 6 shows the layout of the anode 212 in pixel Pix.Pixel Pix is provided with four circuit region 15R, 15G, 15B and 15W, and four anode 212R, 212G, 212B and 212W.

Circuit region 15R is the region of having arranged the device except luminescent device 19 in sub-pixel 11R (writing transistor WSTr, driving transistors DRTr and capacitor Cs).Similarly, circuit region 15G is the region of having arranged the device except luminescent device 19 in sub-pixel 11G, circuit region 15B is the region of having arranged the device except luminescent device 19 in sub-pixel 11B, and circuit region 15W is the region of having arranged the device except luminescent device 19 in sub-pixel 11W.In this example, except with the position that be connected of scan line WSAL with WSBL and power line PL, the layout of each in circuit region 15R, 15G, 15B and 15W is almost identical.Layout that it should be noted that these circuit regions is not limited to this, and for example, the layout of circuit region 15R and 15G can be the inversion of the turned upside down mode of circuit region 15B and 15W, or alternatively, the layout that each circuit region can be arranged to differ from one another.As mentioned above, by reusing identical layout with rotation and upside down, can improve layout work efficiency.

Anode 212R, 212G, 212B and 212W are respectively the anodes in sub-pixel 11R, 11G, 11B and 11W.These anodes 212R, 212G, 212B are connected with each the source electrode of driving transistors DRTr being formed in circuit region 15R, 15G, 15B and 15W via contact 205 with each in 212W.In this example, contact 205 has square configuration, and is arranged in the upper left side of anode 212R, 212G, 212B and 212W.

Fig. 7 has schematically shown the layout of the window WIN in each anode 212.As shown in Figure 6, each in anode 212R, 212G, 212B and 212W forms away from each other.Yet for convenience of explanation, Fig. 7 shows these anodes of placing adjacent to each other.In this example, in each region of anode 212R, 212G, 212B and 212W, three window WIN have been arranged.In this example, window WIN has round-shaped.In this example, these three window WIN are arranged in each upper right side, lower left and the lower right in anode 212R, 212G, 212B and 212W.More specifically, each in three window WIN is formed on the different position, position forming from contact 205.

Fig. 8 shows the cross section structure of the major part of window WIN.Insulating barrier 213 forms that to have be highly the thickness of H, and the diameter R1 of window region Anodic electrode 212 sides of insulating barrier 213 is less than the diameter R2 of display surface side.In other words, on insulating barrier 213, in the mode around window WIN, be provided with rake PS.Therefore, as the following describes, due to the difference of the refractive index between insulating barrier 213 and insulating barrier 216, luminescent layer 214 light that send, that move to rake PS in window WIN reflects on rake PS, thereby propagates in the place ahead of display surface.As a result, make to improve the efficiency of light being extracted to display part 10 outsides.

It should be noted that as shown in Figure 7, with preset space length, window WIN is set, this is because rake PS is as shown in Figure 8 provided.More specifically, comprise that the circle of the diameter R2 of window WIN and rake PS is arranged with the preset space length being defined by design rule, overlap each other avoiding.

In Fig. 1 etc., the picture signal Sdisp that 21 pairs of picture signal handling parts provide from outside carries out predetermined process operation, such as the conversion of RGB to RGBW signal and gamma conversion, with synthetic image signal Sdisp2.

Regularly generating unit 22 is to provide the circuit of control signal for each in scanning line driving portion 23, power line drive division 26 and data wire drive division 27, and the synchronizing signal Ssync based on providing from outside, controls these circuit parts and operates synchronously with one another.

According to the control signal providing from timing generating unit 22, scanning line driving portion 23 is to a plurality of scan line WSAL application scanning signal WSA sequentially, and to a plurality of scan line WSBL application scanning signal WSB sequentially, thus chooser pixel 11 sequentially.

Power line drive division 26 sequentially provides power supply signal DS according to the control signal providing from timing generating unit 22 to a plurality of power line PL, to control light emission operation and the delustring operation of sub-pixel 11.Power line DS changes between voltage vcc p and voltage Vini.As the following describes, voltage Vini is the voltage for initialization sub-pixel 11, and voltage vcc p is for allowing the luminous voltage of luminescent device 19 by allowing electric current pass through driving transistors DRTr.

According to the picture signal Sdisp2 providing from picture signal handling part 21 and the control signal that provides from timing generating unit 22, data wire drive division 27 generates signal Sig, it comprises the pixel voltage Vsig of the luminosity of indicating each sub-pixel 11 and the voltage Vofs proofreading and correct for carrying out the Vth that the following describes, the sort signal of generation is provided to each data wire DTL.

By means of this configuration, as the following describes, drive division 20 is carried out and is proofreaied and correct (Vth proofreaies and correct and μ (mobility) proofreaies and correct), changes the impact on the picture quality of sub-pixel 11, and pixel voltage Vsig is write to sub-pixel 11 for suppressing the device of driving transistors DRTr.Afterwards, 19 transmittings of the luminescent device in each sub-pixel 11 have the light corresponding to the brightness of the pixel voltage Vsig writing.

Here, anode 212 is corresponding to the concrete of " the first electrode " in execution mode of the disclosure but nonrestrictive example.Negative electrode 215 is corresponding to the concrete of " the second electrode " in execution mode of the disclosure but nonrestrictive example.Insulating barrier 213 is corresponding to the concrete of " the first insulating barrier " in execution mode of the disclosure but nonrestrictive example.Insulating barrier 216 is corresponding to the concrete of " the second insulating barrier " in execution mode of the disclosure but nonrestrictive example.Data wire DTL is corresponding to the concrete of " holding wire " in execution mode of the disclosure but nonrestrictive example.Circuit region 15 is corresponding to the concrete of " image element circuit district " in execution mode of the disclosure but nonrestrictive example.

[operation and function]

Below, will describe according to operation and the function of the display unit 1 of this execution mode of the present disclosure.

(overall operation general introduction)

First, with reference to Fig. 1, the summary of the overall operation of display unit 1 is described.The picture signal Sdisp that 21 pairs of picture signal handling parts provide from outside carries out predetermined process operation, with synthetic image signal Sdisp2.Regularly generating unit 22 provides control signal to each in scanning line driving portion 23, power line drive division 26 and data wire drive division 27, and the synchronizing signal Ssync based on providing from outside, controls these circuit parts and operates synchronously with one another.Scanning line driving portion 23 is according to the control signal providing from timing generating unit 22, to a plurality of scan line WSAL application scanning signal WSA sequentially, and to a plurality of scan line WSBL application scanning signal WSB sequentially, thus chooser pixel 11 sequentially.Power line drive division 26 sequentially provides power supply signal DS according to the control signal providing from timing generating unit 22 to a plurality of power line PL, to control light emission operation and the delustring operation of sub-pixel 11.According to the picture signal Sdisp2 providing from picture signal handling part 21 and the control signal that provides from timing generating unit 22,27 generations of data wire drive division comprise corresponding to the pixel voltage Vsig of the brightness of each sub-pixel 11 with for carrying out the signal Sig of the voltage Vofs of Vth correction, the sort signal of generation is provided to each data wire DTL.The sweep signal WSA that display part 10 bases provide from drive division 20 and WSB and power supply signal DS and signal Sig carry out demonstration.

(operation in detail)

Below, by take, belong to two sub-pixel 11R of a pixel Pix and 11W and describe the detailed operation of display unit 1 as example.

Fig. 9 shows the sequential chart of the operation of sub-pixel 11R and 11W, wherein, (A) show the waveform of sweep signal WSA, (B) show the waveform of sweep signal WSB, (C) show the waveform of power supply signal DS, (D) used the waveform of signal Sig, (E) show the waveform of the grid voltage Vg of the driving transistors DRTr in sub-pixel 11R, (F) show the waveform of the source voltage Vs of the driving transistors DRTr in sub-pixel 11R, (G) show the waveform of the grid voltage Vg of the driving transistors DRTr in sub-pixel 11W, and the waveform that (H) shows the source voltage Vs of the driving transistors DRTr in sub-pixel 11W.(C) of Fig. 9 shows the waveform that uses identical voltage axis to each in (F), and similarly, (G) of Fig. 9 and each in (H) show the waveform of the identical voltage axis of use.It should be noted that for convenience of explanation, with (C) of power supply signal DS(Fig. 9) and (D) of signal Sig(Fig. 9) identical waveform illustrates on identical voltage axis at (G) with Fig. 9 with (H).

Drive division 20 is at a horizontal cycle (1H) (initialization cycle P1) initialization sub-pixel 11R and 11W, and execution Vth correction, for suppressing the device of driving transistors DRTr, changes the impact of picture quality (Vth calibration cycle P2).Follow-up, drive division 20 is write sub-pixel 11R by pixel voltage VsigR, and carry out and be different from μ (mobility) correction (writing and μ calibration cycle P3) that Vth proofreaies and correct, and the luminescent device in sub-pixel 11R 19 sends the light (light period P4) having corresponding to the brightness of the pixel voltage VsigR writing.Afterwards, in a similar fashion, drive division 20 writes sub-pixel 11W by pixel voltage VsigW, and carry out μ (mobility) and proofread and correct (writing and μ calibration cycle P5), and the luminescent device in sub-pixel 11W 19 sends the light (light period P6) having corresponding to the brightness of the pixel voltage VsigW writing.Below, details has been described.

First, the moment t1 before initialization cycle P1, power line drive division 26 changes to power line signal DS voltage Vini(Fig. 9 (C) from voltage vcc p).This conducting each the driving transistors DRTr in sub-pixel 11R and 11W, cause each source voltage Vs in driving transistors DRTr to be arranged on (F) of voltage Vini(Fig. 9 and (H)).

Then, drive division 20 is at time period t 2 to t3(initialization cycle P1) during initialization sub-pixel 11R and 11W.More specifically, at moment t2, data wire drive division 27 is set in signal Sig voltage Vofs(Fig. 9 (D)), and scanning line driving portion 23 changes to high level ((A) of Fig. 9 and (B)) by each the voltage in sweep signal WSA and WSB from low level.This conducting in each of sub-pixel 11R and 11W, write transistor WSTr, cause the grid voltage Vg of the driving transistors DRTr in each of sub-pixel 11R and 11W to be set at (E) of voltage Vofs(Fig. 9 and (G)).Like this, the grid-source voltage Vgs of driving transistors DRTr in each of sub-pixel 11R and 11W (=Vofs – Vini) is set at the voltage larger than the threshold voltage vt h of driving transistors DRTr, has caused realizing each the initialization of sub-pixel 11R and 11W.

Subsequently, drive division 20 is at time period t 3 to t4(Vth calibration cycle P2) during carry out Vth and proofread and correct.More specifically, power line drive division 26 changes to power supply signal DS voltage vcc p(Fig. 9 (C) from voltage Vini at moment t3).This makes the driving transistors DRTr in each of sub-pixel 11R and 11W move in saturation region, and therefore, electric current I ds flows to source electrode from the drain electrode of each driving transistors DRTr, causes the increase ((F) of Fig. 9 and (H)) of source voltage Vs.In this case, in this example, source voltage Vs is lower than the voltage Vcath of the negative electrode of luminescent device 19, and therefore, luminescent device 19 remains on reverse biased state, causes not having electric current to flow through luminescent device 19.Like this, along with the increase of source voltage Vs, grid-source voltage Vgs reduces, and causes reducing of electric current I ds.This negative feedback operation makes electric current I ds towards " 0(zero) " convergence.In other words, the grid-source voltage Vgs of the driving transistors DRTr in each of sub-pixel 11R and 11W converges the threshold voltage vt h(Vgs=Vth that equals driving transistors DRTr).

Afterwards, scanning line driving portion 23 changes to low level ((A) of Fig. 9 and (B)) by each the voltage in sweep signal WSA and WSB from high level at moment t4.This has disconnected and has write transistor WSTr in each of sub-pixel 11R and 11W.Meanwhile, data wire drive division 27 is set in signal Sig pixel voltage VsigR(Fig. 9 (D)).

Afterwards, during time period t 5 to t6, (write and μ calibration cycle P3), drive division 20 is written to sub-pixel 11R by pixel voltage VsigR, and carries out μ and proofread and correct.More specifically, scanning line driving portion 23 changes to high level (Fig. 9 (A)) by the voltage of sweep signal WSA from low level at moment t5.This conducting in sub-pixel 11R, write transistor WSTr, and the grid voltage Vg of the driving transistors DRTr in sub-pixel 11R is elevated to pixel voltage Vsig(Fig. 9 (E) from voltage Vofs).In this case, the grid-source voltage Vgs of driving transistors DRTr becomes and is greater than threshold voltage vt h(Vgs>Vth), and electric current I ds flows to source electrode from drain electrode, causes the rising (Fig. 9 (F)) of the source voltage Vs of driving transistors DRTr.The impact (μ correction) that the device that this negative feedback operation has suppressed driving transistors DRTr changes, and the grid-source voltage Vgs of driving transistors DRTr is set in to the voltage Vemi corresponding to pixel voltage Vsig.For example it should be noted that, in the open No.2006-215213 of Japanese unexamined patent, described this method that μ proofreaies and correct.

Then, drive division 20 allows the time period luminous (light period P4) of sub-pixel 11R after moment t6.More specifically, scanning line driving portion 23 changes to low level (Fig. 9 (A)) by the voltage of sweep signal from high level at moment t6.This has disconnected and has write transistor WSTr in sub-pixel 11R, the driving transistors DRTr in sub-pixel 11R is placed in to floating dummy status (floating state), cause the voltage between the terminal of capacitor Cs, that is, the grid-source voltage Vgs of driving transistors DRTr is kept from that time.Follow-up, along with electric current I ds flows through driving transistors DRTr, the source voltage Vs of driving transistors DRTr raises (Fig. 9 (F)), therefore, and the grid voltage Vg of driving transistors DRTr also raise (Fig. 9 (E)).Then, when the source voltage Vs of driving transistors DRTr become be greater than the threshold voltage Vel of luminescent device 19 and voltage Vcath and (Vel+Vcath) time, electric current flows between the anode of luminescent device 19 and negative electrode, this causes from luminescent device 19 luminous.That is, source voltage Vs is elevated to the degree corresponding to the device variation of luminescent device 19, causes from luminescent device 19 luminous.

Subsequently, data wire drive division 27 is set in signal Sig pixel voltage VsigW(Fig. 9 (D)).

Afterwards, drive division 20 is written to sub-pixel 11W by pixel voltage VsigW, and during time period t 8 to t9, (writes and μ calibration cycle P5) execution μ correction.More specifically, scanning line driving portion 23 changes to high level (Fig. 9 (B)) by the voltage of sweep signal WSB from low level at moment t8.As situation about writing with μ calibration cycle P3, this has caused that pixel voltage VsigW is written to sub-pixel 11W and μ proofreaies and correct.

Afterwards, drive division 20 allows the time period luminous (light period P6) of sub-pixel 11W after moment t9.More specifically, scanning line driving portion 23 changes to low level (Fig. 9 (B)) by the voltage of sweep signal WSB from high level at moment t9.As the situation of light period P4, the luminescent device 19 in this guide pixel 11W is luminous.

Follow-up, in display unit 1, passing through predetermined amount of time (frame period) afterwards, there is the transfer from light period P4 and P6 to initialization cycle P1.Drive division 20 drives display part 10 to repeat this sequence of operations.

(about rake PS)

In display unit 1, in sub-pixel 11, be provided with a plurality of window WIN, and be provided with the rake PS on insulating barrier 213 in the mode around each window WIN.Below, describe the function of rake PS in detail.

Figure 10 shows near the example of the analog result of light beam window WIN.Figure 10 shows the downside from luminescent layer 214() how the light that sends to propagate towards display surface side (upside).As shown in figure 10, at window WIN, light sends in all directions from luminescent layer 214.More specifically, for example, the light sending from luminescent layer 214 can be propagated (upward direction of Figure 10) in the direction perpendicular to luminescent layer 214, or any direction that can depart from the direction from perpendicular to luminescent layer 214 is propagated.A part for the light that the direction departing from the direction from perpendicular to luminescent layer 214 is propagated enters the rake PS insulating barrier 213, is reflected.That is, in rake PS, as shown in Figure 8, have insulating barrier 213 and insulating barrier 216 placement adjacent one another are of refractive indices that are different from, and luminescent layer 214 and negative electrode 215 insert between the two, therefore, this species diversity of refractive index causes light to be reflected.Afterwards, reverberation is propagated towards display surface side, thereby is extracted to the outside of display part 10.

As mentioned above, in display part 10, rake PS arranges in the mode around window WIN, and this makes to improve light is extracted to outside efficiency.In other words, for example, if rake PS is not set, the light that the direction departing from the direction from perpendicular to luminescent layer 214 is sent likely will die down in display part inside, or be stopped by black battle array 219.In this case, the ratio that the outside light that is extracted to display part is accounted for to the whole light that send from luminescent layer 214 reduces, and causes the reduction of light extraction efficiency.On the other hand, in display part 10, be provided with rake PS, and light is reflected on rake PS, makes to improve light extraction efficiency.

For reverberation effectively on rake PS, each parameter is preferably set in such a way.More specifically, when the refractive index of insulating barrier 216 is n1, and the refractive index of insulating barrier 213 is while being n2, expects that these refractive index ns 1 and n2 meet following expression formula.

1.1≤n1≤1.8…(1)

n1–n2≥0.20…(2)

In addition Desired Height H and diameter R1 and R2(Fig. 8) can meet following expression formula.

0.5≤R1/R2≤0.8…(3)

0.5≤H/R1≤2.0…(4)

Expectation can be by comprising that each in these parameters of refractive index n 1 and n2, height H and diameter R1 and R2 is defined as meeting other standards meeting above-mentioned expression formula (1) to the scope of (4), such as brightness visual angle.

In addition, in display part 10, be provided with a plurality of such window WIN, and be provided with rake PS in the mode around each window WIN, this makes the rake PS that can effectively use at a plurality of window WIN, and improves light is extracted to outside efficiency.

In addition, in display part 10, be provided with a plurality of such window WIN, this allows to reduce power consumption.More specifically, in display part 10, than the situation that is provided with single larger window, aperture ratio may reduce because of the setting of a plurality of window WIN.Yet, even in this case, by improving as mentioned above, light is extracted to outside efficiency, also can realize the equal brightness in sub-pixel 11.Particularly, for example, even because the setting of a plurality of window WIN makes aperture ratio reduce half, by light extraction efficiency is increased to twice, also can realize the equal brightness in sub-pixel 11 and can not change the current density in luminescent layer 214.Like this, by reducing aperture ratio in the current density in keeping luminescent layer 214, can reduce power consumption.In addition, for example, even if aperture ratio has reduced half, when making light extraction efficiency increase twice or when more, even if reduce the current density in luminescent layer 214, also can realizing the brightness that is equal in sub-pixel 11.In this case, allow further to reduce power consumption.In addition, can also suppress aging (aging) rotten (so-called aging (burn-in)) in the characteristics of luminescence.In other words, the organic EL layer that forms luminescent layer 214 may easily cause aged deterioration along with the increase of current density conventionally, and therefore, this reduction of current density has reduced the possibility of aged deterioration, makes to improve picture quality.

In addition,, in display part 10, arranging of a plurality of window WIN allows more easily to manufacture display part 10.More specifically, the diameter R1 that is arranged to reduce each window WIN of a plurality of window WIN, therefore, allows the height H (thickness) of insulating barrier 213 less as represented in expression formula (4).Because this insulating barrier 213 can for example be used the photo anti-corrosion agent material such as acrylic acid, polyimides and novolaks (novolac), by photoetching, form, therefore can in less time quantum, with less thickness, form insulating barrier 213.Like this, be provided with a plurality of window WIN in display part 10, therefore, can in less time quantum, form insulating barrier 213, this makes easy manufacture.

[beneficial effect]

As described up till now, in this execution mode of the present disclosure, be provided with a plurality of windows, and be provided with rake PS in the mode around each window, this makes to improve light is extracted to outside efficiency and reduces power consumption.

In this execution mode of the present disclosure, be provided with a plurality of windows, therefore, can reduce the thickness of insulating barrier, this allows more easily to manufacture display part.

[modification 1-1]

In above-mentioned execution mode of the present disclosure, window WIN forms round-shaped.Yet this shape is not limited to this, and it is for example oval alternatively.This makes to improve the degree of freedom of the layout of window WIN.Wherein oval-shaped window WIN will be that effective example can comprise following situation: wherein, when having arranged circular window WIN, left space, but to form by circular each the window WIN that makes that stretches in direction the space that oval-shaped mode can Waste reduction.In this case, allow the area of each window WIN larger, this makes to improve aperture ratio, and at window WIN, forms luminescent layer 214 and negative electrode 215 more equably in process of production.In addition, forming oval-shaped window WIN allows at specific direction expansion visual angle.; as shown in figure 11; due to than short-axis direction (Figure 11 (A)), light the direction from perpendicular to major axes orientation (Figure 11 (B)) larger the direction diffusion that departs from, therefore can be at the upper visual angle that expands of the direction (major axes orientation) that depend on the direction of orientation of window WIN.Alternatively, vertical oblong window WIN and the oblong window WIN of level can be set.In this case, can all expand visual angle with horizontal direction in the vertical direction.

[modification 1-2]

In above-mentioned execution mode of the present disclosure, three window WIN are set in the region of each anode 212.Yet configuration is not limited to this, and can illustrate as Figure 12 A to 12C, consider that the thickness (height H) etc. of aperture ratio, insulating barrier 213 arranges the window WIN of any amount.Particularly, for example, only window WIN(Figure 12 A can be set), eight window WIN(Figure 12 B) or 12 window WIN(Figure 12 C).In addition, as shown in Figure 13 A to 13F, even if varying in size of the contact 205 in the above-mentioned execution mode of the size of contact 205 and the disclosure, also can, to meet the mode of relevant contact 205 and the design rule of the distance of each window WIN, arrange the window WIN of any amount.

[modification 1-3]

In above-mentioned execution mode of the present disclosure, window WIN forms circle.Yet this shape is not limited to this, and for example, it can be the quadrangle such as square and rectangle as shown in Figure 14 A and Figure 14 B alternatively.For example it should be noted that, tetragonal four angles can be circular.In this case, in expression formula (3) and (4), can use the spacing of opposite side (x in Figure 14 A and y) to replace diameter.More specifically, spacing x1 and the spacing x2 in display surface side in expectation anode electrode 212 sides meet following expression formula (5) and (6), and the spacing y1 in anode electrode 212 sides and the spacing y2 in display surface side satisfied following expression formula (7) and (8).

0.5≤x1/x2≤0.8…(5)

0.5≤H/x1≤2.0…(6)

0.5≤y1/y2≤0.8…(7)

0.5≤H/y1≤2.0…(8)

[modification 1-4]

In above-mentioned execution mode of the present disclosure, contact 205 forms square.Yet this shape is not limited to this, and contact 205 can form circle, and can have the size of the window WIN being roughly equal to shown in Figure 15.In this case, can more effectively in finite region, arrange contact 205 and window WIN.In addition, as shown in figure 16, contact 205 and window WIN can arrange with close heap configuration mode (close-packed arrangement).In this close heap configuration mode, for example, three window WIN can be arranged as adjacent one another are.This allows further more effectively to arrange contact 205 and window WIN.In this case, each limit of the profile of formation anode 212 is all arranged on the gap between contact 205 and window WIN.As a result, in this example, extend in the horizontal direction on top margin and the base of anode 212, but each in two left sides and two the right forms letter " V " shape, and each in these limits extended in the directions that departing from about 60 degree from horizontal direction.

[modification 1-5]

In above-mentioned execution mode of the present disclosure, as shown in Figure 4, insulating barrier 216 is formed on negative electrode 215.Yet this configuration is not limited to this.This insulating barrier 216 has and prevents from invading the characteristic variations such as luminous efficiency that luminescent layer 214 causes by moisture.Yet, in the situation that can solve this moisture by any other technology, invade the variety of issue causing, as shown in figure 17, can omit insulating barrier 216.In this example, negative electrode 215 is attached to substrate 220, and on substrate 220, colour filter 218 and black battle array 219 form from the teeth outwards, and the insulating barrier 217D making for the resin sealing is between colour filter 218 and black battle array 219 and negative electrode 215.As the insulating barrier 213 in the above-mentioned execution mode of the disclosure and 216 refractive index, so that the mode that the light entering from insulating barrier 217D side is reflected at the rake PS of the insulating barrier 213 around window WIN, the refractive index of insulating barrier 213 and 217D is set.In this case, when the refractive index of insulating barrier 217D is n1, and the refractive index of insulating barrier 213 is while being n2, and expectation meets expression formula (1) and (2).

[modification 1-6]

In above-mentioned execution mode of the present disclosure, as shown in Figure 4 and Figure 5, be provided with the luminescent layer 214 that sends ruddiness, green glow, blue light and white light.Yet this configuration is not limited to this, and as shown in Figure 18 and Figure 19, the luminescent layer 320 that sends white light can be set alternatively.Luminescent layer 320 is by Yellow luminous layer 314 and blue light-emitting layer 315 configurations.In this case, Yellow luminous layer 314 is arranged in anode 212 sides, and blue light-emitting layer 315 is arranged in negative electrode 215 sides.Yellow luminous layer 314 is organic EL layers of transmitting gold-tinted, and blue light-emitting layer 315 is organic EL layers of transmitting blue light.From Yellow luminous layer 314 gold-tinted sending, become white light with the blue light of sending from blue light-emitting layer 315.Follow-up, as shown in figure 19, in sub-pixel 11R, 11G and 11B, by red (R), green (G) and the colour filter 218 of blue (B), red composition, green composition and blue composition are exported from this white light is separated respectively.In addition,, in sub-pixel 11W, by white (W) colour filter 218, regulate the colour gamut of white light.It should be noted that in this example, on luminescent layer 320, Yellow luminous layer 314 is arranged in anode 212 sides, and blue light-emitting layer 315 is arranged in negative electrode 215 sides.Yet this layout is not limited to this, and alternatively, for example, Yellow luminous layer 314 can be arranged in negative electrode 215 sides, and blue light-emitting layer 315 can be arranged in anode 212 sides.

(2. the second execution mode)

Next, will describe according to the display unit 2 of the disclosure the second execution mode.Different shape and the layouts that are anode electrode of the second execution mode and above-mentioned the first execution mode.Those similar (Fig. 1) of any other configuration and above-mentioned the first execution mode of the present disclosure.It should be noted that and be denoted by like references according to those the essentially identical any parts in the display unit 1 of above-mentioned the first execution mode, and suitably omit its associated description.

As shown in Figure 1, display unit 2 comprises display part 30.As the following describes, the pixel Pix in display part 30 is by red, green, blue and white four sub pixel 12 configurations.

Figure 20 shows the arrangement examples of the sub-pixel 12 in display part 30.Each pixel Pix has respectively redness (R), green (G), blue (B) and white (W) four sub-pixel 12R, 12G, 12B and 12W.Each sub-pixel 12 has hexagonal shape.In this example, in pixel Pix, sub-pixel 12R and sub-pixel 12W in the vertical direction (longitudinal direction) are arranged side by side, and sub-pixel 12G and sub-pixel 12B are arranged side by side in the vertical direction.In addition, in the vertical direction, sub-pixel 12R and 12W are arranged as from sub-pixel 12G and 12B and are offset sub-pixel 12 sizes half.More specifically, in pixel Pix, sub-pixel 12G is arranged in the upper right side of sub-pixel 12R, and sub-pixel 12B is arranged in the upper right side of sub-pixel 12W.In other words, in display part 30, three sub-pixels 12 are arranged as adjacent one another are.

Figure 21 shows the anode arrangement in pixel Pix.Pixel Pix is provided with four anode 312R, 312G, 312B and 312W.Anode 312R, 312G, 312B and 312W are respectively used to sub-pixel 12R, 12G, 12B and 12W.As sub-pixel 12R, 12G, 12B and the 12W shown in Figure 20, each in these anodes 312R, 312G, 312B and 312W has hexagonal shape, and anode 312G and 312B are arranged as in the vertical direction (longitudinal direction) from anode 312R and 312W skew.In other words, for example, three anodes 312 are arranged as adjacent one another are.For example it should be noted that, hexagonal six angles can be round.On the other hand, circuit region 15G arranges with 15B the position that is that circuit region 15R is identical with 15W in the vertical direction.Each in anode 312R, 312G, 312B and 312W is connected with each the source electrode of driving transistors DRTr being formed in circuit region 15R, 15G, 15B and 15W via contact 205 respectively.

In this example, each in these anodes 312 has in the horizontal direction hexagonal shape rather than the regular hexagon that (transverse direction) extends.This makes further to increase the size of anode 312.More specifically, if anode 312 forms regular hexagon, as shown in figure 22, the spacing between anode 312 in the horizontal direction (transverse direction) is widened.In order to effectively utilize this space, as shown in figure 21, anode 312 can preferably form the hexagonal shape of extending in the horizontal direction.In this case, anode 312 can preferably adopt by statu quo expanding in the horizontal direction the shape that regular hexagon forms.In this case, the angle forming between each in limit, hexagonal upper left, left lower side, top right-hand side and limit, bottom right and horizontal direction becomes 60 degree or less.In addition, for example, by extending top margin and base, regular hexagon can extend in the horizontal direction, the angle forming is remained on to 60 degree between each and horizontal direction in limit, hexagonal upper left, left lower side, top right-hand side and limit, bottom right simultaneously.It should be noted that in the situation that there is no need to expand anode 312, can adopt configuration as shown in Figure 2.

Figure 23 has schematically shown the layout of the window WIN in each anode 312.As shown in figure 21, each in anode 312R, 312G, 312B and 312W forms away from each other.Yet for convenience of explanation, Figure 23 is depicted as these anodes that they are placed adjacent to each other seemingly.In this example, six window WIN in each in anode 312R, 312G, 312B and 312W, have been arranged.In this example, window WIN has ellipse.In this example, in each in anode 312R, 312G, 312B and 312W, with close heap configuration mode, five window WIN have been arranged.In other words, for example, three window WIN can be arranged as and be adjacent to each other.As above-mentioned execution mode of the present disclosure, in the peripheral region of window WIN, on insulating barrier 213, be provided with rake PS.

As mentioned above, in display part 30, anode 312 forms hexagonal shape, and oval-shaped window WIN arranges with close heap configuration mode.In other words, the shape that anode 312 forms is corresponding to the arrangement of window WIN.This makes in the region of anode 312, effectively to arrange a plurality of window WIN.In this case, when anode 312 is configured to when in statu quo expanding in the horizontal direction the shape that regular hexagon forms, can, by the shape of window WIN is changed over to the ellipse amplifying with the identical ratio of the magnification ratio with anode 312 from circle, easily realize close heap configuration mode.

In addition, in display part 30, each in anode 312 forms the hexagonal shape of extending in the horizontal direction, and so that anode 312G and 312B arrange from the mode of anode 312R and 312W skew in the vertical direction.This allows effectively to arrange anode 312 in display part 30.

As described up till now, in present embodiment of the present disclosure, each anode forms hexagonal shape, and the window with elliptical shape is arranged with close heap configuration mode.This makes effectively to arrange anode, and in the region of anode, effectively arranges a plurality of windows.Any other effect and above-mentioned the first execution mode of the present disclosure are similar.

[modification 2-1]

In above-mentioned execution mode of the present disclosure, in the region of each anode 312, be provided with six window WIN.Yet configuration mode is not limited to this, and as shown in Figure 24 A to 24D, alternatively, can arrange no more than five or be no less than the window WIN of seven.For example, in Figure 24 D, window WIN is arranged to seven row.Like this, when window WIN is arranged to odd-numbered line, can arrange all window WIN with close heap configuration mode.It should be noted that as shown in Figure 24 B and 24C, even when window WIN is arranged to even number line, also can arrange with close heap configuration mode the first half of window WIN and the latter half of arranging window WIN with close heap configuration mode.

[modification 2-2]

In above-mentioned execution mode of the present disclosure, window WIN forms ellipse.Yet this shape is not limited to this, for example, as shown in Figure 25 A to 25F, window WIN can be circular.Alternatively, as shown in Figure 26 A, oval-shaped window WIN and circular window WIN can be set.In addition,, as shown in Figure 26 B, perpendicular oblong window WIN and the oval-shaped window WIN that grows crosswise can be set.In this case, can widen the visual angle of horizontal direction and the visual angle of vertical direction.

(3. the 3rd execution mode)

Next, will describe according to the display unit 3 of the disclosure the 3rd execution mode.In this embodiment, pixel Pix is by red, green and blue three subpixel configuration.It should be noted that with those the essentially identical any parts according to the display unit 1 of above-mentioned the first execution mode and be partly denoted by like references, and suitably omitted its associated description.

As shown in Figure 1, display unit 3 comprises display part 40 and drive division 50.As the following describes, the pixel Pix in display part 40 is by red, green and blue three pixels, 13 configurations.Drive division 50 has picture signal handling part 51, scanning line driving portion 53, power line drive division 56 and data wire drive division 57.

Figure 27 shows the arrangement examples of the sub-pixel 13 in display part 40.Each pixel Pix has respectively redness (R), green (G) and blue (B) three sub-pixel 13R, 13G and 13B.Each sub-pixel 13 extends in the vertical direction, and with said sequence, is arranged side by side in the horizontal direction in pixel Pix.

Figure 28 shows the Circnit Layout example of display part 40.Display part 40 has a plurality of scan line WSL that extend in the row direction.Scan line WSL is corresponding to scan line WSAL and WSBL in above-mentioned the first execution mode.One end of scan line WSL is connected with scanning line driving portion 53.The sub-pixel 13R, the 13G that belong to a pixel Pix are connected with same power line PL with same scan line WSL with 13B.In addition the sub-pixel 13R, the 13G that, belong to a pixel Pix are connected with the holding wire DTL differing from one another with 13B.

The picture signal Sdisp that 51 pairs of picture signal handling parts provide from outside carries out the predetermined process operation such as gamma conversion, with synthetic image signal Sdisp2.Scanning line driving portion 53 is sequentially provided to a plurality of scan line WSL according to the control signal providing from timing generating unit 22 by sweep signal WS, thus selective sequential sub-pixel 13.Power line drive division 56 sequentially applies power supply signal DS to a plurality of power line PL according to the control signal providing from timing generating unit 22, to control light emission operation and the delustring operation of sub-pixel 13.According to the picture signal Sdisp2 providing from picture signal handling part 51 and the control signal that provides from timing generating unit 22, data wire drive division 57 generates signal Sig, it comprises the pixel voltage Vsig of the luminosity of indicating each sub-pixel 13 and the voltage Vofs proofreading and correct for carrying out the Vth that describes below, the sort signal of generation is put on to each data wire DTL.

Figure 29 shows the anode arrangement in pixel Pix.Pixel Pix is provided with three anode 412R, 412G and 412B and circuit region 17R, 17G and 17B.Anode 412R, 412G and 412B are respectively the anodes in sub-pixel 13R, 13G and 13B.As sub-pixel 13R, 13G and the 13B shown in Figure 27, these anodes 412R, 412G and 412B extend in the vertical direction, and with this, are sequentially arranged side by side in the horizontal direction.Circuit region 17R is the region of the device the luminescent device 19 being wherein provided with in sub-pixel 13R, circuit region 17G is the region of the device the luminescent device 19 being wherein provided with in sub-pixel 13G, and circuit region 17B is the region of the device the luminescent device 19 being wherein provided with in sub-pixel 13B.As anode 412R, 412G and 412B, these circuit regions 17R, 17G and 17B extend in the vertical direction, and with this, are sequentially arranged side by side in the horizontal direction.Anode 412R, 412G are connected with the source electrode that is formed on the driving transistors DRTr in each of circuit region 17R, 17G and 17B via contact 205 with each in 412B.

Figure 30 has schematically used the layout of the window WIN in each anode 412.As shown in figure 29, each in anode 412R, 412G and 412B forms away from each other.Yet for convenience of explanation, Figure 30 is depicted as these anodes seemingly by these anodes and places adjacent to each other.In this example, in each region of anode 412R, 412G and 412B, two window WIN are arranged side by side in the vertical direction.In this example, window WIN has the elliptical shape that has round angle.As above-mentioned execution mode of the present disclosure, in the peripheral region of these windows WIN, on insulating barrier 213, be provided with rake PS.

Figure 31 has used the sequential chart of the display operation in display unit 3, wherein, (A) show the waveform of sweep signal WS, (B) show the waveform of power supply signal DS, (C) show the waveform of signal Sig, (D) show the waveform of the grid voltage Vg of driving transistors DRTr, and the waveform that (E) shows the source voltage Vs of driving transistors DRTr.

As above-mentioned the first execution mode, drive division 50 is from time period t 12 to t13(initialization cycle P1) during (initialization cycle P1) initialization sub-pixel 13, and at time period t 13 to t14(Vth calibration cycle P2) during carry out Vth and proofread and correct.

Next, scanning line driving portion 53 changes to low level (Figure 31 (A)) by the voltage of sweep signal WS from high level at moment t14.This has disconnected and has write transistor WSTr.In addition,, at moment t15, data wire drive division 57 is set in signal Sig pixel voltage Vsig(Figure 31 (C)).

Follow-up, drive division 50 is written to sub-pixel 13 by pixel voltage Vsig, and writes and μ calibration cycle P13 in time period t 16 to t17() during carry out μ and proofread and correct.More specifically, scanning line driving portion 53 changes to high level (Figure 31 (A)) by the voltage of sweep signal WS from low level at moment t16.As a result, as above-mentioned the first execution mode, pixel voltage Vsig has been written to sub-pixel 13, and has carried out μ correction.

Afterwards, luminous during 50 time periods (light period P14) of permission sub-pixel 13 after moment t17 of drive division.More specifically, at moment t17, scanning line driving portion 53 changes to low level (Figure 31 (A)) by the voltage of sweep signal WS from high level.As above-mentioned the first execution mode, this causes the luminescent device 19 in sub-pixel 13 luminous.

As mentioned above, even if use three subpixel configuration pixels, also can realize and the similar effect of above-mentioned the first execution mode.

[modification 3-1]

In above-mentioned execution mode of the present disclosure, in the region of each anode 412, be provided with two window WIN.Yet this layout is not limited to this, and as shown in Figure 32 A to 32C, alternatively, a window WIN or three or more window WIN can be set.

[modification 3-2]

In above-mentioned execution mode of the present disclosure, all window WIN have identical shaped.Yet this configuration is not limited to this, and window WIN can have two or more difformities.More specifically, for example, as shown in figure 33, the window WIN and the perpendicular long window WIN that grow crosswise can be set in each anode 412.Alternatively, for example, as shown in figure 34, in specific pixel Pix, can arrange a plurality of window WIN that grow crosswise, and in the horizontal direction or in the vertical direction pixel Pix adjacent with above-mentioned pixel Pix, a plurality of perpendicular long window WIN can be set.

[modification 3-3]

In above-mentioned execution mode of the present disclosure, the shape of contact 205 and window WIN differs from one another.Yet this shape is not limited to this, for example, as shown in figure 35, the shape of contact 205 and window WIN can be almost identical.In this example, each in contact 205 and window WIN is circular.In this case, can more effectively in finite region, arrange contact 205 and window WIN.Alternatively, as shown in Figure 36 A to 36C, contact 205 and window WIN can arrange with the close heap configuration mode of what is called.In this case, each limit of the profile of formation anode 412 is arranged on the gap between contact 205 and window WIN.Therefore, in this example, extend at horizontal direction on top margin and the base of anode 412, and still each direction in the layout corresponding to contact 205 and window WIN in each in a plurality of left sides and a plurality of the right is extended.

(4. application example)

Next, will application example and the modification thereof of the display unit of describing in the above-described embodiment of the present disclosure be described.

Figure 37 shows the outward appearance that can apply according to the television equipment of any display unit of above-mentioned execution mode of the present disclosure etc.For example, this television equipment can have the image display screen portion 510 that comprises front panel 511 and filter glass 512, and this image display screen portion is by configuring according to any display unit of above-mentioned execution mode of the present disclosure etc.

According to the display unit of above-mentioned execution mode of the present disclosure etc., can be applied to the electronic equipment of all spectra, except this television equipment, also have such as digital camera, notebook-sized personal computer, the mobile terminal device that comprises mobile phone, portable game machine or video camera.In other words, according to the display unit of above-mentioned execution mode of the present disclosure etc., can be applied to show the electronic equipment of all spectra of image.

At present with reference to the execution mode of electronic equipment and modification and application example, this technology has been described.Yet this technology is not limited to above-mentioned execution mode etc., and can carry out various modifications.

For example, when a window WIN being set in each sub-pixel, window WIN can be arranged as shown in Figure 38 and 39.In Figure 38, pixel Pix is by red (R), green (G), blue (B) and white (W) four subpixel configuration.In Figure 39, pixel Pix is by red (R), green (G) and blue (B) three subpixel configuration.

In addition, for example, in each above-mentioned execution mode etc., each writing in transistor WSTr and driving transistors DRTr configured by NMOS.Yet this configuration is not limited to this, alternatively, one or two in these transistors can be configured by PMOS.

In addition,, in each above-mentioned execution mode etc., sub-pixel adopts so-called " 2Tr1C " configuration.Yet this configuration is not limited to this, and can configure sub-pixel by adding other devices arbitrarily.More specifically, for example, be similar to the sub-pixel 14A shown in Figure 40, can adopt so-called " 2Tr2C " configuration, it provides the capacitor being connected in parallel with luminescent device 19 Csub.Alternatively, for example, be similar to the sub-pixel 14B shown in Figure 41, can adopt so-called " 3Tr1C " configuration, it provides the power transistor DSTr that provides power supply signal SD to driving transistors DRTr for controlling.

In addition, for example, in each above-mentioned execution mode etc., use so-called top emission type luminescent device 19.Yet the type of luminescent device is not limited to this, for example, alternatively, can use emission type luminescent device of the so-called end, wherein, the light sending from luminescent layer 214 is in substrate 200(support substrates) direction propagate.

In addition, for example, in each above-mentioned execution mode etc., display unit has organic EL display device.Yet display unit is not limited to this, as long as and there is current-driven display, any display unit can be used.

From above-mentioned illustrative embodiments of the present disclosure and modification, can realize at least one following configuration.

(1) display unit, comprises the pixel with a plurality of sub-pixels, and each comprises a plurality of luminous zones of arranging apart from each other described sub-pixel,

Each comprises described sub-pixel:

Single the first electrode,

Be arranged on single second electrode of the laminating direction of described the first electrode, and

Described in each, in luminous zone, insert in the luminescent layer between described the first electrode and described the second electrode.

(2) according to the display unit (1) described, wherein,

Each comprises the first insulating barrier on described the first electrode described sub-pixel, and described the first insulating barrier has a plurality of windows corresponding with described luminous zone, and

Described the first electrode, described luminescent layer and described the second electrode be the bottom of window lamination in order described in each at least.

(3) according to the display unit (2) described, wherein,

Each comprises the second insulating barrier described sub-pixel, and described the second insulating barrier forms whole region and the tool refractive index different from the refractive index of described the first insulating barrier that covers described sub-pixel, and

Meet following expression formula (1) and (2),

1.1≤n1≤1.8…(1)

n1–n2≥0.20…(2)

Wherein, n1 is the refractive index of described the second insulating barrier, and

N2 is the refractive index of described the first insulating barrier.

(4) according to the display unit (2) described, wherein, the described window of described the first insulating barrier has truncated cone, and

Meet following expression formula (3) and (4),

0.5≤R1/R2≤0.8…(3)

0.5≤H/R1≤2.0…(4)

Wherein, H is the height of described the first insulating barrier, and R1 is the window diameter of the bottom of described window, and R2 is the window diameter on the top of described the first insulating barrier.

(5) according to the display unit described in any one in (1) to (4), wherein, described in each, luminous zone has circle or ellipse.

(6) according to the display unit (5) described, wherein, each comprises having oval-shaped two kinds of luminous zones that major axes orientation differs from one another described sub-pixel.

(7) according to the display unit (5) or (6) described, wherein,

Each comprises three or more luminous zones described sub-pixel, and

It is adjacent one another are that all or part of luminous zone that belongs to a sub-pixel is arranged to three luminous zones that allow in described all or part of luminous zone.

(8) according to the display unit (7) described, wherein, described the first electrode has hexagonal shape.

(9) according to the display unit (8) described, wherein,

A relative opposite side in six limits of described the first electrode has the length being equal to each other,

Four limits except a described opposite side have the length being equal to each other, and

The length of a described opposite side is longer than the length on described four limits.

(10) according to the display unit (9) described, be further included in the holding wire that first direction extends,

Wherein

A described opposite side is extending upward with the crossing second party of described first direction.

(11) according to the display unit described in any one in (8) to (10), wherein,

Described pixel comprises four sub-pixels, and

It is adjacent one another are that four the first electrodes in described four sub-pixels are arranged to three the first electrodes that allow in described four the first electrodes.

(12) according to the display unit (7) described, wherein,

It is adjacent one another are that all luminous zones that belong to a sub-pixel are arranged to three luminous zones that allow in described all luminous zones, and

Described the first electrode has the polygonal shape corresponding to the layout of the luminous zone in a described sub-pixel.

(13) according to the display unit (12) described, wherein, described pixel has three or four sub-pixels.

(14) according to the display unit described in any one in (1) to (4), wherein, each has quadrangle form described a plurality of luminous zones.

(15) according to the display unit (14) described, wherein,

Described luminous zone has rectangular shape, and

Described in each, sub-pixel comprises two kinds of luminous zones with the long side direction differing from one another.

(16) according to the display unit (14) described, comprise a plurality of described pixels, wherein,

Described luminous zone has rectangular shape, and

Luminous zone in a pixel has the long side direction that is different from the luminous zone in another pixel adjacent with a described pixel.

(17) according to the display unit described in any one in (1) to (16), further comprise:

A plurality of described pixels; And

The holding wire extending at first direction, wherein,

Each further comprises the image element circuit being formed in image element circuit district described sub-pixel, and

Described image element circuit district is arranged side by side at described first direction and with the crossing second direction of described first direction.

(18) according to the display unit described in any one in (1) to (17), wherein, described the second electrode in described sub-pixel is connected to each other.

(19) electronic equipment, is provided with the control part that display unit and being configured to is controlled the operation of described display unit, and described display unit comprises the pixel with a plurality of sub-pixels, and each comprises a plurality of luminous zones of arranging apart from each other described sub-pixel,

Each comprises described sub-pixel:

Single the first electrode,

Described in each, in luminous zone, insert the luminescent layer between described the first electrode and described the second electrode.

Those skilled in the art will appreciate that as long as in the scope of appended claims or its equivalent, according to designing requirement and other factors, can carry out various modifications, combination, inferior combination and change.

Claims

1. a display unit, comprises the pixel with a plurality of sub-pixels, and each comprises a plurality of luminous zones of arranging apart from each other described sub-pixel,

Each comprises described sub-pixel:

Single the first electrode,

2. display unit according to claim 1, wherein,

3. display unit according to claim 2, wherein,

Meet following expression formula (1) and (2),

1.1≤n1≤1.8…(1)

n1–n2≥0.20…(2)

N2 is the refractive index of described the first insulating barrier.

4. display unit according to claim 2, wherein, the described window of described the first insulating barrier has truncated cone, and

Meet following expression formula (3) and (4),

0.5≤R1/R2≤0.8…(3)

0.5≤H/R1≤2.0…(4)

5. display unit according to claim 1, wherein, described in each, luminous zone has a kind of shape in circular and ellipse.

6. display unit according to claim 5, wherein, each comprises having oval-shaped two kinds of described luminous zones that major axes orientation differs from one another described sub-pixel.

7. display unit according to claim 5, wherein,

Each comprises three or more described luminous zones described sub-pixel, and

It is adjacent one another are that all or part of described luminous zone that belongs to a sub-pixel is arranged to three luminous zones that allow in described all or part of luminous zone.

8. display unit according to claim 7, wherein, described the first electrode has hexagonal shape.

9. display unit according to claim 8, wherein,

10. display unit according to claim 9, is further included in the holding wire that first direction extends, wherein

11. display units according to claim 8, wherein,

Described pixel comprises four described sub-pixels, and

12. display units according to claim 7, wherein,

It is adjacent one another are that all described luminous zone that belongs to a sub-pixel is arranged to three luminous zones that allow in all described luminous zones, and

13. display units according to claim 12, wherein, described pixel has three or four described sub-pixels.

14. display units according to claim 1, wherein, each has quadrangle form described a plurality of luminous zones.

15. display units according to claim 14, wherein,

Described luminous zone has rectangular shape, and

16. display units according to claim 14, comprise a plurality of described pixels, wherein,

Described luminous zone has rectangular shape, and

The long side direction of the luminous zone in a pixel is different from the long side direction of the luminous zone in another pixel adjacent with a described pixel.

17. display units according to claim 1, further comprise:

A plurality of described pixels; And

The holding wire extending at first direction, wherein,

18. display units according to claim 1, wherein, described the second electrode in described sub-pixel is connected to each other.

19. 1 kinds of electronic equipments, are provided with the control part that display unit and being configured to is controlled the operation of described display unit, and described display unit comprises the pixel with a plurality of sub-pixels, and each comprises a plurality of luminous zones of arranging apart from each other described sub-pixel,

Each comprises described sub-pixel:

Single the first electrode,

20. electronic equipments according to claim 19, wherein,