CN104103313B

CN104103313B - Nonvolatile memory and its programmed method

Info

Publication number: CN104103313B
Application number: CN201310115284.4A
Authority: CN
Inventors: 蔡文哲; 蔡秉宏
Original assignee: Macronix International Co Ltd
Current assignee: Macronix International Co Ltd
Priority date: 2013-04-03
Filing date: 2013-04-03
Publication date: 2017-10-24
Anticipated expiration: 2033-04-03
Also published as: CN104103313A

Abstract

The invention discloses a kind of Nonvolatile memory system, including：One bit line and the multiple memory cell associated with bit line, multiple memory cell are associated with the bit line, and couple in a series arrangement.The storage system is further comprising a control circuit being in communication with each other with the memory cell, the target unit that wherein described control circuit programming one is chosen from memory cell, the programming is used for promoting hot carrier to be injected into the target unit by applying a bit-line voltage to bit line.The circuit also applies program voltage on target unit under hot carrier injection mechanism.In addition, the circuit applies a control voltage in the corresponding control unit adjacent with indivedual target units when programming the target unit, wherein the control voltage depends on the threshold voltage of described control unit and the control voltage is less than the program voltage.

Description

Nonvolatile memory and its programmed method

Technical field

The present invention relates to a kind of nonvolatile memory and its programmed method, especially for flash memory.

Background technology

Hot carrier injection is a kind of programming mechanism for nonvolatile memory.It is typically the laterally electricity for lifting passage Higher level is arrived in field, the condition of hot carrier injection is reached with this, such as more than 10⁵V/cm.A kind of traditional hot carrier note of Fig. 1 displays The programmed method entered.The storage band of the multiple memory cell of Fig. 1 display tools is connected in a series arrangement.Doped region 14 and 16 is configured In end, and coupled respectively with switching MOS12 and 11.Hot carrier injection program is carried out to selected unit 10, adulterated Area 14 should receive a channel voltage, and the channel voltage is above the ground level and the optimal of doped region 16 is set to ground connection.Switching MOS11 and 12 is all turned on, and other units apply one by being likely to form potential difference in voltage, therefore flush type passage.One compiles Journey voltage is put on the grid of selected unit 10, allows hot carrier to penetrate the trapping layer of unit 10 with this.Element is carried using heat Sub- injection mechanism, relatively low program voltage is enjoyed relative to FN tunneling mechanisms.

As shown in figure 1, when control gate is applied in program voltage, the hot carrier of generation all answers described into selected Unit 10.However, the size of element reduces rapidly, the distance between each unit shortens so that hot carrier may pass through selected list Member 10 and the non-anticipation region of entrance, such as its adjacent cells 18.Therefore, the hot carrier of overreaction cause unit 18 interference and Perform a unexpected programming.

The content of the invention

It is an object of the invention to provide a kind of circuit and a programmed method, mechanism program storage band is injected with hot carrier During interior target unit, the interference to mitigate adjacent cells.Generally, adjacent cells be located at as with the bit line coupling The band selection transistor side for the switching closed.One control voltage is applied to adjacent list according to the threshold voltage of adjacent cells Member.

In a certain embodiment, a kind of Nonvolatile memory system, including a bit line and associated with bit line multiple deposit Storage unit, multiple memory cell are associated with the bit line, and couple in a series arrangement.The storage system further include with The control circuit that the memory cell is in communication with each other, wherein the mark that the control circuit programming one is chosen from memory cell Target unit, the programming is used for promoting hot carrier to be injected into the target unit by applying a bit-line voltage to bit line. The circuit also applies program voltage on target unit under hot carrier injection mechanism.In addition, the circuit is described in programming Apply a control voltage during target unit in the corresponding control unit adjacent with indivedual target units, wherein the control electricity The threshold voltage and the control voltage that pressure depends on control unit are less than the program voltage.

In a certain embodiment, a kind of Nonvolatile memory system with storage array.The non-volatile memories system System includes multiple bit lines, and every bit line is coupled with a storage band, and plurality of memory cell is connected in a series arrangement.It is non-easy The property lost storage system further includes a control circuit and is in communication with each other with the storage array, wherein described control circuit programming from depositing Store up multiple target units that array is chosen.The circuit is by applying a program voltage to the mark under hot carrier injection mechanism Target unit, and apply a control voltage in the adjacent corresponding control unit of indivedual target units, wherein the control voltage The threshold voltage and the control voltage for depending on corresponding control unit are less than the program voltage.The control circuit is compiled Before journey target unit, the threshold voltage of control unit is able to verify that, and control unit is categorized as first group, the target list programmed Member is categorized as second group.

Brief description of the drawings

Fig. 1 shows the schematic diagram of the method according to traditional programming nonvolatile memory band；

Fig. 2 shows the sectional view of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Fig. 3 shows the sectional view of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Fig. 4 shows the circuit diagram of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Fig. 5 shows the method from GSL to SSL according to the programming nonvolatile memory band of one embodiment of the invention Circuit diagram；

Fig. 6 shows the oscillogram of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Fig. 7 shows the method from SSL to GSL according to the programming nonvolatile memory band of one embodiment of the invention Circuit diagram；

Fig. 8 shows the circuit diagram of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Fig. 9 shows the circuit diagram of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Figure 10 shows the circuit diagram of the method for the programming nonvolatile memory band according to one embodiment of the invention；

Figure 11 shows the circuit diagram of the method for the programming nonvolatile memory band according to one embodiment of the invention；With And

Figure 12 shows the simplified block diagram of the Nonvolatile memory system according to one embodiment of the invention.

Main element symbol description：

Unit 10

11 switching MOS

12 switching MOS

13 bit lines

14 doped regions

15 common source lines

16 doped regions

20 are grounded altogether

21 contacts

22 bit lines

23 contacts

30 target units

31 switch units

32 control units

33 control units

35 first switchings

36 second switchings

40 regions

41 regions

301 target units

311 switch units

321 control units

500 control circuits

600 memories

Embodiment

It invention will be described with reference to the accompanying figures.

Embodiments of the invention are described more fully below in reference to accompanying drawing, it is described to wait accompanying drawing to form a part of the invention, And displaying can put into practice the particular instantiation embodiment of the present invention by way of illustration.However, the present invention can be in many different forms To embody, and it should not be construed as limited by embodiments set forth herein；In fact, these embodiments are provided such that this hair It is bright by be comprehensive and complete, and scope of the invention will be passed on comprehensively to those who familiarize themselves with the technology.As used herein, art Language "or" be inclusive inclusive-OR operation son, and be equivalent to term " and/or ", clearly describe unless the context otherwise.In addition, whole In individual specification, the implication of " one " and " described " includes a plurality of quote.

Fig. 2 is a NAND Flash memory cell band and the sectional view of program bias through the injection of hot carrier.In N-type In the embodiment of passage, substrate is p-type and hot carrier includes electronics.As in the embodiment of p-type passage, substrate be N-type and Hot carrier include hole.In description herein, using N channel embodiment as an example.First switching 35 is by MOS crystal Pipe is constituted and is connected on one end of NAND bands, and the grid of first switching 35 is coupled with ground connection selection line GSL, And a contact 21 is to form N-type region domain in the substrate.Contact 21 is connected to one and is grounded 20 altogether.Second switching 36 is by MOS Transistor is constituted and is connected on the other end of NAND bands, and the grid and string selection line SSL phases of second switching 36 Coupling, and a contact 23 is to form N-type region domain in the substrate.Contact 23 is connected to a bit line 22.Second switching 36 is also The referred to as band selection transistor of bit line 22.

In NAND bands a unit target unit 30 is by the unit as programming and is referred to herein as target list Member.Wordline couples with target unit 30 and receives program voltage V-TWL.Wordline target unit 30 adjacent with one and in common ground connection The switch unit 31 of 20 sides is coupled, and the wordline receives one and switches voltage V-SWL, the switching voltage V-SWL be designed as in During one section of programming, the condition of efficient hot carrier injection can be reached.Wordline target unit 30 adjacent with one and in place The control unit 32 of the side of line 22 is coupled, and the wordline receives one by voltage V-MWL, described to be designed as by voltage V-MWL When mark is programmed into unit 30, the condition that hot carrier penetrates control unit 32 that mitigates can be reached.One bit-line voltage V-BL adds To bit line 22, such as VD-PRGM, and the second switching 36 receive one by voltage V-SSL.Wordline and control unit 32 and the Memory cell coupling between two switchings 36, and wordline receives one respectively by voltage V-PASSD so that the precharge of region 40 reaches To a drain voltage VD-PRGM.Wordline switches the memory cell between 35 with switch unit 31 and first and coupled, when common ground connection 20 connects When ground and the first switching 35 meet V-GSL, wordline receives one respectively by voltage V-PASSS so that the precharge of region 41 reaches one Source voltage VS-PRGM.When as a certain programmed condition, V-PASSD and V-PASSS can be identical or different electricity Pressure.It is applied to the threshold V T that control unit 32 is depended on by voltage V-MWL of control unit 32.Under normal circumstances, lead to Overvoltage V-MWL should be greater than threshold V T and bit-line voltage VD-PRGM summation, be used for branch to be transmitted under required speed Hold the bit-line voltage of programming target unit.In another embodiment, when reaching the summation that surmounts VT and bit-line voltage VD-PRGM When, it is applied to being also required to by voltage V-MWL in control unit 32 and is less than V-PASSS, V-PASSD, and V-TWL, mitigates Program programming interference during target unit 30.Switching voltage V-SWL is chosen come logical below switch unit 31 during manipulating programming Road current potential.In some specific embodiments, the bias being applied in control unit 32 its may range from program voltage V-TWL 1/2 to 2/3.

In one embodiment, when programming target unit 30, bit-line voltage V-BL scope can for example arrive for 3V 4.5V.The V-PASSD and V-PASSS may be in the range of 8V to 12V.It is applied to the program voltage V- of target unit 30 TWL scope may be 8V between 12V.Being applied to the control voltage V-MWL of control unit, it may range between 4V to 8V.

In some cases, a part of hot carrier can disturb next adjacent control list by control unit 32 Member 33, next adjacent control unit 33 is then used for reducing interference.Fig. 3 represents another embodiment, it is characterised in that and the first control The wordline that unit 32 processed is coupled receives first and led to by voltage V-MWL1, and the wordline reception second of the second control unit 33 coupling Overvoltage V-MWL2.First can be same or different by voltage V-MWL2 by voltage V-MWL1 and second, have more Say, they can be manipulated to each independent configuration body.However, V-MWL2 value only allows V- in the above-described embodiments Defined in MWL1 in same range.In some specific embodiments, V-MWL2 is more than V-MWL1.In certain embodiments, There is the unit of the adjacent target unit 30 of two or more as control unit.During programming, each control unit receives control respectively Voltage processed, summation of the control voltage higher than threshold voltage and bit-line voltage VD-PRGM.

Fig. 4 is represented with couple respectively with bit line BL1 to BLN and be grounded the 20 multiple storage bands coupled together The circuit diagram of NAND array.Each wordline is connected to the grid of respective memory unit on each bit line.Under during programming, The program voltage V-TWL that the wordline of target unit is received.The switching wordline of adjacent target wordline receive one switch voltage V-SWL with Hot carrier is promoted to inject.Generally, V-SWL in particular range to optimize performance, wherein described scope is by with cutting The threshold voltage for changing the memory cell of wordline coupling is distributed to determine.In some specific embodiments, V-SWL scope can be with From lower limit VL, the lower limit is less than the lowest threshold voltage of the distribution, and to upper limit VH, the upper limit is higher than the distribution most High threshold voltage.Under during programming, the switching voltage V-SWL of input size may be with ramp system and with dynamic change Modulation.According to preference, its waveform may be different, and it can be a sine wave, triangular wave, or sawtooth waveforms etc..

The method of program storage band be also rely on programmed sequence, Fig. 5 be one from GSL to SSL program storage band Example.Because the programming of target unit 30 is earlier than target unit 30 to the unit between SSL, therefore, control unit 32 is unprogrammed State and in the threshold voltage of low state.When programming target unit 30, existed by applying a voltage V-TWL to target word Line causes hot carrier injection target unit 30, and one is received by voltage V-MWL with the wordline of control unit 32, described to pass through electricity V-MWL is pressed to be more than the threshold voltage of control unit and bit-line voltage VD-PRGM summation.In addition, in order to mitigate hot carrier interference Control unit 32, should be also less than on other units by voltage V-MWL and be less than V-PASSD, V- by voltage, i.e. V-MWL PASSS and V-TWL.In one embodiment, the threshold voltage of control unit is smaller than -1.0V, and VD-PRGM may arrive for 3V In the range of 4.5V, in the range of V-TWL may be 8V to 12V, and V-MWL may range between 4V to 8V.

Fig. 6 is the sequence chart for the example that description is operated on the bias with reference to Fig. 5 with it.It is selected during programming The bit line BL1 taken is biased to VD-PRGM.When switch unit 31 receives triangular waveform switching voltage V-SWL, with target The wordline that unit 30 is coupled receives program voltage V-TWL.It is more relatively low than V-PASSD or V-PASSS to be applied by voltage V-MWL In in control unit 32, disturbed with mitigating hot carrier.

Fig. 7 is the example for illustrating the program storage band from SSL to GSL.Because the programmed order of target unit 30 is in target After unit between the SSL of unit 30, therefore, the threshold V T of control unit 32 has two different voltage stages, high electricity During the pressure stage, control unit 32 is represented programmed；Low voltage stage, it is unprogrammed to represent control unit 32.If control is single Member 32 is in high voltage stage, then to produce so-called bit pattern effect.When programming target unit 30, by being applied to target wordline Plus program voltage V-TWL causes the target unit 30 of hot carrier injection, a two stage programmed algorithm is applied to storage band On.During in the first stage, the wordline coupled with control unit 32 receives a low pass overvoltage V-MWL, and the low pass is excessively electric V-MWL is pressed higher than the threshold voltage of control unit 32 and bit-line voltage VD-PRGM summation.In addition, in order to mitigate hot carrier pair The interference of control unit 32, should be also less than on other units by voltage V-MWL and be less than V- by voltage, i.e. V-MWL PASSD, V-PASSS and V-TWL.Therefore, if adjacent control unit 32 is not programmed, target unit 30 can be effective Ground is programmed.In one embodiment, the unprogrammed threshold voltage ratio -1.0V of control unit is small, and VD-PRGM may be 3V to 4.5V In the range of, in the range of V-TWL may be 8V to 12V, and V-MWL scope may be 4V to 8V.

If the programming of adjacent control unit is earlier than target unit, then in second stage, with the coupling of control unit 32 The wordline of conjunction receives one higher by voltage V-MWL, the programming thresholds that control unit is higher than by voltage V-MWL Voltage and bit-line voltage VD-PRGM summation reach programming action to promote hot carrier injection target unit 30.However, due to Target unit 30 is programmed, considers and mitigates the interference of hot carrier and cause the consideration for being not provided with higher control voltage.One In individual embodiment, the programmed threshold voltage of control unit is more than 2V, and VD-PRGM may be in the range of 3V to 4.5V, V-TWL can Can be that V-MWL may be in the range of 8V to 12V in the range of 8V to 12V.

The programming concept from GSL to SSL in above-mentioned two stage extends to storage band as shown in Figure 3, described to deposit The design of storage band has more than one control unit.When configuring, two control units 32 and 33 are adjacent with target unit 30, According to the combination of the threshold voltage level of each control unit, the programmed algorithm in four stages can be respectively applied to control unit The wordline of 32 and 33 couplings.If choosing n control unit, the programmed algorithm in 2n stages can be applied to ensure effectively programmed Journey simultaneously reaches least interference.

Fig. 8 shows the embodiment of another memory array, and the memory array has multiple storage bands and multiple Target unit, the storage band and target unit reach programming with the injection of hot carrier.Bit line BL1 and BL3 have target respectively Unit TC1 and TC2 are to be programmed, and bit-line voltage is plus bias VD-PRGM with the channeling potential of memory cell in lifting strip band. For the bit line of other non-programmed, low-voltage can suppress programming such as ground connection.Just as designed, each target unit has one Adjacent control unit, wherein CC1 are the adjacent control units of target unit TC1；CC2 is the adjacent controls of target unit TC2 Unit.In addition, the opposite side of each target unit also has adjacent switch unit, such as SC1 is the adjacent switchings of target unit TC1 Unit；SC2 is the adjacent switch units of target unit TC2.In the present embodiment, programmed sequence is therefore the CC1 from SSL to GSL According to program conditions can be high level or low level state with CC2 threshold voltage level.For the purpose of simplifying the description, following In embodiment, CC1 is set to the unit of non-programmed and with low threshold voltage VT-L；CC2 is set to the unit of programming and had High threshold voltage VT-H.

Above-mentioned multistage algorithm is applied to programming flash memory array, allows single with each control respectively through the first stage is introduced The wordline of member coupling receives low pass overvoltage a V-MWLow, the low pass overvoltage V-MWLow and is more than VT-L and bit line electricity Press VD-PRGM summation.In addition, in order to mitigate hot carrier interference control unit CC1, should be also less than by voltage V-MWLow On other units by voltage, that is, V-MWLow is less than V-PASSD, V-PASSS and V-TWL.Therefore, target unit TC1 can To be effectively programmed without influenceing unprogrammed control unit CC1.However, because the second control unit CC2 is in high electricity During piezoelectricity level state, the low pass overvoltage V-MWLow applied is not enough to open control unit CC2 passage, it is impossible to promote Enter its adjacent target unit TC2 programming.Methods described can also include a step, to verify whether target unit has been compiled Journey.Fig. 9 is shown in after above-mentioned checking, the situation of the programming of second stage, and one of high pass overvoltage V-MWLhi is applied to Control unit CC2 coupling word is online.During this stage, bit line BL1 is grounded to suppress programmed target unit TC1, but BL3 is still biased VD-PRGM.High pass overvoltage V-MWLhi is more than the total of VT-H and bit-line voltage VD-PRGM With.Therefore, target unit TC2 can be programmed effectively, simultaneously as associated bit line, without disturbing programming in advance Target unit TC1.Under during programming, same method, which can also be applied to one, has more than two target wordline battle array Row.

Another method can reach the program speed of optimization for target unit, and the target unit is compiled from SSL to GSL Journey is without disturbing adjacent cells, and its flash array is as shown in Figure 10.In the first step, it can be verified as each target unit The threshold voltage levels of corresponding control unit.For example, if control unit CC1 and CC3 is in low-threshold power voltage level, and low threshold Threshold voltage level means unprogrammed, and then TC1 and TC3 is classified as first group with other unprogrammed control units.Together When, some control units are verified as higher level, such as CC2 its be categorized as second group.10 phases in the first stage as shown in the figure Between, the bit line only coupled in the first set with control unit, such as BL1 and BLN-1 apply a bit line bias VD-PRGM to be compiled Journey.When a program voltage V-TWL is applied to target unit TC1 and TC3, corresponding wordline receives a low pass overvoltage V- MWLow, the low pass overvoltage V-MWLow be more than unprogrammed control unit threshold voltage and bit-line voltage VD-PRGM it is total With to mitigate interference.In the present embodiment, because CC1 and CC3 are coupled to same wordline, threshold voltage is to determine low pass mistake Voltage should be the peak between CC1 and CC3.During in the first stage after programming target unit, Figure 11 shows that second stage enters One step programs target unit, and the target unit has the adjacent control unit for having programmed threshold voltage.During second stage, Except the bit line that the control unit with high level is coupled, other bit lines are grounded to suppress unexpected programming.BL3 applies one and biased VD-PRGM and high pass overvoltage V-MWLhi is applied to the wordline coupled with control unit CC2.High pass overvoltage V-MWLhi It should be greater than control unit CC2 threshold voltage and bit-line voltage VD-PRGM program speed of the summation to ensure.Further, since Corresponding target unit is unprogrammed therefore bit-line voltage is grounded, and the described first or second programming phases can be exchanged.The Target unit in two groups can be programmed through a high pass overvoltage V-MWLhi is applied in control unit by an early step, because Target unit in this first group can be then programmed by applying a low pass overvoltage V-MWLow.

Figure 12 is the simplified block diagram of one embodiment of a Nonvolatile memory system, the non-volatile memories Device system can be for realizing the above method.There is the figure control circuit 500 to be mutually coupled with memory 600.Storage Device 600 can be NAND-flash memory or other programmable nonvolatile memories, and memory 600 has multiple be arranged on Memory cell therein.Control circuit 500 is configured to be in communication with each other with the memory cell in memory 600, and is used as memory Store effect.The control circuit 500 can position target unit and the other units adjacent with target.According to programmed order, control Circuit 500 processed chooses wordline and bit line and receives a pre-defined voltage respectively.During programming, adjacent common source line The unit of side is labeled as applying a switching voltage V-SWL on switch unit, switch unit by control circuit 500, to promote The hot carrier programming of target unit is stated, while target unit applies a program voltage V-TWL.In addition, the adjacent unit of bit line side Control unit is labeled as by control circuit 500.It is other except wordline is coupled with target unit, switch unit and control unit Given the one of wordline is by voltage V-PASS, and it may be different from each other by voltage V-PASS.Received with the wordline of control unit One control voltage V-MWL, the control voltage V-MWL need to be more than the threshold voltage and bit-line voltage VD-PRGM of control unit Summation, wherein described bit-line voltage VD-PRGM is used for promoting hot carrier injection target unit.Control circuit 500 can be with The threshold voltage of access control unit before programming target unit, to determine the voltage for being adapted to be applied to control unit. Generally, control circuit 500 is configured to as described in the above-described embodiments, in a different manner programmable memory 600。

The method and feature of the present invention is fully described in examples detailed above and description.It should be understood that without departing from the present invention's Any modification or change of spirit are intended to cover in the protection category of the present invention.

Claims

1. a kind of Nonvolatile memory system, including：

One bit line；

Multiple memory cell associated with the bit line are coupled in a series arrangement；

One control circuit is in communication with each other with the memory cell, wherein described control circuit programming one from the memory cell The target unit of middle selection, the programming is described for promoting hot carrier to be injected into bit line by applying a bit-line voltage Target unit, and a program voltage are applied under hot carrier injection mechanism on the target unit, and program the target list Apply a control voltage when first in the corresponding control unit adjacent with the target unit, wherein the control voltage according to The threshold voltage and the control voltage for investing described control unit are less than the program voltage；And

A switch unit and the switch unit for adjacent target unit described control unit opposite side, wherein the control Circuit applies one and switches voltage in being injected into the target unit to strengthen hot carrier on the switch unit；

Wherein described control circuit controls the target unit by two benches programming scheme, wherein the control circuit applies One low control voltage, described in when the low control voltage is more than the unprogrammed threshold voltage of described control unit with the first stage The summation of bit-line voltage, and apply a high control voltage, the high control voltage is more than the programming thresholds of described control unit The summation of voltage and when first stage institute's bitline voltage.

2. storage system according to claim 1, wherein the control voltage is more than threshold voltage and the position of adjacent control unit The summation of line voltage.

3. storage system according to claim 1, further comprising the band selection transistor coupled with the bit line, wherein Described control unit is in the band selection transistor side.

4. storage system according to claim 1, wherein the control circuit further includes multiple adjacent target units Control unit.

5. storage system according to claim 1, further comprising multiple wordline, wherein the memory cell coupled with the wordline Without the target unit, described control unit and the switch unit, and the control circuit apply one by voltage in Each wordline, wherein described be more than the control voltage by voltage.

6. storage system according to claim 1, further comprising multiple wordline, wherein the memory cell coupled with the wordline Without the target unit, described control unit and the switch unit, and the control circuit apply one by voltage in Each wordline, wherein control voltage when being more than the first stage by voltage.

7. a kind of programmed method of nonvolatile memory, including：

A target unit is programmed, and is used for promoting hot carrier to be injected on associated bit line by applying a bit-line voltage The target unit；

Apply program voltage under hot carrier injection mechanism on the target unit, to program the target unit；And

Apply a control voltage in a control unit, the adjacent target unit of described control unit is simultaneously selected positioned at band Transistor side, wherein the control voltage depends on the threshold voltage of described control unit, and the control voltage is more than institute State the threshold voltage of control unit and the summation of bit-line voltage.

8. method according to claim 7, wherein described control unit are unprogrammed states, and the control voltage is less than logical Cross the voltage that wordline is applied.

9. method according to claim 7, wherein described control unit are programming state.

10. method according to claim 7, is further contained in before the programming target unit, checking described control unit Threshold voltage.

11. method according to claim 10, further comprising unprogrammed control unit is categorized as into first group, has been programmed Target unit is categorized as second group, and different groups of target unit is programmed respectively.

12. method according to claim 11, wherein the control voltage put in first group in control unit is more than control list The unprogrammed threshold voltage of member and the summation of bit-line voltage.

13. method according to claim 12, further comprising the target unit suppressed corresponding to control unit in second group.

14. method according to claim 12, wherein the control voltage applied in control unit in the first set, which is less than, passes through word The voltage that line is applied.

15. method according to claim 11, wherein the control voltage that control unit is applied in second group is more than control unit Programmed threshold voltage and bit-line voltage summation.

16. method according to claim 12, further includes the target unit for the control unit for suppressing to correspond in first group.