CN104090830A - Processing method for solving problem of time interleaving of timer during frequency measurement through cycle measuring method - Google Patents
Processing method for solving problem of time interleaving of timer during frequency measurement through cycle measuring method Download PDFInfo
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Abstract
Provided is a method for overcoming errors caused by time interleaving of carry and overflow of a timer and actions of interruption, capture and the like when software conducts reading actions on the timer. Regarding various hardware backgrounds, by means of the method of logical judgment and reasonable arrangement of operation sequence, incidents of carry, overflow and the like of the timer influencing the correctness of a result and occurring in an alternating mode in the process of formal reading operation of the timer are avoided, and it is ensured that all timing values at the moment are completely correct.
Description
Affiliated technical field
The present invention relates to a kind of when surveying all method survey frequencies, avoid because of system to the carry that reads action and timer of timer, overflow and the method for interrupting and catching etc. the staggered and issuable mistake of sequential of moving.
Background technology
In the industrial control system based on microcomputer, for the measurement of frequency quantity, conventionally there is direct frequency measurement method and survey two kinds of methods of all methods.Wherein surveying all methods is to survey Cycle Length, and its inverse represents frequency, surveys all methods and aspect time delay and precision, is being better than direct frequency measurement method.But surveying all methods exists some ins and outs problems to need to consider.One of problem wherein, while reading timer information exactly, the staggered problem of sequential that some events occur.
The general rudimentary algorithm of surveying all methods is: at certain edge of each frequency signal, do following operation during as rising edge:
(1) timing value while reading this edge and occur from timer;
(2) this is read timing value and the timing value interrupting last time subtract each other, obtain Cycle Length;
(3) timing value that retains this gives over to and uses next time.
These operations can be programmed in an interrupt service routine, for ease of narration, below are all called " this time interrupt ".The object of this rudimentary algorithm is to obtain Cycle Length, and wherein needing to consider sequential staggered problem has following situation:
(1) if timer word length can not once read, need taking into account system to timer high-low position read and timer low level staggered to the sequential between high-order carry;
(2), if timer may overflow between twice interruption, need to consider that interrupt operation and the timer sequential between overflowing is staggered.
When these situations are dealt with improperly, error is not to occur in low level but occur in a high position, so impact is not little.
These problems, can avoid in a lot of situations.For example, if our frequency to be measured is minimum, be not less than certain boundary, so that gained Cycle Length can not overflow, whether we just can completely no matter there is having overflowed of timer between twice interruption.Now, if twice actual generation of intercourse timer overflowed, when doing above-mentioned subtraction inevitable " subtracting not " so, the natural borrow (many machine words call the turn subtraction of integer and just have this kind of natural borrow) by computer arithmetic unit, just can obtain correct result.
But in actual applications, often can not avoid underfrequency completely.In a lot of application, during underfrequency, allow not draw accurate result, but do not allow to occur large erroneous judgement, for example, " underfrequency " is mistaken for to " frequency is too high ".Also sometimes, decide change frequency dividing ratio, identification " frequency reaches zero " etc. according to the degree of underfrequency.Now, the problems referred to above just cannot have been avoided.
Also therefore the deviser who has, think and the mistake producing, although error numerical value is not little, the probability occurring is very little, by filtering, just can suitably control its harm, so just ignored this problem.The system that result realizes, although most of time normally moves, always has the similar strongly disturbing fluctuation of accidental appearance.
Summary of the invention
The object of the invention is: the order of operation and the logic judging method that design a kind of timing value when reading this edge and occur from timer, to avoid completely because system is to the reading action and the carry of timer, overflow of timer, and interrupt and the staggered and issuable mistake of sequential of moving such as catch.
Technical scheme of the present invention is: the disposal route of the staggered problem of timer sequential during by all method survey frequencies of survey, and the method is because of relevant with particular hardware structure, and a minute situation is described below:
Situation (1): if timer is multi-stage cascade, and high-order, low level timer all need directly be read by system, definition multi-stage timing device lowest order timer is low level timer, all the other timers are high-order timer, avoid producing wrong key because sequential is staggered and are: stop formally reading of the high-low position of timer that carry is occurring between action.Adopt following order can realize this assurance:
A) read high-order timer;
B) read low level timer;
C), if low level timer read value is less than a boundary X, read again high-order, can be optional one both kept off zero, keep off again the value of low level timer full scale as X, wherein, described " keeping off zero " implication is: X > a, a is a value partly that is not less than (m-ma) and is less than low level timer range, described " keeping off low level timer full scale " implication is: X < full scale-b, b is a value partly that is not less than (mb-m) and is less than low level timer range, here, definition time number is with the time of day tolerance of low level timer, m reads the moment of low level for this, ma is the last moment that starts to read high-order timer before this, if mb is the words that subsequent execution " read again high-order ", read the moment of a high position.
Situation (2): if timer is multi-stage cascade, and low level timer has hardware capturing function, and high-order timer need directly be read by system, reading action and can be arranged in capture interrupt timer conventionally.If according to the principle in (1), in now interrupting, cannot directly read the high-value before catching, but can judge and determine by logic.Can adopt order:
A) get the value of catching as the low level of this timing value, this step also can move on to any time before the low level of using this timing value below;
B) read high-order timer, a temporary transient high position as this timing value;
C) read again low level timer, adopt one of following condition to do to judge, if meet this condition, continue to carry out d), e), otherwise finish;
Condition one: low level timer read value is less than the value of catching;
Condition two: the value of catching approaches zero close to full scale and timer low level, described " approaching " implication is: the absolute value of the difference of two objects is less than a, wherein a is a value partly that is not less than (m-ma) and is less than low level timer range, here, definition time number is with the time of day tolerance of low level timer, m reads the moment of timer low level for this, and ma occurs constantly for catching;
Condition three: the value of catching is not less than X and low level timer is less than X, can be optional one both kept off zero, keep off again the value of low level timer full scale as X, described " keeping off " implication is: the absolute value of the difference of two objects is greater than a, and wherein the definition of a is with above-mentioned condition two;
D) read high-order timer again;
E) change to take d) result subtract 1 after, as a high position for this timing value.
Situation (3): if timer has hardware capturing function, and timer is write all over while overflowing can produce interruption, to make and be equivalent to timer to the effect of more high-order carry by software, can establish the number of times that overflows that a variable V records timer between twice capture interrupt, in computing below, use.Conventionally, at timer, overflow in interrupt service routine and do: (1), if V is no more than the boundary of amplitude limit, makes V increase 1; (2) according to the value of V, carry out the judgement of relevant " underfrequency " or " frequency reaches zero " etc.; V is zero clearing in capture interrupt.And in capture interrupt program, carry out the operation be equivalent to above " this time the interrupting " described in " background technology ".If timer overflow interrupt routine and capture interrupt program the term of execution all closed interruption, so for fear of occur mistake because sequential is staggered, before whenever, the first step " timing value when reading this edge and occur from timer " that is equivalent to the operation of above-mentioned " this time interrupt ", can adopt following order to realize (wherein to the value of catching, as reading of this timing value, can be placed in program, to use this value):
A) specially timer is overflowed to interrupt routine open and close in short-term and interrupt, open and close guarantee that every palpus now if any the timer of having registered, overflowing interruption one responds and carry out surely between interrupting;
B) make vbak=V, then make V=0; Wherein, the number of times that overflows that variable V is timer between twice capture interrupt of record, this number of times overflows in interruption and adds up at timer.Variable vbak is the interim backup of variable V, for this, reading of timer has been moved rear to the computing of period/frequency amount; For next time statistics, to overflow number of times ready for variable V itself;
C) read again timer and work as duration, adopt one of following condition to do to judge, if meet this condition, continue to carry out d), e), otherwise finish:
Condition one: timer is worked as duration and is less than the value of catching;
Condition two: the value of catching is worked as duration close to 0 close to full scale and timer, described " approaching " implication is: the absolute value of the difference of two objects is less than a, wherein a is a value partly that is not less than (m-ma) and is less than timer range, here, definition time number is with the time of day tolerance of timer, m reads the moment of timer for this, and ma occurs constantly for catching;
Condition three: the value of catching is not less than X and timer and is less than X when duration, can be optional one both kept off zero, keep off again the value of timer full scale as X, described " keeping off " implication is: the absolute value of the difference of two objects is greater than a, and wherein the definition of a is with above-mentioned condition two;
D) specially timer is overflowed to interrupt routine open and close in short-term and interrupt (its spacer bar part is same a));
E) if V=0: { make V=1; Make vbak subtract 1; .
The common ground operating in above-mentioned three kinds of situations is: guarantee: the high-order information of timer of gained, and as the vbak in (3), represent to occur before this information that timer overflows number of times, in fact reflection obtain the moment of timer low-value before, they are due value in theory.
The beneficial effect of this method is, can avoid completely because of system to the carry that reads action and timer of timer, overflow, and interrupt and the staggered and issuable mistake of sequential of moving such as catch.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the present invention is further described.
Fig. 1 is at software direct-reading timer, and in the situation of hardware carry, this method reads the process flow diagram of timing value operation at that time.
Fig. 2 is in timer low level hardware capture interrupt, in the situation of hardware carry, reads the process flow diagram of timing value operation at that time in capture interrupt by this method.In figure according to above the step c of " summary of the invention " situation (2)) employing condition one represents, in fact also can be changed to condition two or condition three.
Fig. 3 is in hardware capture interrupt, and timer overflows in the situation of interruption, reads the process flow diagram of timing value operation at that time in capture interrupt by this method.In figure according to above the step c of " summary of the invention " situation (3)) employing condition one represents, in fact also can be changed to condition two or condition three.
Embodiment
Embodiment mono-:
Consult Fig. 1, in this embodiment, background of hardware is: timer multi-stage cascade, does not have hardware capturing function.Adopt flow process shown in Fig. 1, the timer high-low position data that read, have avoided the interspersed situation that carry occurs therebetween completely, guarantee the correct of subsequent calculations Cycle Length.Wherein choosing of boundary X, should guarantee: if c) in condition do not meet, a), b) between can there is timer carry scarcely.Wherein " high position at different levels " refers to, if timer cascade surpasses two-stage, except lowest order one-level, is referred to as " high position at different levels ".
The disposal route of using the staggered problem of timer sequential while surveying all method survey frequencies in this situation, comprises the steps:
A) read high-order timer;
B) read low level timer;
C), if low level timer read value is less than a boundary X, read again high-order; Can be optional one both kept off zero, keep off again the value of low level timer full scale as X, wherein, according to above in " summary of the invention " situation (1) about the regulation of " keeping off " implication, in the present embodiment, low level timer is 8 bit timing devices, full scale is 256 times of day, (m-ma) maximum impossible 15 times of day that surpass, (mb-m) maximum impossible 10 times of day that surpass,, in the present embodiment, boundary X scope is: 15<X<246.The actual X=128 that adopts in program.
Embodiment bis-:
Consult Fig. 2, in this embodiment, background of hardware is: timer multi-stage cascade, its low level has hardware capturing function.In capture interrupt program, adopt flow process shown in Fig. 2, while having the carry of generation possibility after immediately catching constantly, value before the timer high-value finally obtaining is actually and catches, has avoided the interspersed situation that carry occurs therebetween equally completely, guarantees the correct of subsequent calculations Cycle Length.
The disposal route of using the staggered problem of timer sequential while surveying all method survey frequencies in this situation, comprises the steps:
A) get the value of catching as the low level of this timing value, this step also can move on to any time before the low level of using this timing value below;
B) read high-order timer, a temporary transient high position as this timing value;
C) read again low level timer, if meet following " condition one ", continue to carry out d), e), otherwise finish, wherein " condition one " also can be changed to following " condition two " or " condition three ";
Condition one: low level timer read value is less than the value of catching;
Condition two: the value of catching approaches zero close to full scale and timer low level, according to above in " summary of the invention " situation (2) about the regulation of " approaching " implication, in the present embodiment, low level timer is 8 bit timing devices, full scale is 256 times of day, catch and while occurring, be carved between the moment of this time reading timer the time interval and maximumly can not surpass 15 times of day, therefore this condition is specifically as follows: the value of catching be greater than 241 and timer low bit readings be less than 15 times of day;
Condition three: the value of catching is not less than X and low level timer is less than X, can be optional one both kept off zero, keep off again the value of timer full scale as X, wherein, according to above in " summary of the invention " situation (2) about the regulation of " keeping off " implication, in the present embodiment, specifically with described in above-mentioned " condition two ", therefore boundary X scope is: 15<X<241.The actual X=128 that adopts in program;
D) read high-order timer again;
E) change to take d) result subtract 1 after, as a high position for this timing value.
Embodiment tri-:
Consult Fig. 3, in the present embodiment, software and hardware background is: timer has hardware capturing function, and timer writes all over while overflowing and can produce interruption, and timer overflows and in interrupt service routine, makes variable V increment.Adopt in the capture interrupt program (having closed interruption while entering) flow process shown in Fig. 3 to obtain V and vbak for below.Before and after immediately catching constantly, have the timer of generation to write all over to overflow may time, can guarantee the vbak finally obtaining be actually catch before due value in theory, avoided equally completely because of the staggered situation about making a mistake of sequential.
The disposal route of using the staggered problem of timer sequential while surveying all method survey frequencies in this situation reads the operation of timing value at that time and comprises the steps: in capture interrupt
A) specially timer is overflowed to interrupt routine open and close in short-term and interrupt, open and close guarantee between interrupting now if any the timer of having registered, to overflow response execution surely of interruption; In the present embodiment, CPU used requires the assembly instruction guarantee response of at least three, interval to interrupt, and in historical facts or anecdotes example, three compilation non-operation instructions have been used in open and close between interrupting;
B) make vbak=V, then make V=0;
C) read again timer and work as duration, if meet following " condition one ", continue to carry out d), e), otherwise finish, wherein " condition one " also can be changed to following " condition two " or " condition three ":
Condition one: timer is worked as duration and is less than the value of catching;
Condition two: the value of catching is worked as duration close to 0 close to full scale and timer, according to above in " summary of the invention " situation (3) about the regulation of " approaching " implication, in the present embodiment, timer is 16 bit timing devices, full scale is 65536 units, catch and while occurring, be carved between the moment of this time reading timer the time interval and maximumly can not surpass 20Ge unit, therefore, this condition is specifically as follows: the value of catching be greater than 65516 and timer low bit readings be less than 20 times of day;
Condition three: the value of catching is not less than X and timer and is less than X when duration, can be optional one both kept off zero, keep off again the value of timer full scale as X, wherein, according to above in " summary of the invention " situation (3) about the regulation of " keeping off " implication, the present embodiment is specifically with described in above-mentioned " condition two ", therefore boundary X scope is: 20<X<65516.The actual X=32768 that adopts in program;
D) specially timer is overflowed to interrupt routine open and close in short-term and interrupt (its spacer bar part is same a));
E) if V=0: { make V=1; Make vbak subtract 1; .
Claims (1)
1. the disposal route of the staggered problem of timer sequential during by all method survey frequencies of survey, is characterized in that: the method is relevant with particular hardware structure having following three kinds of situations:
Situation (1): if timer is multi-stage cascade, and high-order, low level timer all need directly read by system, and definition multi-stage timing device lowest order timer is low level timer, and all the other timers are high-order timer, and the method comprises the steps:
A) read high-order timer;
B) read low level timer;
C), if low level timer read value is less than a boundary X, read again high-order, can be optional one both kept off zero, keep off again the value of low level timer full scale as X, wherein, described " keeping off zero " implication is: X > a, a is a value partly that is not less than (m-ma) and is less than low level timer range, described " keeping off low level timer full scale " implication is: X < full scale-b, b is a value partly that is not less than (mb-m) and is less than low level timer range, here, definition time number is with the time of day tolerance of low level timer, m reads the moment of low level for this, ma is the last moment that starts to read high-order timer before this, if mb is the words that subsequent execution " read again high-order ", read the moment of a high position,
Situation (2): if timer is multi-stage cascade, and low level timer has hardware capturing function, and high-order timer need directly be read by system, and the method comprises the steps:
A) get the value of catching as the low level of this timing value, this step also can move on to any time before the low level of using this timing value below;
B) read high-order timer, a temporary transient high position as this timing value;
C) read again low level timer, adopt one of following condition to do to judge, if meet this condition, continue to carry out d), e), otherwise finish;
Condition one: low level timer read value is less than the value of catching;
Condition two: the value of catching approaches zero close to full scale and timer low level, described " approaching " implication is: the absolute value of the difference of two objects is less than a, wherein a is a value partly that is not less than (m-ma) and is less than low level timer range, here, definition time number is with the time of day tolerance of low level timer, m reads the moment of timer low level for this, and ma occurs constantly for catching;
Condition three: the value of catching is not less than X and low level timer is less than X, can be optional one both kept off zero, keep off again the value of low level timer full scale as X, described " keeping off " implication is: the absolute value of the difference of two objects is greater than a, and wherein the definition of a is with above-mentioned condition two;
D) read high-order timer again;
E) change to take d) result subtract 1 after, as a high position for this timing value;
Situation (3): if timer has hardware capturing function, and timer is write all over while overflowing can produce interruption, conventionally can establish the number of times that overflows that a variable V records timer between twice capture interrupt, at timer, overflow and in interrupt service routine, make V increment counting; Timer overflow interrupt routine and capture interrupt program the term of execution all closed interruption; To the reading action and can be arranged in capture interrupt of timer, before whenever the disposal route of the staggered problem of timer sequential comprises the steps (wherein to the value of catching, as reading of this timing value, can be placed in program, to use this value):
A) specially timer is overflowed to interrupt routine open and close in short-term and interrupt, open and close guarantee that every palpus now if any the timer of having registered, overflowing interruption one responds and carry out surely between interrupting;
B) make vbak=V, then make V=0; Wherein, the number of times that overflows that variable V is timer between twice capture interrupt of record, this number of times overflows in interruption and adds up at timer.Variable vbak is the interim backup of variable V, for this, reading of timer has been moved rear to the computing of period/frequency amount; For next time statistics, to overflow number of times ready for variable V itself;
C) read again timer and work as duration, adopt one of following condition to do to judge, if meet this condition, continue to carry out d), e), otherwise finish:
Condition one: timer is worked as duration and is less than the value of catching;
Condition two: the value of catching is worked as duration close to 0 close to full scale and timer, described " approaching " implication is: the absolute value of the difference of two objects is less than a, wherein a is a value partly that is not less than (m-ma) and is less than timer range, here, definition time number is with the time of day tolerance of timer, m reads the moment of timer for this, and ma occurs constantly for catching;
Condition three: the value of catching is not less than X and timer and is less than X when duration, can be optional one both kept off zero, keep off again the value of timer full scale as X, described " keeping off " implication is: the absolute value of the difference of two objects is greater than a, and wherein the definition of a is with above-mentioned condition two;
D) specially timer is overflowed to interrupt routine open and close in short-term and interrupt (its spacer bar part is same a));
E) if V=0: { make V=1; Make vbak subtract 1; .
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| C06 | Publication | ||
| PB01 | Publication | ||
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