CN104077375A - 一种cc-numa系统中节点的错误目录的处理方法和节点 - Google Patents
一种cc-numa系统中节点的错误目录的处理方法和节点 Download PDFInfo
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- CN104077375A CN104077375A CN201410289296.3A CN201410289296A CN104077375A CN 104077375 A CN104077375 A CN 104077375A CN 201410289296 A CN201410289296 A CN 201410289296A CN 104077375 A CN104077375 A CN 104077375A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/128—Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0826—Limited pointers directories; State-only directories without pointers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0828—Cache consistency protocols using directory methods with concurrent directory accessing, i.e. handling multiple concurrent coherency transactions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/25—Using a specific main memory architecture
- G06F2212/254—Distributed memory
- G06F2212/2542—Non-uniform memory access [NUMA] architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/62—Details of cache specific to multiprocessor cache arrangements
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
Claims (10)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410289296.3A CN104077375B (zh) | 2014-06-24 | 2014-06-24 | 一种cc‑numa系统中节点的错误目录的处理方法和节点 |
PCT/CN2015/081576 WO2015196941A1 (zh) | 2014-06-24 | 2015-06-16 | 一种cc-numa系统中节点的错误目录的处理方法和节点 |
US14/746,391 US9652407B2 (en) | 2014-06-24 | 2015-06-22 | Method for processing error directory of node in CC-NUMA system, and node |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410289296.3A CN104077375B (zh) | 2014-06-24 | 2014-06-24 | 一种cc‑numa系统中节点的错误目录的处理方法和节点 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104077375A true CN104077375A (zh) | 2014-10-01 |
CN104077375B CN104077375B (zh) | 2017-09-12 |
Family
ID=51598629
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410289296.3A Active CN104077375B (zh) | 2014-06-24 | 2014-06-24 | 一种cc‑numa系统中节点的错误目录的处理方法和节点 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9652407B2 (zh) |
CN (1) | CN104077375B (zh) |
WO (1) | WO2015196941A1 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015196941A1 (zh) * | 2014-06-24 | 2015-12-30 | 华为技术有限公司 | 一种cc-numa系统中节点的错误目录的处理方法和节点 |
CN107315694A (zh) * | 2016-04-22 | 2017-11-03 | 华为技术有限公司 | 一种缓存一致性管理方法及节点控制器 |
CN111427827A (zh) * | 2015-12-29 | 2020-07-17 | 华为技术有限公司 | 一种cpu及多cpu系统管理方法 |
WO2024066500A1 (zh) * | 2022-09-26 | 2024-04-04 | 华为技术有限公司 | 内存错误处理方法及装置 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9794889B2 (en) * | 2014-05-09 | 2017-10-17 | Huawei Device Co., Ltd. | Power adjustment method and apparatus |
US9946595B2 (en) * | 2015-09-30 | 2018-04-17 | International Business Machines Corporation | Reducing uncorrectable errors based on a history of correctable errors |
CN109086462A (zh) * | 2018-09-21 | 2018-12-25 | 郑州云海信息技术有限公司 | 一种分布式文件系统中元数据的管理方法 |
CN111124292B (zh) * | 2019-12-10 | 2022-08-19 | 新华三大数据技术有限公司 | 一种数据下刷方法、装置、缓存节点及分布式存储系统 |
CN114238165B (zh) * | 2021-12-21 | 2023-03-24 | 海光信息技术股份有限公司 | 数据处理方法、数据处理装置以及存储介质 |
US11625251B1 (en) * | 2021-12-23 | 2023-04-11 | Advanced Micro Devices, Inc. | Mechanism for reducing coherence directory controller overhead for near-memory compute elements |
Citations (4)
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US20030172328A1 (en) * | 2002-03-06 | 2003-09-11 | Wyatt Stewart R. | Pausing a transfer of data |
US20060156155A1 (en) * | 2004-12-29 | 2006-07-13 | Sudhanva Gurumurthi | Detecting errors in directory entries |
CN103218275A (zh) * | 2013-03-28 | 2013-07-24 | 华为技术有限公司 | 数据错误修复方法、装置和设备 |
CN103544269A (zh) * | 2013-10-17 | 2014-01-29 | 华为技术有限公司 | 目录的存储方法、查询方法及节点控制器 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8127099B2 (en) * | 2006-12-26 | 2012-02-28 | International Business Machines Corporation | Resource recovery using borrowed blocks of memory |
JP5590022B2 (ja) * | 2011-12-28 | 2014-09-17 | 富士通株式会社 | 情報処理装置、制御方法および制御プログラム |
CN102681930B (zh) * | 2012-05-15 | 2016-08-17 | 浪潮电子信息产业股份有限公司 | 一种芯片级错误记录方法 |
CN104077375B (zh) * | 2014-06-24 | 2017-09-12 | 华为技术有限公司 | 一种cc‑numa系统中节点的错误目录的处理方法和节点 |
-
2014
- 2014-06-24 CN CN201410289296.3A patent/CN104077375B/zh active Active
-
2015
- 2015-06-16 WO PCT/CN2015/081576 patent/WO2015196941A1/zh active Application Filing
- 2015-06-22 US US14/746,391 patent/US9652407B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030172328A1 (en) * | 2002-03-06 | 2003-09-11 | Wyatt Stewart R. | Pausing a transfer of data |
US20060156155A1 (en) * | 2004-12-29 | 2006-07-13 | Sudhanva Gurumurthi | Detecting errors in directory entries |
CN103218275A (zh) * | 2013-03-28 | 2013-07-24 | 华为技术有限公司 | 数据错误修复方法、装置和设备 |
CN103544269A (zh) * | 2013-10-17 | 2014-01-29 | 华为技术有限公司 | 目录的存储方法、查询方法及节点控制器 |
Non-Patent Citations (1)
Title |
---|
金丽娜: "CC-NUMA结构计算机含错技术研究", 《长春大学学报》 * |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015196941A1 (zh) * | 2014-06-24 | 2015-12-30 | 华为技术有限公司 | 一种cc-numa系统中节点的错误目录的处理方法和节点 |
US9652407B2 (en) | 2014-06-24 | 2017-05-16 | Huawei Technologies Co., Ltd. | Method for processing error directory of node in CC-NUMA system, and node |
CN111427827A (zh) * | 2015-12-29 | 2020-07-17 | 华为技术有限公司 | 一种cpu及多cpu系统管理方法 |
CN111427827B (zh) * | 2015-12-29 | 2023-03-17 | 超聚变数字技术有限公司 | 一种cpu及多cpu系统管理方法 |
CN107315694A (zh) * | 2016-04-22 | 2017-11-03 | 华为技术有限公司 | 一种缓存一致性管理方法及节点控制器 |
CN107315694B (zh) * | 2016-04-22 | 2020-12-15 | 华为技术有限公司 | 一种缓存一致性管理方法及节点控制器 |
WO2024066500A1 (zh) * | 2022-09-26 | 2024-04-04 | 华为技术有限公司 | 内存错误处理方法及装置 |
Also Published As
Publication number | Publication date |
---|---|
US20150370712A1 (en) | 2015-12-24 |
WO2015196941A1 (zh) | 2015-12-30 |
US9652407B2 (en) | 2017-05-16 |
CN104077375B (zh) | 2017-09-12 |
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Effective date of registration: 20201030 Address after: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee after: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. Address before: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd. Effective date of registration: 20201030 Address after: 221300 No. 88 Liaohe West Road, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee after: SU Normal University Semiconductor Materials and Equipment Research Institute (Pizhou) Co.,Ltd. Address before: Unit 2414-2416, main building, no.371, Wushan Road, Tianhe District, Guangzhou City, Guangdong Province Patentee before: GUANGDONG GAOHANG INTELLECTUAL PROPERTY OPERATION Co.,Ltd. |
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Effective date of registration: 20211227 Address after: 221300 506, block B, electronic industrial park, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee after: Xuzhou Bochuang Construction Development Group Co.,Ltd. Address before: No.88 Liaohe West Road, Pizhou Economic Development Zone, Xuzhou City, Jiangsu Province Patentee before: SU Normal University Semiconductor Materials and Equipment Research Institute (Pizhou) Co.,Ltd. |
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