CN1040716C - Method and system for overlapping text on live broadcast of satellite - Google Patents

Abstract

The present invention relates to a caption adding system for a direct broadcast satellite. The present invention is mainly characterized in that caption information is skillfully inserting in vertical blanking gaps of television signals at the program transmitting terminal of a satellite television and is simultaneously transmitted to the satellite; then the caption information is extracted from the vertical blanking gaps by a receiving terminal and is exactly converted into television caption signals. The insertion of the caption information in a caption-superposed mode and the extraction of the caption information by the receiving terminal use codes of a film program tape as a synchronous reference, and therefore, the work of caption display can be exactly processed.

Description

The method and system of overlapping text on live broadcast of satellite

The invention relates to a kind of method system of overlapping text on live broadcast of satellite, mainly is at the satellite television programming transmitting terminal, and vertical blanking interval to TV signal is assigned the captions data in skill ground, is emitted to satellite with TV programme; And receiving terminal is fetched the data of captions by vertical blanking interval again, and accurately it is converted to the TV subtitling signal.And the overlapping text mode that adopts transmitting terminal assign captions data and receiving terminal solve the captions data all with the timing code of this film program band as foundation synchronously, so the work of processing caption demonstration very accurately.

In general, the resident just can watch foreign satellite television programming as long as satellite receiving equipment is installed, but because most of people are ignorant of foreign language, so that the resident family of actual installation satellite receiving equipment is few.Along with the rapid development of common antenna will make its subscriber any satellite receiving equipment need be installed and has more satellite television programming to deliver in the family.Generally speaking, telefilm is most popular satellite television programming, and some foreign satellite television is more playing film, yet, in the face of the excellent film foreign language caption of but failing to understand, will be the thing that is much to be regretted.

Though literal casket captions were in foreign satellite film program, to satisfy the demand that the subscriber thirsts for having Chinese subtitle during some TV station can assign in artificial mode.Owing to without any synchronizing signal, people's complete monitoring must be arranged, adjust the demonstration situation of captions.In addition, this Chinese subtitle also must send each the system terminal center that needs this service to specific transmission network.

After cable TV is open, satellite television will be the topmost program of cable television system practitioner source.The company and the financial group of having the inclination to manage cable television channels drop into substantial contribution one after another, and change frequently device and lay in a large amount of programs in leased satellite, so how Chinese subtitle accurately and dexterously is provided, will be the problem that presses for solution.

The method system that the purpose of this invention is to provide a kind of overlapping text on live broadcast of satellite, the captions data is inserted the vertical blanking interval of TV signal at the satellite television transmitting terminal, by vertical blanking interval it is regained again at receiving terminal, and convert thereof into the TV subtitling signal, inserting with receiving the captions data is synchronous foundation with the timing code of program band all, with the demonstration of accurate processing caption.

Being constructed as follows of overlapping text on live broadcast of satellite system of the present invention and method thereof: mainly comprise a professional Video Recorder, one time code processor, one captions archives disk, one captions process software computer, one captions inserter, one caption adder, one television set tuner that cooperates with a live satellite system, by a professional Video Recorder vision signal and audio signal are delivered to Time Code Processor respectively in the appliance arrangement that the satellites transmits system is preposition, the captions inserter, the form and the electrical characteristic of the time code signal that professional Video Recorder is exported transfer the numerical data signal that captions process software computer can receive to, and this captions process software computer with this captions archives disk when film is crossed band, time and caption content with the film caption demonstration, with the timing code is reference index, being organized into literal archives is stored in the disk sheet for this captions process software computer and timing code contrast, and reassembled into the desired digital caption data of captions inserter, the captions data is assigned exactly to any still untapped blank scan line of the vertical blanking interval of frames images, the captions data is assigned into the 19th of vertical blanking interval, article 20 two, on the scan line; Again by aforementioned direct broadcast satellite system emission and reception, via this caption adder the vertical blanking interval of captions data from imaged frame taken out and the pairing Chinese font of this captions data is superimposed to the imaged frame data, through this television set tuner the captions and the audio signal of fundamental frequency state is tuned to a certain specific high-frequency TV channel carrier signal again, with send out after other channel carrier signal mixes; The control code that contains Chinese subtitle data and overlapping text in the vision signal that this caption adder is obtained by satellite receiver, this caption adder contrast Chinese subtitle data wherein finds corresponding middle character type, and the while is made subtitle superposition according to control code or controls the work of other equipment; Wherein, this microprocessor calculates present figure field via the vertical synchronizing signal of synchronizing separator circuit, cooperate the horizontal-drive signal of synchronizing separator circuit to learn present horizontal scanning line again, obtain 19 according to this again, article 20, the captions data on the horizontal scanning line, vision signal memory (VRAM) is transferred to doubling of the image circuit to be controlled, this vision signal memory is except that the memory that microprocessor required use when computing is carried out is provided, in addition when circuit conversion becomes display mode, provide its inside information to determine captions to be shown in the situation of TV screen, comprise prospect data and background information to doubling of the image circuit; This font memory provides the middle character type data with Big-5 sign indicating number coding, and the resolution of character type is 24 * 24 points in each, and 13405 words are put in coexistence; This address generator is when this circuit conversion becomes display mode, because of the vision signal memory needs its inside information is sent to the doubling of the image circuit and the doubling of the image, so cooperate the image synchronizing signal of synchronizing separator circuit and the display dot clock pulse of sequential generator, the address details that produces a 15bit automatically provides the vision signal memory that suitable preceding, background information are sent; This address selector utilizes this circuit that the address control of vision signal memory is acted temporarily as suitable distribution, because of the vision signal memory can use for microprocessor and doubling of the image circuit, so can pass through a data selector, decide the right to use of vision signal memory, if when display mode, then selector switches to the address of address generator, otherwise just switches to the address of microprocessor; And whether another data selector decision is read and write for microprocessor by the data of vision signal memory; And whether the data of this data selector decision vision signal memory delivers to doubling of the image circuit; Again, whether the data of this clock generator decision vision signal memory delivers to doubling of the image circuit; And this clock generator is except that providing the required sequential of address generator, and the topmost shift register that provides will be sent in the mode of serial from the data in the video signal memory with the speed of 10MHz, make on its horizontal scanning line that corresponds to TV; Moreover, this background shift register will be from the background information of microprocessor, by the frequency of parallel mode according to clock generator, convert the mode of serial to, deliver in the color picker, and the prospect shift register will be from the prospect data of microprocessor, by the frequency of parallel mode according to clock generator, convert the mode of serial to, deliver in the color picker; And this background information expander is expanded 2 points with the background information of every bit respectively by horizontal direction from the trend both sides, to strengthen font when showing, the effect on its word limit; Again, this color picker circuit thus can determine the colour of prospect and background information respectively, the colour of prospect or background all decides with the RGB data of three binary digits respectively, except determining colour, and will need overlapping some data to deliver in the doubling of the image circuit of next stage, this doubling of the image circuit will be done the suitable processing from the rgb signal of color picker except that having, and cooperate overlapping some data according to external image signal (L520), suitably overlap on its scan line, export a doubling of the image signal then; This synchronizing separator circuit is isolated level and vertical synchronizing signal by the picture signal from the outside, provides microprocessor, address generator, shift register and doubling of the image circuit to use; This outside data is exported into control provides the output of eight binary digits and input control signal to use for extraneous; This video signal data decoding circuit cooperates horizontal-drive signal and picture signal, the the 19th, 20 two data on the horizontal-drive signal will be positioned over, after address decoding circuitry solves, being sent to microcontroller circuit handles, during each the unit read/write data of this microprocessor in circuit, all by this address decoder, the transmission that comes control data; And the video signal data decoding circuit is corresponding to the tuning coding circuit in the transmitting terminal captions inserter, captions data in the video signal data is read, and go to differentiate the digital caption data in 1 μ s cycle with the sampling frequency of 12MHz, decoded data is delivered to microprocessor through the transformation from serial to parallel circuit, the core of this subtitle superposition circuit is a microprocessor, character type during the captions data that it is received according to the video signal data decoding circuit is taken out to the font memory, and it is deposited the vision signal memory; In addition, microprocessor is also done the action of access to each memory circuit via address decoder; Below according to the handling process of vision signal at this circuit, the operation principle of this circuit is described; The vision signal that includes the captions data inputs to the vision signal impedance matching box by satellite receiving system, is sent to variant circuit then; Synchronizing separator circuit takes out horizontal synchronization and vertical synchronizing signal in the video signal, this vision signal also is used as an incoming video signal source of doubling of the image circuit; In addition, the video signal data decoding circuit also thus vision signal the captions data is solved, and according to the horizontal-drive signal sequential captions data is read in by data bus by microprocessor.

Below, in conjunction with the accompanying drawings, the present invention is described in detail by embodiment.

Description of drawings:

Fig. 1 is the system construction drawing of overlapping text on live broadcast of satellite of the present invention system.

Fig. 2,2-A, B, C, D are the structure calcspar of Time Code Processor of the present invention.

Fig. 3,3-A, B, C are captions process software programs calcspar of the present invention.

Fig. 4 is the calcspar of captions inserter of the present invention.

Fig. 5 is the calcspar of caption adder circuit of the present invention.

Figure 1 shows that the system construction drawing of overlapping text on live broadcast of satellite of the present invention system.As shown in the figure: comprise that mainly a professional Video Recorder 11, a time code processor 12, a captions archives disk 13, a captions process software computer 17, a captions inserter 16, a caption adder 111, a television set tuner 112 reach and cooperate with a live satellite system 113.Wherein this direct broadcast satellite system 113 is made up of ground satellites transmits system 15, synchronous satellite 18 and ground satellite receiving system 110.Emission system is tuning via satellite for its vision signal of the TV programme of fundamental frequency and audio signal, utilizes huge directed satellite transmitting antenna 14 synchronism satellites 18 emissions of high-gain after the amplification.This is called up link by transmitting antenna 14 to the signal path of synchronous satellite 18.After up TV carrier signal is received by the antenna of synchronous satellite 18, amplify through changeing device frequency conversion frequently, promptly with the regional broadcast of directional antenna to setting on the earth.Ground satellite receiving system receives the microwave signal of synchronous satellite 18 emissions with the satellite earth antenna 19 with enough gains.This is a down link by the signal path that synchronous satellite 18 is emitted to satellite receiving system 110.Satellite receiving equipment amplifies the signal that receives, reduce to intermediate frequency again detection be reduced to the television video frequency signal and the audio signal of fundamental frequency state.As long as have television set or television display just can receive this program.In satellites transmits system 15 preposition appliance arrangements is by a professional Video Recorder 11 vision signal and audio signal to be delivered to Time Code Processor 12 and captions inserter 16 respectively, and Time Code Processor 12 transfers the form and the electrical characteristic of 11 output time coded signals of professional videocorder to numerical data signal that captions process software computer 17 can receive.This captions archives disk 13 is when film is crossed band, with time and the caption content that film caption shows, is reference index with the timing code, is organized into literal archives in disk.This captions process software computer 17 contrasts these captions archives and timing code, and is reassembled into captions inserter 16 desired digital caption data.Captions inserter 16 is then assigned the captions data exactly to the blank scan line of the vertical blanking interval of shadow rubber frame.For example in the present invention, the captions data is assigned on the 19th, 20 two scan line of vertical blanking interval; Again by aforementioned direct broadcast satellite system 113 emissions and reception, via this caption adder 111 vertical blanking interval of captions data from frames images taken out and the pairing Chinese font of this captions data is superimposed to the frames images data, through this television set tuner 112 captions and the audio signal of fundamental frequency state is tuned to a certain specific high-frequency TV channel carrier signal again, with send the CATV subscriber to after other CATV channel carrier signal mixes and watch.

Fig. 2 is the structure calcspar of Time Code Processor of the present invention.As shown in the figure: the timing code that is input as Video Recorder of this input interface circuit 21 (SMPTE Time Code); Its signal waveform is shown in Fig. 2 D.Differential amplifier circuit of these input interface circuit 21 usefulness transfers this SMPTE signal to single-ended reference signal over the ground, again through an analog signal partitioning circuitry 22, this analog signal partitioning circuitry 22 utilizes a comparator circuit that the analog signal of input is divided into two level signals that vary in size, for microprocessor circuit 23 interpretations, this microprocessor circuit 23 adopts PIC16C54 microprocessor and correlation timing (Clock) circuit to form.With the mode of software carry out binary digit differentiate, synchronously, work (its software flow pattern as shown in the figure) such as decoding and coding.The signal criterion that these microprocessor circuit 22 monitoring analog signal partitioning circuitries 22 are sent here is done binary digit and is differentiated.With reference to the signal waveform of figure 2D as can be known, if the time that this microprocessor circuit 23 calculates between two transitions (Transition), can differentiate the value of each binary digit according to this.For example: so that (416.7 μ s+208.4 μ s)/2=313 μ s is a benchmark.If the time between any two transitions greater than 313 μ s then this binary digit be " 0 ".Otherwise, if then form binary digit " 1 " jointly with follow-up transition less than 313 μ s.Can do synchronously according to the smpte time code form of Fig. 2 A after this microprocessor circuit 23 is read each bit value into and deposited its internal register in serial mode, the work of decoding and coding.Step in the main program flow chart of Fig. 2 C (2) is for setting each parameter value, and step (3) to step (8) all is to obtain synchronous work, and whether the content and SMPTE synchronous code (syncword) contrast of register is synchronous to differentiate.But step (4) is to remove Watch Dog timer, not its objective is when also reach when synchronous then according to this microprocessor to determine fault above this Timer time to give a warning, and avoids causing the serious consequence of timing code mistake.Step (9) expression obtains synchronously.

Because this captions process software computer 17, only need from SMPTE Time Code, obtain picture frame, second, branch, the time and synchronous data (Frame, Second, Minute, hour and sync), so the binary digit of some SMPTE will be cast out it.Step (11) to step (18) be exactly obtain picture frame, second, branch, the time and the binary bit value of synchronous data and the action of casting out binary digit not.

This microprocessor circuit 23 is except differentiating binary digit, when solving, outside the minute, second, each yard of picture frame, also with differentiation and the reception of each yard coding in order to this captions process software computer 17.It with the time, each yards such as minute, second, picture frame assemble seven binary digits and give a digital signal finishing circuit 24 in parallel (Para-llel) mode again; The form of its coding is shown in Fig. 2 B.This digital signal finishing circuit 24: the digital signal that microprocessor circuit 23 is sent here with parallel mode transfers the serial pattern to and adds initial (start) and termination (stop) binary digit.In addition, for cooperating the RS232-C communication protocol of this captions process software computer 17, transmission rate information is decided to be 2400bps.

These output interface circuit 25 groundworks are the conversion of electric signal current potential.With the TTL current potential be converted to these captions process software computer 17 electric signal current potentials (+/-12V), the signal of circuit output is the electrical characteristic that the RS232-C port of this captions process software computer 17 is received thus, and its data formats also meets the regulation of captions process software.

This timing sequence generating circuit 26 is to produce the 2.4KHz clock pulse that this microprocessor circuit 23 needed 2.4576MHz and 307.2KHz clock pulse and RS232-C signal post use by the vibration of 2.4576MHz quartz crystal.

Fig. 3 is a captions process software programs calcspar of the present invention.As shown in the figure: the groundwork of captions process software is the timing code that time of reception code processor 12 is sent here, and with it with originally be stored in hard disk, include the captions archives contrast of timing code, thereby the captions related data that produces a sequence is given captions inserter 16.Wherein, by a RS232-C interface 31: this subprogram is the value of passing a parameter of setting RS232-C and the timing code that responsible time of reception code processor 12 is sent, the timing code format conversion of RS232-C interface 31 being received through a timing code format conversion and contrast 32 becomes the timing code form in the captions shelves, and compares.Judge with captions records handling 33 whether timing code contrast at that time meets again,,, then must carry out branch if the captions data has two row as if contrasting correctly then reading displayed time and captions data.Mat calculates captions display parameters 34 data to handle again, calculate the display position of this journey captions, foundation during as the receiving terminal overlapping text is sent display parameters control code and the captions data handled to captions inserter 16 by the printer port with captions inserter interface 35 again.

Fig. 3 A is a captions process software flow process.Step (2) to step (7) is a RS232-C interface handling procedure.Step (8) to step (10) is timing code format conversion and contrast.Step (11) is the captions records handling with step (12).Step (13) is then calculated the captions display parameters.Step (14) to step (20) is a captions inserter interface handling procedure.If captions have two row then to handle in step (21) and step (22).

Fig. 4 is the calcspar of captions inserter of the present invention, as shown in the figure: there is the vision signal input of professional Video Recorder 11 importation of this captions inserter 16 and delivers to one from the data of captions process software computer 17 printer ports and print port interface circuitry 41, this printer port interface circuit 41 is made up of buffer circuits and seal switched circuit (Handshake), the captions data that the printer port of captions process software computer 17 is sent here is accepted to microprocessor circuit 42 processing, and this microprocessor circuit 42 is made up of 8051 single chip microprocessor.Communication protocol between its foundation and the captions process software receives the captions data and it is passed to tuning coding circuit 43.In addition, the synchronizing signal of also sending here according to synchronizing separator circuit 46 is calculated the number of scanning lines of vertical blanking interval.When being calculated to 19,20 lines, produce mask (mask) signal and insert analog switch in the circuit 44 isolating vision signal, and insert the captions data to blanking interval.Wherein, this tuning coding circuit 43 transfers the captions data of microprocessor circuit 42 outputs to serial by parallel according to the synchronizing signal (sync) of the 12MHz clock pulse of timing sequence generating circuit 47 and synchronizing separator circuit, and postpones the tuning carrier frequency that 11 μ s just begin 1 μ s in regular turn the captions data is delivered to blanking interval insertion circuit 44 in synchronizing signal after; And the foundation of calculating the vertical blanking interval number of scanning lines as microprocessor circuit 42 separated horizontal-drive signal (snyc) by synchronizing separator circuit 46 in the vision signal of the professional Video Recorder 11 of input.Timing reference point when this horizontal-drive signal also is tuning coding circuit 43 codings.This timing sequence generating circuit 47 produces the clock pulse of 12MHz and uses for microprocessor circuit 42 and tuning coding circuit 43; This blanking interval inserts circuit 44 according to the number of scanning lines that microprocessor circuit 42 calculates, and the captions data is inserted on the 19th, 20 lines of vertical blanking interval of vision signal.The circuit of this part must pay special attention to make the vision signal variation of original input; This output interface circuit 45 is given the satellites transmits system through the vision signal that the buffer stage amplifying circuit will include the fundamental frequency state of captions data (V).

Fig. 5 is the calcspar of caption adder circuit of the present invention.This circuit is the key technology place among the present invention.The control code that contains Chinese subtitle data and overlapping text in the vision signal that obtains by satellite receiver.Caption adder contrast Chinese subtitle data wherein finds corresponding middle character type, and the while is made subtitle superposition according to control code or controls the work of other equipment.Before further specifying the operation principle of this circuit, earlier each function square is done one and explain the main points briefly.Wherein, microprocessor 52 is to use 80C31 wafer (CPU), it provides the co-ordination between each circuit, this microprocessor 52 calculates present figure field via the vertical synchronizing signal (L52) of synchronizing separator circuit 516, cooperate the horizontal-drive signal (L53) of synchronizing separator circuit 516 to learn present horizontal scanning line again, obtain 19 according to this again, article 20, the captions data on the horizontal scanning line, and these data are done suitable processing, show as captions, the adjustment of colored variation and position height etc., and be in due course, vision signal memory (VR-AM) is transferred to doubling of the image circuit 517 control, reach the purpose that shows captions.This vision signal memory 59 is made up of the RAM (62256) of 32KB.It in addition when circuit conversion becomes display mode, provides its inside information to determine captions to be shown in the situation of TV screen to doubling of the image circuit 517 except the memory that CPU required use when computing is carried out is provided, and comprises prospect data and background information.This font memory 54 provides the middle character type data with Big-5 sign indicating number coding, and the resolution of character type is 24 * 24 points in each, and 13405 words are put in coexistence; This address generator 53 is when this circuit conversion becomes display mode, because of vision signal memory 59 needs its inside information is sent to the doubling of the image circuit 517 and the doubling of the image, so cooperate the picture synchronization signal (L53) of synchronizing separator circuit 516 and the display dot clock pulse (L57) of sequential generator 58, the address details that produces a 15bit automatically provides vision signal memory 59 that suitable preceding, background information are sent; This address selector 56 is done suitable distribution with the address control of vision signal memory 59, because of can providing microprocessor 52 and doubling of the image circuit 517, uses by vision signal memory 59, so can see through a data selector 510, decide the right to use of vision signal memory 59, if when display mode, then selector switches to the address (L56) that address generator 53 produces, otherwise just switches to the address (L54) of microprocessor 52; And whether these data selector 57 decision vision signal memories 59 are for microprocessor 52 read-writes; And whether the data of these data selector 57 decision vision signal memories 59 delivers to doubling of the image circuit 517; Again, whether the data of these clock generator 58 decision vision signal memories 59 delivers to doubling of the image circuit 517; And this clock generator 58 is except that providing the required sequential of address generator 53, topmostly provide preceding, dorsal displacement register 513,514 and will send in the mode of serial from the data in the video signal memory 59, make on its horizontal scanning line that corresponds to TV with the speed of 10MHz; Moreover, this background shift register 514 will be from the prospect data of microprocessor 52, by the frequency of parallel mode according to clock generator 58, convert the mode of serial to, deliver to colored the selection in the circuit 515, and prospect shift register 513 will be from the prospect data of microprocessor 52, by the frequency of parallel mode according to clock generator 58, convert the mode of serial to, deliver to colored the selection in the circuit 515; And this background information expander 512 is expanded 2 points with the background information of every bit respectively by horizontal direction from the trend both sides, to strengthen the effect on font its word limit when showing; Again, this color picker 515 can determine the colour of prospect and background information respectively, the colour of prospect or background all decides with the RGB data of three binary digits respectively, except determining colour, and will need overlapping some data to deliver in the doubling of the image circuit 517 of next stage, this doubling of the image circuit 517 is done the suitable processing except that the rgb signal (L515-L518) that has from color picker, and cooperate overlapping some data (L518) suitably to overlap on its scan line according to external image signal (L520), make it export a doubling of the image signal through L521, this synchronizing separator circuit 516 is by the picture signal from the outside, isolate level and vertical synchronizing signal, microprocessor 52 is provided, address generator 53, background shift register 514, and doubling of the image circuit 517 uses; Control is gone in these outside data port 55 outputs provides the output of eight binary digits and input control signal to use for extraneous; This video signal data decoding circuit 511 cooperates horizontal-drive signal and picture signal, the the 19th, 20 two data on the horizontal-drive signal will be positioned over, after address decoding circuitry 51 solves, being sent to micro-processor interface circuit 52 handles, during each the unit read/write data of this microprocessor 52 in circuit, all by this address decoder 51, the transmission that comes control data; And video signal data decoding circuit 511 is to design corresponding to the tuning coding circuit 43 in the transmitting terminal captions inserter 16.It reads the captions data in the video signal data, and goes to differentiate the digital caption data in 1 μ s cycle with the sampling frequency of 12MHz.Decoded data is delivered to microprocessor 52 through its inner transformation from serial to parallel circuit.The core of subtitle superposition circuit is a microprocessor 52, character type during the captions data that it is received according to video signal data decoding circuit 511 is taken out to font memory 54, and it is deposited vision signal memory 59.In addition, microprocessor 52 is also done the action of access via 51 pairs of each memory circuits of address decoder.Below according to the handling process of vision signal at this circuit, the operation principle of this circuit is described.The vision signal (VD) that includes the captions data inputs to vision signal input impedance matching device by satellite receiving system, is sent to synchronizing separator circuit 516 then, doubling of the image circuit 517 and video signal data decoding circuit 511.Synchronizing separator circuit 516 takes out horizontal synchronization (L53) signal and vertical synchronization (L52) signal in the video signal.This vision signal (VD) also is used as an incoming video signal source of doubling of the image circuit 517.In addition, the video signal data decoding circuit also thus vision signal (V) the captions data is solved, and according to the horizontal-drive signal sequential captions data is read in by data bus (L55) by microprocessor.We adopt Big-5 Chinese sign indicating number in the present invention, therefore so-called captions data Big-5 Chinese sign indicating number and other are about showing control codes of captions just.The microprocessor 52 contrast Big-5 that receives Chinese yardage values specify memory address to put into vision signal memory 59 by character type in 54 taking-ups of font memory and with it with address bus (L54).It more than is the part of character type in obtaining.The part that middle character type data in the vision signal memory 59 is shown on the TV screen is called display mode.When the address of this circuit vision signal memory during at display mode is specified by address generator 53, be sent to prospect shift register 513 and background information expander 512 through the Chinese subtitle data on the vision signal memory 59 of address bus (L56, L58) appointment and do to add and deliver to color picker 515 again after frame is handled.Last good font overlaps onto on the vision signal preparing colour and adding frame again, exports via video amplifier then.

Claims (1)

1. A kind of overlapping text on live broadcast of satellite system, mainly comprise a professional Video Recorder, one time code processor, one captions archives disk, one captions process software computer, one captions inserter, one caption adder, one television set tuner that cooperates with a live satellite system, by a professional Video Recorder vision signal and audio signal are delivered to Time Code Processor respectively in the appliance arrangement that the satellites transmits system is preposition, the captions inserter, the form and the electrical characteristic of the time code signal that professional Video Recorder is exported transfer the numerical data signal that captions process software computer can receive to, and this captions process software computer with this captions archives disk when film is crossed band, time and caption content with the film caption demonstration, with the timing code is reference index, being organized into literal archives is stored in the disk sheet for this captions process software computer and timing code contrast, and reassembled into the desired digital caption data of captions inserter, the captions data is assigned exactly to any still untapped blank scan line of the vertical blanking interval of frames images, the captions data is assigned into the 19th of vertical blanking interval, article 20 two, on the scan line; Again by aforementioned direct broadcast satellite system emission and reception, via this caption adder the vertical blanking interval of captions data from imaged frame taken out and the pairing Chinese font of this captions data is superimposed to the imaged frame data, through this television set tuner the captions and the audio signal of fundamental frequency state is tuned to a certain specific high-frequency TV channel carrier signal again, with send out after other channel carrier signal mixes; The control code that contains Chinese subtitle data and overlapping text in the vision signal that this caption adder is obtained by satellite receiver, this caption adder contrast Chinese subtitle data wherein finds corresponding middle character type, and the while is made subtitle superposition according to control code or controls the work of other equipment; Wherein, this microprocessor calculates present figure field via the vertical synchronizing signal of synchronizing separator circuit, cooperate the horizontal-drive signal of synchronizing separator circuit to learn present horizontal scanning line again, obtain 19 according to this again, article 20, the captions data on the horizontal scanning line, vision signal memory (VRAM) is transferred to doubling of the image circuit to be controlled, this vision signal memory is except that the memory that microprocessor required use when computing is carried out is provided, in addition when circuit conversion becomes display mode, provide its inside information to determine captions to be shown in the situation of TV screen, comprise prospect data and background information to doubling of the image circuit; This font memory provides the middle character type data with Big-5 sign indicating number coding, and the resolution of character type is 24 * 24 points in each, and 13405 words are put in coexistence; This address generator is when this circuit conversion becomes display mode, because of the vision signal memory needs its inside information is sent to the doubling of the image circuit and the doubling of the image, so cooperate the image synchronizing signal of synchronizing separator circuit and the display dot clock pulse of sequential generator, the address details that produces a 15bit automatically provides the vision signal memory that suitable preceding, background information are sent; This address selector utilizes this circuit that the address control of vision signal memory is acted temporarily as suitable distribution, because of the vision signal memory can use for microprocessor and doubling of the image circuit, so can pass through a data selector, decide the right to use of vision signal memory, if when display mode, then selector switches to the address of address generator, otherwise just switches to the address of microprocessor; And whether another data selector decision is read and write for microprocessor by the data of vision signal memory; And whether the data of this data selector decision vision signal memory delivers to doubling of the image circuit; Again, whether the data of this clock generator decision vision signal memory delivers to doubling of the image circuit; And this clock generator is except that providing the required sequential of address generator, and the topmost shift register that provides will be sent in the mode of serial from the data in the video signal memory with the speed of 10MHz, make on its horizontal scanning line that corresponds to TV; Moreover, this background shift register will be from the background information of microprocessor, by the frequency of parallel mode according to clock generator, convert the mode of serial to, deliver in the color picker, and the prospect shift register will be from the prospect data of microprocessor, by the frequency of parallel mode according to clock generator, convert the mode of serial to, deliver in the color picker; And this background information expander is expanded 2 points with the background information of every bit respectively by horizontal direction from the trend both sides, to strengthen font when showing, the effect on its word limit; Again, this color picker circuit thus can determine the colour of prospect and background information respectively, the colour of prospect or background all decides with the RGB data of three binary digits respectively, except determining colour, and will need overlapping some data to deliver in the doubling of the image circuit of next stage, this doubling of the image circuit will be done the suitable processing from the rgb signal of color picker except that having, and cooperate overlapping some data according to external image signal (L520), suitably overlap on its scan line, export a doubling of the image signal then; This synchronizing separator circuit is isolated level and vertical synchronizing signal by the picture signal from the outside, provides microprocessor, address generator, shift register and doubling of the image circuit to use; This outside data is exported into control provides the output of eight binary digits and input control signal to use for extraneous; This video signal data decoding circuit cooperates horizontal-drive signal and picture signal, the the 19th, 20 two data on the horizontal-drive signal will be positioned over, after address decoding circuitry solves, being sent to microcontroller circuit handles, during each the unit read/write data of this microprocessor in circuit, all by this address decoder, the transmission that comes control data; And the video signal data decoding circuit is corresponding to the tuning coding circuit in the transmitting terminal captions inserter, captions data in the video signal data is read, and go to differentiate the digital caption data in 1 μ s cycle with the sampling frequency of 12MHz, decoded data is delivered to microprocessor through the transformation from serial to parallel circuit, the core of this subtitle superposition circuit is a microprocessor, character type during the captions data that it is received according to the video signal data decoding circuit is taken out to the font memory, and it is deposited the vision signal memory; In addition, microprocessor is also done the action of access to each memory circuit via address decoder; Below according to the handling process of vision signal at this circuit, the operation principle of this circuit is described; The vision signal that includes the captions data inputs to the vision signal impedance matching box by satellite receiving system, is sent to variant circuit then; Synchronizing separator circuit takes out horizontal synchronization and vertical synchronizing signal in the video signal, this vision signal also is used as an incoming video signal source of doubling of the image circuit; In addition, the video signal data decoding circuit also thus vision signal the captions data is solved, and according to the horizontal-drive signal sequential captions data is read in by data bus by microprocessor.

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