CN104065428B - Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector - Google Patents
Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector Download PDFInfo
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- CN104065428B CN104065428B CN201410307968.9A CN201410307968A CN104065428B CN 104065428 B CN104065428 B CN 104065428B CN 201410307968 A CN201410307968 A CN 201410307968A CN 104065428 B CN104065428 B CN 104065428B
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Abstract
The invention provides a kind of signal magnitude detector and comprise the wireless receiver of this signal magnitude detector, signal magnitude detector comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R1 and electric capacity C1.First MOS transistor, the second MOS transistor, the 3rd MOS transistor are all connected with the first power end with the first link of the 4th MOS transistor; Second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R1 is connected between interconnecting nodes and second source end, and electric capacity C1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of signal magnitude detector.Compared with prior art, the present invention can carry out amplitude detection based on the I signal obtained after receiver demodulation and Q signal, to obtain the amplitude detection signal more accurately reflecting the orthogonal signalling energy that wireless receiver obtains, thus adjust the gain of receiver more accurately.
Description
[technical field]
The present invention relates to wireless transmission and reception technique field, particularly signal magnitude detector and comprise the wireless receiver of this signal magnitude detector.
[background technology]
Signal amplitude detection in wireless receiver (or radio receiver) is mainly used in the gain regulating radio receiver, and when detecting that the Received signal strength energy received is less, receiver can heighten gain accordingly; On the contrary, when the Received signal strength energy received if detect increases, receiver can reduce gain accordingly, like this, just can ensure to enter ADC (Analog-to-DigitalConverter, analog to digital converter) the amplitude substantially constant of signal, thus ensure the optimization of received signal to noise ratio.
Wireless receiver is before carrying out amplitude detection to received signal, and first can carry out demodulation to received signal, usual Received signal strength can be demodulated into pair of orthogonal signal (I, Q).In prior art, the signal amplitude detection of radio receiver is at I signal (in-phasesignal, homophase) and Q (Quadraturesignal, orthogonal signalling) select a road signal to carry out amplitude detection in signal, and output amplitude detection signal, the gain of wireless receiver is regulated based on this amplitude detection signal.But existing this signal amplitude detection mode can not record the signal amplitude of orthogonal signalling very accurately, the Gain tuning inaccuracy of receiver can be caused like this.
Therefore, be necessary to provide a kind of technical scheme of improvement to overcome the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of signal magnitude detector and comprise the wireless receiver of this signal magnitude detector, it can obtain the amplitude detection signal that more accurately reflects the energy of the orthogonal signalling that wireless receiver obtains.
In order to solve the problem, according to an aspect of the present invention, the invention provides the signal magnitude detector in a kind of wireless receiver, it comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R1 and electric capacity C1.First MOS transistor, the second MOS transistor, the 3rd MOS transistor are all connected with the first power end with the first link of the 4th MOS transistor; Second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R1 is connected between interconnecting nodes and second source end, and electric capacity C1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of described signal magnitude detector.
Further, a pair differential signal generating to receive the I signal that obtains based on described wireless receiver as a pair input of described signal magnitude detector of the grid of the first MOS transistor and the grid of the second MOS transistor; The grid of the 3rd MOS transistor and the grid of the 4th MOS transistor as described signal magnitude detector another to input with receive that the Q signal that obtains based on described wireless receiver generates another to differential signal.
Further, the phase 180 degree between a pair differential signal generating of the described I signal obtained based on described wireless receiver; The described Q signal obtained based on described wireless receiver generate another to the phase between differential signal 180 degree.
Further, described MOS transistor is nmos pass transistor, and described first link is drain electrode, and described second link is source electrode.
Further see that described MOS transistor is PMOS transistor, described first link is source electrode, and described second link is drain electrode.
Further, the mean value of amplitude detection signal that exports of the output of signal magnitude detector or DC component are the signal amplitude of the I signal that obtains of described wireless receiver and Q signal.
According to another aspect of the present invention, the invention provides a kind of wireless receiver, it comprises: the antenna of received RF signal, the radiofrequency signal received antenna carries out the gain amplifier of gain amplification, first frequency mixer, the first local clock and the radiofrequency signal mixing of amplifying through gain are obtained I signal by it, second frequency mixer, the second local clock and the radiofrequency signal mixing of amplifying through gain are obtained Q signal, the wherein phase 90 degree of the first local clock and the second local clock by it, first low pass filter, carries out low-pass filtering for the I signal obtained mixing, second low pass filter, carries out low-pass filtering for the Q signal obtained mixing, signal magnitude detector, the grid of the first MOS transistor and the grid of the second MOS transistor as a pair input of signal magnitude detector to receive a pair differential signal generated based on the I signal after low-pass filtering, the grid of the 3rd MOS transistor and the grid of the 4th MOS transistor as signal magnitude detector another to input with receive generate based on the Q signal after low-pass filtering another to differential signal, the gain that the amplitude detection signal obtained adjusts described gain amplifier is detected based on described signal magnitude detector, detect to make signal magnitude detector the amplitude detection signal obtained and fall into predetermined amplitude range.
Compared with prior art, the present invention can carry out amplitude detection based on the I signal obtained after receiver demodulation and Q signal, to obtain the amplitude detection signal more accurately reflecting the orthogonal signalling energy that wireless receiver obtains, thus the gain of receiver can be adjusted more accurately.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.Wherein:
Fig. 1 is the circuit diagram of the signal magnitude detector in prior art in wireless receiver;
Fig. 2 is the oscillogram of the amplitude detection signal that the differential signal that receives of first input end in Fig. 1 and the second input and output export;
Fig. 3 is the circuit diagram of the signal magnitude detector in the present invention's wireless receiver in one embodiment;
Fig. 4 is the oscillogram of the amplitude detection signal that four inputs of signal magnitude detector in Fig. 3 signal A, B, C, D of receiving and output export.
[embodiment]
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, and below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.Unless stated otherwise, connection herein, be connected, word that the expression that connects is electrically connected all represents and is directly or indirectly electrical connected.Connection in literary composition, connect, the word such as series connection can be understood as indirectly or directly connects and connect, connect.
Please refer to shown in Fig. 1, it is for realizing the circuit diagram of the signal magnitude detector of signal amplitude detection in wireless receiver in prior art, this signal magnitude detector comprises NMOS (N-channelMetalOxideSemiconductor) transistor M1 ', the second nmos pass transistor M2 ', electric capacity C1 ' and resistance R1 '.Wherein, the drain electrode of the first nmos pass transistor M1 ' is all connected with the first power end VDD with the drain electrode of the second nmos pass transistor M2 '; The source electrode of the first nmos pass transistor M1 ' and the Source interconnect of the second nmos pass transistor M2 ', this node is called as interconnecting nodes; Resistance R1 ' is connected between interconnecting nodes and ground node GND; Electric capacity C1 ' is connected between described interconnecting nodes and ground node GND, the grid of the first nmos pass transistor M1 ' is the first input end of this signal magnitude detector, the grid of the second nmos pass transistor M2 ' is the second input of this signal magnitude detector, and interconnecting nodes is connected to the output VO ' of this signal magnitude detector.
This signal magnitude detector is used for carrying out signal amplitude detection to the I signal in the orthogonal signalling obtained after wireless receiver quadrature demodulation Received signal strength or Q signal.In one embodiment, can carry out signal amplitude detection to I signal, now first need to produce a pair differential signal based on I signal, this is to the phase between differential signal 180 degree, as the differential signal A ' in Fig. 2 and B '.In one embodiment, I signal forms a pair equal and opposite in direction and opposite polarity differential signal after phase inverter and buffer, wherein a road differential signal A ' is connected with the grid of the first nmos pass transistor M1 ', another road differential signal B ' is connected with the grid of the second nmos pass transistor M2 ', output VO ' the output amplitude detection signal of this signal magnitude detector.Please refer to shown in Fig. 2, it is the oscillogram of the amplitude detection signal that the differential signal A ' that receives of the first input end of signal magnitude detector in Fig. 1 and the second input and B ' and output VO ' exports.The mean value of this amplitude detection signal VO ' or DC (directcurrent, direct current) component corresponding be the energy of the orthogonal signalling that wireless receiver obtains.But this amplitude detection signal is except the DC component needed, and the ripple on it is 2 frequency-doubled signals that amplitude is very high, this can affect the precision of the energy of the orthogonal signalling that amplitude detection signal reflection wireless receiver obtains.
The circuit structure of the present invention to the signal magnitude detector in Fig. 1 improves, to make the signal magnitude detector in the present invention can carry out signal amplitude detection based on I signal and Q signal, thus the amplitude detection signal making it produce can reflect the energy of orthogonal signalling I and Q more accurately.
Please refer to shown in Fig. 3, it is the circuit diagram of the signal magnitude detector in the present invention's wireless receiver in one embodiment.This signal magnitude detector comprises the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3, the 4th MOS transistor M4, resistance R1 and electric capacity C1.Wherein, the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3 are connected with the first power end VDD with first link of the 4th MOS transistor M4; The second link interconnection of the first MOS transistor M1, the second MOS transistor M2, the 3rd MOS transistor M3, the 4th MOS transistor M4, its interconnective node is interconnecting nodes; Resistance R1 is connected between interconnecting nodes and ground node GND (or being called second source end), and electric capacity C1 is connected between interconnecting nodes and ground node GND, and interconnecting nodes is connected with the output VO of this signal magnitude detector.
In the embodiment shown in fig. 3, MOS transistor is all nmos pass transistor, and its first link is drain electrode, and the second link is source electrode.The grid of the first nmos pass transistor M1 and the grid of the second nmos pass transistor M2 as a pair input of signal magnitude detector to receive a pair differential signal A and B generated based on I signal, the grid of the 3rd nmos pass transistor M3 and the grid of the 4th nmos pass transistor M4 as signal magnitude detector another to input with receive generate based on Q signal another to differential signal C and D, like this, signal A, B, C, D difference is respectively 0 °, 180 °, 90 °, 270 °, output VO output amplitude detection signal, please refer to shown in Fig. 4, it is the signal A of the input signal amplitude detector in Fig. 3, B, C, the oscillogram of the amplitude detection signal that D and output VO exports.The mean value of this amplitude detection signal or DC component correspond to the amplitude I2+Q2 of orthogonal signalling (I, Q), and the ripple on the amplitude detection signal simultaneously obtained is 4 times of frequencies, and its amplitude is much smaller than amplitude during 2 frequency multiplication amplitude detection signal in Fig. 2.Like this, by detecting I signal and Q signal simultaneously, just can obtain the amplitude detection signal cleaner compared with the amplitude detection signal in Fig. 2, the amplitude detection signal namely in Fig. 4 can reflect the orthogonal signalling energy that wireless receiver obtains more accurately.Nmos pass transistor M1, M2, M3 and M4 in Fig. 3 use as source class follower, can obtain the mean value of signal A, B, C, D like this, and resistance R1 and electric capacity C1 forms a low pass filter, thus filter out the harmonic wave of 4 overtones bands at output VO.
It should be noted that, four metal-oxide-semiconductors in Fig. 3 can be also all PMOS transistor, and wherein, the first link of MOS transistor is source electrode, and the second link is drain electrode.
According to another aspect of the present invention, the present invention also provides a kind of wireless receiver, and it comprises: the antenna of received RF signal, the radiofrequency signal received antenna carry out gain amplifier, the first frequency mixer, the second frequency mixer, the first low pass filter, the second low pass filter, the signal magnitude detector of adjustable gain amplification.First frequency mixer obtains I signal based on the first local clock and the radiofrequency signal of amplifying through gain, second frequency mixer obtains Q signal, the first local clock and the second local clock phase 90 degree based on the second local clock and the radiofrequency signal of amplifying through gain.First low pass filter is used for carrying out low-pass filtering to the I signal that mixing obtains, and the second low pass filter is used for carrying out low-pass filtering to the Q signal that mixing obtains.Described signal magnitude detector can be the structure shown in Fig. 3, wherein the grid of the first MOS transistor M1 and the grid of the second MOS transistor M2 as a pair input of signal magnitude detector to receive a pair differential signal generated based on the I signal after low-pass filtering, the grid of the 3rd MOS transistor M3 and the grid of the 4th MOS transistor M4 as signal magnitude detector another to input with receive generate based on the Q signal after low-pass filtering another to differential signal.Detect based on described signal magnitude detector the gain that the amplitude detection signal obtained adjusts described gain amplifier, detect to make signal magnitude detector the amplitude detection signal obtained and fall into predetermined amplitude range.
In sum, signal magnitude detector in the present invention carries out amplitude detection to based on the I signal obtained after demodulation and Q signal simultaneously, just can obtain the amplitude detection signal of the energy of the orthogonal signalling more accurately reflecting output, thus the gain of the gain amplifier of receiver can be adjusted more accurately.
It is pointed out that the scope be familiar with person skilled in art and any change that the specific embodiment of the present invention is done all do not departed to claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.
Claims (7)
1. the signal magnitude detector in wireless receiver, is characterized in that, it comprises the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, resistance R1 and electric capacity C1,
First MOS transistor, the second MOS transistor, the 3rd MOS transistor are all connected with the first power end with the first link of the 4th MOS transistor; Second link interconnection of the first MOS transistor, the second MOS transistor, the 3rd MOS transistor, the 4th MOS transistor, its interconnective node is interconnecting nodes; Resistance R1 is connected between interconnecting nodes and second source end, and electric capacity C1 is connected between interconnecting nodes and second source end, and interconnecting nodes is connected with the output of described signal magnitude detector.
2. signal magnitude detector according to claim 1, it is characterized in that, a pair differential signal that the grid of the first MOS transistor and the grid of the second MOS transistor generate to receive the I signal that obtains based on described wireless receiver as a pair input of described signal magnitude detector; The grid of the 3rd MOS transistor and the grid of the 4th MOS transistor as described signal magnitude detector another to input with receive that the Q signal that obtains based on described wireless receiver generates another to differential signal.
3. signal magnitude detector according to claim 2, is characterized in that, the phase 180 degree between a pair differential signal that the described I signal obtained based on described wireless receiver generates; The described Q signal obtained based on described wireless receiver generate another to the phase between differential signal 180 degree.
4. signal magnitude detector according to claim 1, is characterized in that, described MOS transistor is nmos pass transistor, and described first link is drain electrode, and described second link is source electrode.
5. signal magnitude detector according to claim 1, is characterized in that, described MOS transistor is PMOS transistor, and described first link is source electrode, and described second link is drain electrode.
6. signal magnitude detector according to claim 1, is characterized in that, the mean value of the amplitude detection signal that the output of signal magnitude detector exports or DC component are the signal amplitude of the I signal that obtains of described wireless receiver and Q signal.
7. a wireless receiver, is characterized in that, it comprises:
The antenna of received RF signal;
The radiofrequency signal received antenna carries out the gain amplifier of gain amplification;
First frequency mixer, the first local clock and the radiofrequency signal mixing of amplifying through gain are obtained I signal by it;
Second frequency mixer, the second local clock and the radiofrequency signal mixing of amplifying through gain are obtained Q signal, the wherein phase 90 degree of the first local clock and the second local clock by it;
First low pass filter, carries out low-pass filtering for the I signal obtained mixing;
Second low pass filter, carries out low-pass filtering for the Q signal obtained mixing;
Signal magnitude detector as described in as arbitrary in claim 2-6, the grid of the first MOS transistor and the grid of the second MOS transistor as a pair input of signal magnitude detector to receive a pair differential signal generated based on the I signal after low-pass filtering, the grid of the 3rd MOS transistor and the grid of the 4th MOS transistor as signal magnitude detector another to input with receive generate based on the Q signal after low-pass filtering another to differential signal, the gain that the amplitude detection signal obtained adjusts described gain amplifier is detected based on described signal magnitude detector, detect to make signal magnitude detector the amplitude detection signal obtained and fall into predetermined amplitude range.
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| CN201410307968.9A CN104065428B (en) | 2014-06-30 | 2014-06-30 | Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector |
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| CN201410307968.9A CN104065428B (en) | 2014-06-30 | 2014-06-30 | Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector |
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| CN104065428B true CN104065428B (en) | 2016-03-30 |
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| KR100576876B1 (en) * | 2004-11-10 | 2006-05-10 | 삼성전기주식회사 | Full wave rectifier with changable output waveform, and received signal strength indicator using the same |
| US7469133B2 (en) * | 2006-04-19 | 2008-12-23 | Silicon Storage Technology, Inc. | Radio frequency power detector |
| CN102932073B (en) * | 2012-10-17 | 2014-09-03 | 广州润芯信息技术有限公司 | Emission signal strength detecting circuit |
| CN203933647U (en) * | 2014-06-30 | 2014-11-05 | 无锡中星微电子有限公司 | Signal magnitude detector and comprise the wireless receiver of this signal magnitude detector |
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