CN104052502A - Decoding method and decoder - Google Patents

Decoding method and decoder Download PDF

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CN104052502A
CN104052502A CN201310081844.9A CN201310081844A CN104052502A CN 104052502 A CN104052502 A CN 104052502A CN 201310081844 A CN201310081844 A CN 201310081844A CN 104052502 A CN104052502 A CN 104052502A
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code
syndrome
alpha
sigma
code element
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CN104052502B (en
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肖均
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Nantong yunshangxiang home textile e-commerce Co., Ltd
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Huawei Technologies Co Ltd
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Abstract

The invention discloses a decoding method and a decoder. The method comprises: according to receiving data of a reed-solomon (RS) (N,K) code, a syndrome is determined, wherein the actual length of the shortened code of the RS (N,K) code is n; on the basis of the syndrome, an error locator polynomial sigma (x) and an error value calculation polynomial omega (x) are determined by using a BM iterative algorithm; according to the sigma (x) and the omega (x), an error position and a calculation error value are searched by starting with the (N-n+1)th code element in the RS (N,K) code by using an initial value, wherein the initial value includes an alpha <j (N-n+1)> and an alpha <-(N-n+1)> and j is equal to 1, 2, ... or t; the receiving data of the RS (N,K) code are corrected based on the searched error position and the calculated error value so as to obtain corrected data. According to the decoding method and decoder provided by the embodiment of the invention, an iteration for searching calculation and error value calculation can be reduced from prefect code length times to actually effective code length times, thereby improving the decoding efficiency.

Description

The method of decoding and decoder
Technical field
The present invention relates to the communications field, and more specifically, relate to method and the decoder of decoding.
Background technology
Reed-Solomon (Reed-Solomon, RS) code is a kind of multi-system BCH(Bose-Chaudhuri-Hocquenghem) code, be mainly used in correcting the error of transmission occurring in communication channel, its error correcting capability is strong, especially for short-and-medium code length and burst error, there is good error-correcting performance, because it is realized simply, in digital communication and storage system, extensively adopt.
The actual code length that RS shortens code is less than fixing code length.Prior art, in the time that RS shortening code is carried out to decoding, first adds to the fixing laggard row RS of code length decoding by shortening code by 0 the mode of filling out, and pulls out supplementary 0 and check code after decoding completes again, and obtains the information code element after error correction.Owing to needing before decoding that shortening code is supplemented into complete code, in decode procedure, need to carry out decoding according to complete code, even if every like this frame data only have a small amount of information code element, the decoding time that also can spend complete code is realized decoding, this can cause decoder decrease in efficiency in the long situation of short code, even occurs the problem of throughput deficiency under large bandwidth.
Summary of the invention
The embodiment of the present invention provides a kind of method and decoder of decoding, can improve the efficiency of decoding.
First aspect, provides a kind of method of decoding, comprising: according to RS(N, K) the reception data of code determine syndrome, wherein, N is this RS(N, K) code fixing code length, K is this RS(N, K) code fix information Baud Length, this RS(N, K) code the actual code length of shortening code be n; According to this syndrome, by Berlekamp-Mei Xi (Berlekamp-Massey, BM) iterative algorithm, determine error location polynomial σ (x) and improper value evaluator ω (x); According to σ (x) and ω (x), use initial value from this RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value, this initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number; According to the errors present searching and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
In the possible implementation of the first, according to this σ (x) and ω (x), use initial value from this RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value before, the method also comprises: determine this initial value.
In conjunction with the possible implementation of the first of first aspect, in the possible implementation of the second, determine this initial value, comprising: in the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1); In the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
In conjunction with the possible implementation of the second of first aspect, in the third possible implementation, in the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1), comprising: in the time determining syndrome, every input receives a code element of data by the tired α α that is multiplied by -1, input and obtain α when complete receiving the code element of data n-n+1; In the time determining syndrome, every input receives a code element of data by α -1the tired α that is multiplied by, inputs and obtains α when complete in the code element that receives data -(N-n+1).
In conjunction with any the possible implementation in first to three kind of possible implementation of first aspect or first aspect, in the 4th kind of possible implementation, according to this σ (x) and ω (x), use initial value from this RS(N, K) N-n+1 code element of code starts Search Error position and mistake in computation value, comprise: according to following equation Search Error position i=N-n+1, N-n+2 ..., N, if σ is (α i) be zero, i code element made mistakes; According to following equation mistake in computation value Y i, Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
Second aspect, a kind of decoder is provided, has comprised: syndrome determination module, for according to RS(N, K) the reception data of code are determined syndrome, wherein, N is this RS(N, K) code fixing code length, K is this RS(N, K) code fix information Baud Length, this RS(N, K) code the actual code length of shortening code be n; Iteration module, for according to this syndrome, by BM iterative algorithm, determines error location polynomial σ (x) and improper value evaluator ω (x); Search computing module, for according to σ (x) and ω (x), uses initial value from this RS(N, K) yard N-n+1 code element start Search Error position and mistake in computation value, this initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number; Correction module, for according to the errors present that searches and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
In the possible implementation of the first, this decoder also comprises: initial value determination module, and for determining this initial value.
In conjunction with the possible implementation of the first of second aspect, in the possible implementation of the second, this initial value determination module comprises: the first determining unit, and for synchronously determine α in the time determining syndrome n-n+1and α -(N-n+1); The second determining unit, in the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
In conjunction with the possible implementation of the second of second aspect, in the third possible implementation, this first determining unit comprises: first determines subelement, and in the time determining syndrome, every input receives a code element of data by the tired α α that is multiplied by -1, input and obtain α when complete receiving the code element of data n-n+1; Second determines subelement, and in the time determining syndrome, every input receives a code element of data by α -1the tired α that is multiplied by, inputs and obtains α when complete in the code element that receives data -(N-n+1).
In conjunction with any the possible implementation in first to three kind of possible implementation of second aspect or second aspect, in the 4th kind of possible implementation, this search computing module comprises: search unit, and for basis following equation Search Error position, i=N-n+1, N-n+2 ..., N, if σ is (α i) be zero, i code element made mistakes; Improper value computing unit, for the following equation mistake in computation value Y of basis i, Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
Based on technique scheme, the method of the decoding of the embodiment of the present invention and decoder, by from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculating, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, thereby can improve the efficiency of decoding.
Brief description of the drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, to the accompanying drawing of required use in the embodiment of the present invention be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the indicative flowchart of the method for decoding according to an embodiment of the invention.
Fig. 2 is according to the schematic diagram of the shortening code of the embodiment of the present invention.
Fig. 3 is the indicative flowchart of the method for decoding according to another embodiment of the present invention.
Fig. 4 is according to the schematic diagram of the method for the errors present search of the embodiment of the present invention and improper value calculating.
Fig. 5 is the schematic block diagram of decoder according to an embodiment of the invention.
Fig. 6 is the schematic block diagram of decoder according to another embodiment of the present invention.
Fig. 7 is according to the structure chart of the decoder of further embodiment of this invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is a part of embodiment of the present invention, instead of whole embodiment.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the prerequisite of not making creative work, should belong to the scope of protection of the invention.
Fig. 1 shows the indicative flowchart of the method 100 of decoding according to an embodiment of the invention.The method 100 is carried out by decoder, and as shown in Figure 1, the method 100 comprises:
S110, according to RS(N, K) code reception data determine syndrome, wherein, N be this RS(N, K) code fixing code length, K be this RS(N, K) yard fix information Baud Length, this RS(N, K) yard the actual code length of shortening code be n;
S120, according to this syndrome, by BM iterative algorithm, determines error location polynomial σ (x) and improper value evaluator ω (x);
S130, according to σ (x) and ω (x), use initial value from this RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value, this initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number;
S140, according to the errors present searching and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
The technical scheme of the embodiment of the present invention is carried out decoding for RS is shortened to code.The schematic diagram of RS shortening code as shown in Figure 2.N is RS(N, K) the fixing code length of code, K is fix information Baud Length, and n is for shortening the actual code length of code, and k is for shortening a code information code element length, and shortening a code information code element is payload symbols.Shorten code for RS, prior art, in the time of decoding, first, at data complementary N-n zero, is then carried out decoding according to fixing code length N, and first from fixing code length starts to carry out errors present search and improper value calculating.Like this, in the situation that short code is long, decoding efficiency declines.In embodiments of the present invention, in order to improve decoding efficiency, supplementary zero symbol does not participate in computing, from first payload symbols, that is, RS(N, K) N-n+1 code element of code start to carry out errors present search and improper value calculating.Particularly, decoder receives RS(N, K) after code, first according to RS(N, K) the reception data of code determine syndrome, again by BM iterative algorithm, determine σ (x) and ω (x), then from RS(N, K) N-n+1 code element of code start to carry out errors present search and improper value calculating, wherein, N-n+1 code element used to initial value α j (N-n+1)and α -(N-n+1), last, according to errors present and improper value to RS(N, K) the reception data of code carry out error correction, obtain data after error correction.Like this, according to shortening code actual code progress row decoding, supplementary zero symbol does not participate in computing, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, improves decoding efficiency.
Therefore, the method of the decoding of the embodiment of the present invention, by from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculating, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, thereby can improve the efficiency of decoding.
In S110, decoder is according to RS(N, K) code reception data determine syndrome.
If input data bitstream stream is:
R(x)=R N-1x N-1+…+R 1x 1+R 0 (1)
RS code syndrome is:
s l = R ( &alpha; l ) = &Sigma; i = 0 N - 1 R i &alpha; il = ( . . . ( ( R N - 1 &alpha; l + R N - 2 ) &alpha; l + R N - 3 ) &alpha; l + R 1 ) &alpha; l + R 0 - - - ( 2 )
Wherein, l=1,2 ..., r, r is verification Baud Length, r=N-K.
In S120, decoder, according to syndrome, by BM iterative algorithm, is determined σ (x) and ω (x).
Wherein,
σ(x)=1+σ 1x+σ 2x 2+…+σ tx t (3)
ω(x)=1+ω 1x+ω 2x 2+…+ω tx t (4)
In S130, decoder is according to σ (x) and ω (x), uses initial value from this RS(N, K) N-n+1 code element of code start Search Error position and mistake in computation value.
Particularly, directly to shortening, code carries out errors present search to the embodiment of the present invention and improper value calculates.Supplementary zero symbol does not participate in computing, directly from first payload symbols, namely RS(N, K) N-n+1 code element of code, start to carry out errors present search and improper value calculating.
On the one hand, in errors present search, calculate successively σ (α n-n+1), σ (α n-n+2) ..., σ (α n),
If σ is (α i) be zero, i code element made mistakes.
σ(α N-n+1)=1+σ 1N-n+1)+σ 2N-n+1) 2+…+σ tN-n+1) t (5)
σ(α N-n+2)=1+σ 1N-n+1)(α)+σ 2N-n+1) 2(α) 2+…+σ tN-n+1) t(α) t (6)
σ(α N)=1+σ 1N)+σ 2N) 2+…+σ tN) t (7)
Due to σ 0α 0=1, therefore, equation (5), (6), (7) are following equation (8) namely,
&sigma; ( &sigma; i ) = &Sigma; j = 0 t &sigma; j &alpha; ij , i = N - n + 1 , N - n + 2 , . . . , N - - - ( 8 )
On the other hand, in improper value calculates, calculate successively Y n-n+1, Y n-n+2..., Y n.
Y N - n + 1 = 1 + &omega; 1 ( &alpha; N - n + 1 ) + &omega; 2 ( &alpha; N - n + 1 ) 2 + . . . + &omega; t ( &alpha; N - n + 1 ) t ( &alpha; - 1 ) N - n + 1 ( 1 + &sigma; 1 ( &alpha; N - n + 1 ) + &sigma; 3 ( &alpha; N - n + 1 ) 2 + . . . + &sigma; t / 2 - 1 ( &alpha; N - n + 1 ) t / 2 - 1 ) - - - ( 9 )
Y N - n + 2 = 1 + &omega; 1 ( &alpha; N - n + 1 ) ( &alpha; ) + &omega; 2 ( &alpha; N - n + 1 ) 2 ( &alpha; ) 2 + . . . + &omega; t ( &alpha; N - n + 1 ) t ( &alpha; ) t ( &alpha; - 1 ) N - n + n ( &alpha; - 1 ) ( 1 + &sigma; 1 ( &alpha; N - n + 1 ) ( &alpha; ) + &sigma; 3 ( &alpha; N - n + 1 ) 2 ( &alpha; ) 2 + . . . + &sigma; t / 2 - 1 ( &alpha; N - n + 1 ) t / 2 - 1 ( &alpha; ) t / 2 - 1 ) - - - ( 10 )
Y N = 1 + &omega; 1 ( &alpha; N ) + &omega; 2 ( &alpha; N ) 2 + . . . + &omega; t ( &alpha; N ) t ( &alpha; - 1 ) N ( 1 + &sigma; 1 ( &alpha; N ) + &sigma; 3 ( &alpha; N ) 2 + . . . + &sigma; t / 2 - 1 ( &alpha; N ) t / 2 - 1 ) - - - ( 11 )
Due to ω 0α 0=1, therefore, equation (9), (10), (11) are following equation (12) namely,
Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i = N - n + 1 , N - n + 2 , . . . , N - - - ( 12 )
In embodiments of the present invention, carry out errors present search and improper value calculating since N-n+1 code element, and in the calculating of N-n+1 code element, need initial value α n-n+1, α 2 (N-n+1)..., α t (N-n+1)and α -(N-n+1), therefore, need to pre-determine α n-n+1, α 2 (N-n+1)..., α t (N-n+1)and α -(N-n+1)value.
Therefore, in embodiments of the present invention, as shown in Figure 3, alternatively, before S130, the method 100 also comprises:
S150, determines this initial value.
By α n=1 can obtain,
α N-n+1-n+1-n×α (13)
α -(N-n+1)N-(N-n+1)n-1n×α -1 (14)
In order not increase calculation resources, determine that initial value can synchronously carry out in the time of syndrome calculating and BM iteration.
Therefore, alternatively, S150 comprises:
In the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1);
In the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
Particularly, can be obtained by equation (13), in the time that syndrome calculates, before first code element that receives data arrives, initial value is set to α, then every input receives the tired α that is multiplied by of a code element of data -1, input and obtain α × α when complete receiving the code element of data -n, i.e. α n-n+1.On the other hand, can be obtained by equation (14), in the time that syndrome calculates, before first code element that receives data arrives, initial value is set to α -1, then every input receives the tired α that is multiplied by of a code element of data, inputs and obtains α when complete in the code element that receives data -1× α n, i.e. α -(N-n+1).Like this, when syndrome calculates, can obtain α n-n+1and α -(N-n+1).
Then, in the time carrying out BM iteration, by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
Like this, in the time of syndrome calculating and BM iteration, synchronously determine initial value, do not need to increase calculation resources, saved power consumption.
Should be understood that the embodiment of the present invention is to determining that the mode of initial value does not limit, except calculating at syndrome and synchronously determining initial value when BM iteration, also can realize by other means, for example, utilize extra computational resource calculating initial value.
In S140, decoder according to the errors present that searches and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
Determining after errors present and improper value, decoder according to errors present and improper value to this RS(N, K) the reception data of code carry out error correction, and the improper value of corresponding errors present is corrected, and obtain data after error correction, complete decoding.
Describe the errors present search of the embodiment of the present invention and the method that improper value calculates in detail below in conjunction with concrete example.It should be noted that this is just in order to help those skilled in the art to understand better the embodiment of the present invention, and the scope of the unrestricted embodiment of the present invention.
Fig. 4 is with RS(255,239) code is for having exemplified the schematic diagram of the errors present search of the embodiment of the present invention and the method for improper value calculating.In the example shown in Fig. 4, RS(255,239) the actual code length of code is n, maximum error correction code element number t=(255-239)/2=8.
0 code element of supplementing does not participate in computing, starts computing from first payload symbols (i.e. 256-n code element)., σ (α 1) ..., σ (α 255-n) and Y 1..., Y 255-ncorresponding 0 element position, does not calculate, and directly calculates σ (α 256-n) ..., σ (α 255) and Y 256-n..., Y 255.
Corresponding σ (the α of first payload symbols 256-n) and Y 256-n, need to use initial value α 256-n, α 2 (256-n)..., α 8 (256-n)and α -(256-n).This initial value can obtain in the time of syndrome calculating and BM iteration.In the time of errors present search and improper value calculating, as shown in Figure 4, input initial value by First_code.To first payload symbols (i.e. 256-n code element), First_code is effective, uses initial value α 256-n, α 2 (256-n)..., α 8 (256-n)and α -(256-n); To subsequent symbol, First_code is invalid, calculates according to normal iterative algorithm.Like this, only need to carry out errors present search and improper value calculating to 255 code elements of a 256-n code element to the, i.e. i=256-n in Fig. 4,257-n ..., 255.
To above-mentioned each code element,
&sigma; ( &alpha; i ) = &Sigma; j = 0 t &sigma; j &alpha; ij , i = 256 - n , 257 - n , . . . , 255 - - - ( 15 )
Obtaining errors present and improper value Y iafter, can be according to errors present and improper value Y ito receiving correcting data error.
Therefore, the method of the decoding of the embodiment of the present invention, by from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculates, search can be calculated and the iterations of improper value calculating reduce to the effective code length number of times of reality by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, in addition, by calculating at syndrome and synchronous calculating initial value when BM iteration, do not need to increase calculation resources, thereby can improve the efficiency of decoding.
Should understand, in various embodiment of the present invention, the size of the sequence number of above-mentioned each process does not also mean that the priority of execution sequence, and the execution sequence of each process should determine with its function and internal logic, and should not form any restriction to the implementation process of the embodiment of the present invention.
Above, in conjunction with Fig. 1 to Fig. 4, describe in detail according to the method for the decoding of the embodiment of the present invention, below in conjunction with Fig. 5 to Fig. 7, describe according to the decoder of the embodiment of the present invention.
Fig. 5 shows the schematic block diagram of decoder 500 according to an embodiment of the invention.As shown in Figure 5, this decoder 500 comprises:
Syndrome determination module 510, for according to RS(N, K) the reception data of code determine syndrome, wherein, N be this RS(N, K) the fixing code length of code, K be this RS(N, K) yard fix information Baud Length, this RS(N, K) yard the actual code length of shortening code be n;
Iteration module 520, for according to this syndrome, by BM iterative algorithm, determines error location polynomial σ (x) and improper value evaluator ω (x);
Search computing module 530, for according to σ (x) and ω (x), uses initial value from this RS(N, K) yard N-n+1 code element start Search Error position and mistake in computation value, this initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number;
Correction module 540, for according to the errors present that searches and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
In embodiments of the present invention, be n for shortening the actual code length of code, the RS(N that fixing code length is N, K) code, a supplementary N-n zero symbol does not carry out computing, and decoder is from first payload symbols,, RS(N, K) N-n+1 code element of code start to carry out errors present search and improper value calculating.Particularly, decoder receives RS(N, K) code after, syndrome determination module 510 is according to RS(N, K) the reception data of code are determined syndrome, iteration module 520, by BM iterative algorithm, is determined σ (x) and ω (x), then, search computing module 530 is from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculating, wherein, N-n+1 code element used to initial value α j (N-n+1)and α -(N-n+1), last, correction module 540 according to errors present and improper value to RS(N, K) the reception data of code carry out error correction, obtain data after error correction.Like this, decoder is according to shortening code actual code progress row decoding, and supplementary zero symbol does not participate in computing, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, improves decoding efficiency.
Therefore, the decoder of the embodiment of the present invention, by from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculating, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, thereby can improve the efficiency of decoding.
According to the decoder 500 of the embodiment of the present invention can corresponding to according to the embodiment of the present invention method in decoder, and above-mentioned and other operation of the modules in decoder 500 and/or function are respectively in order to realize the corresponding flow process of each method in Fig. 1 to Fig. 4, for simplicity, do not repeat them here.
Fig. 6 is the schematic block diagram of decoder 600 according to another embodiment of the present invention.
This decoder 600 comprises: syndrome determination module 610, iteration module 620, search computing module 630, correction module 640.Syndrome determination module 610, iteration module 620, search computing module 630, correction module 640 are identical with syndrome determination module 510, iteration module 520, search computing module 530, correction module 540 in Fig. 5 respectively, do not repeat them here.
In embodiments of the present invention, as shown in Figure 6, alternatively, this decoder 600 also comprises:
Initial value determination module 650, for determining this initial value.
Alternatively, this initial value determination module 650 comprises:
The first determining unit, for synchronously determining α in the time determining syndrome n-n+1and α -(N-n+1);
The second determining unit, in the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
In order not increase calculation resources, determine that initial value can synchronously carry out in the time of syndrome calculating and BM iteration.
Alternatively, this first determining unit comprises:
First determines subelement, and in the time determining syndrome, every input receives a code element of data by the tired α α that is multiplied by -1, input and obtain α when complete receiving the code element of data n-n+1;
Second determines subelement, and for determining when syndrome, every input receives a code element of data by tired α-1 α that is multiplied by, and inputs and obtains α when complete in the code element that receives data -(N-n+1).
In embodiments of the present invention, alternatively, this search computing module 630 comprises:
Search unit, for basis following equation Search Error position,
&sigma; ( &alpha; i ) = &Sigma; j = 0 t &sigma; j &alpha; ij , i=N-n+1,N-n+2,...,N,
If σ is (α i) be zero, i code element made mistakes;
Improper value computing unit, for the following equation mistake in computation value Y of basis i,
Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
According to the decoder 600 of the embodiment of the present invention can corresponding to according to the embodiment of the present invention method in decoder, and above-mentioned and other operation of the modules in decoder 600 and/or function are respectively in order to realize the corresponding flow process of each method in Fig. 1 to Fig. 4, for simplicity, do not repeat them here.
Therefore, the decoder of the embodiment of the present invention, by from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculates, search can be calculated and the iterations of improper value calculating reduce to the effective code length number of times of reality by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, in addition, by calculating at syndrome and synchronous calculating initial value when BM iteration, do not need to increase calculation resources, thereby can improve the efficiency of decoding.
Fig. 7 shows the structure of the decoder that another embodiment of the present invention provides, comprise at least one such as CPU of processor 702(), at least one network interface 705 or other communication interfaces, memory 706, with at least one communication bus 703, for realizing the connection communication between these devices.Processor 702 for example, for the executable module of execute store 706 storages, computer program.Memory 706 may comprise high-speed random access memory (RAM:Random Access Memory), also may also comprise non-unsettled memory (non-volatile memory), for example at least one magnetic disc store.Can be wired or wireless by least one network interface 705() realize the communication connection between this system gateway and at least one other network element, can use the Internet, wide area network, local network, metropolitan area network etc.
In some embodiments, memory 706 has been stored program 7061, and program 7061 can be carried out by processor 702, and this program comprises:
According to RS(N, K) code reception data determine syndrome, wherein, N be this RS(N, K) code fixing code length, K be this RS(N, K) yard fix information Baud Length, this RS(N, K) yard the actual code length of shortening code be n; According to this syndrome, by BM iterative algorithm, determine error location polynomial σ (x) and improper value evaluator ω (x); According to σ (x) and ω (x), use initial value from this RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value, this initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number; According to the errors present searching and the improper value that calculates to this RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
Alternatively, according to this σ (x) and ω (x), use initial value from this RS(N, K) before N-n+1 code element of code start Search Error position and mistake in computation value, also comprise: determine this initial value.
Alternatively, determine this initial value, comprising: in the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1); In the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
Alternatively, in the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1), comprising: in the time determining syndrome, every input receives a code element of data by the tired α α that is multiplied by -1, input and obtain α when complete receiving the code element of data n-n+1; In the time determining syndrome, every input receives a code element of data by α -1the tired α that is multiplied by, inputs and obtains α when complete in the code element that receives data -(N-n+1).
Alternatively, according to this σ (x) and ω (x), use initial value from this RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value, comprising: according to following equation Search Error position, i=N-n+1, N-n+2 ..., N, if σ is (α i) be zero, i code element made mistakes; According to following equation mistake in computation value Y i, Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
The above technical scheme providing from the embodiment of the present invention can be found out, the embodiment of the present invention is passed through from RS(N, K) N-n+1 code element of code starts to carry out errors present search and improper value calculating, the iterations that search is calculated and improper value calculates can be reduced to actual effectively code length number of times by complete code length number of times, within the shorter time, obtain decode results, reduce decoding latency, thereby can improve the efficiency of decoding.
Should be understood that in embodiments of the present invention, term "and/or" is only a kind of incidence relation of describing affiliated partner, and expression can exist three kinds of relations.For example, A and/or B, can represent: individualism A exists A and B, these three kinds of situations of individualism B simultaneously.In addition, character "/" herein, generally represents that forward-backward correlation is to liking a kind of relation of "or".
Those of ordinary skill in the art can recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with electronic hardware, computer software or the combination of the two, for the interchangeability of hardware and software is clearly described, composition and the step of each example described according to function in the above description in general manner.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can realize described function with distinct methods to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
Those skilled in the art can be well understood to, and for convenience of description and succinctly, the specific works process of the system of foregoing description, device and unit, can, with reference to the corresponding process in preceding method embodiment, not repeat them here.
In the several embodiment that provide in the application, should be understood that disclosed system, apparatus and method can realize by another way.For example, device embodiment described above is only schematic, for example, the division of described unit, be only that a kind of logic function is divided, when actual realization, can have other dividing mode, for example multiple unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.In addition, shown or discussed coupling each other or direct-coupling or communication connection can be indirect coupling or communication connections by some interfaces, device or unit, can be also electric, machinery or other form connect.
The described unit as separating component explanation can or can not be also physically to separate, and the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in multiple network element.Can select according to the actual needs some or all of unit wherein to realize the object of embodiment of the present invention scheme.
In addition, the each functional unit in each embodiment of the present invention can be integrated in a processing unit, can be also that the independent physics of unit exists, and can be also that two or more unit are integrated in a unit.Above-mentioned integrated unit both can adopt the form of hardware to realize, and also can adopt the form of SFU software functional unit to realize.
If described integrated unit is realized and during as production marketing independently or use, can be stored in a computer read/write memory medium using the form of SFU software functional unit.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words, or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprise that some instructions (can be personal computers in order to make a computer equipment, server, or the network equipment etc.) carry out all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CDs.
The above; it is only the specific embodiment of the present invention; but protection scope of the present invention is not limited to this; any be familiar with those skilled in the art the present invention disclose technical scope in; can expect easily amendment or the replacement of various equivalences, within these amendments or replacement all should be encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.

Claims (10)

1. a method for decoding, is characterized in that, comprising:
According to Reed-Solomon RS(N, K) code reception data determine syndrome, wherein, N is described RS(N, K) code fixing code length, K is described RS(N, K) code fix information Baud Length, described RS(N, K) code the actual code length of shortening code be n;
According to described syndrome, by Berlekamp-Mei Xi BM iterative algorithm, determine error location polynomial σ (x) and improper value evaluator ω (x);
According to σ (x) and ω (x), use initial value from described RS(N, K) code N-n+1 code element start Search Error position and mistake in computation value, described initial value comprises α j (N-n+1)and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number;
According to the errors present searching and the improper value that calculates to described RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
2. method according to claim 1, it is characterized in that, according to described σ (x) and ω (x), use initial value from described RS(N described, K) before N-n+1 code element of code starts Search Error position and mistake in computation value, described method also comprises:
Determine described initial value.
3. method according to claim 2, is characterized in that, described definite described initial value, comprising:
In the time determining syndrome, synchronously determine α n-n+1and α -(N-n+1);
In the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
4. method according to claim 3, is characterized in that, describedly synchronously determines α when syndrome determining n-n+1and α -(N-n+1), comprising:
In the time determining syndrome, a code element of the described reception data of every input is by the tired α α that is multiplied by -1, input and obtain α when complete in the code element of described reception data n-n+1;
In the time determining syndrome, a code element of the described reception data of every input is by α -1the tired α that is multiplied by, inputs and obtains α when complete in the code element of described reception data -(N-n+1).
5. according to the method described in any one in claim 1 to 4, it is characterized in that, described according to described σ (x) and ω (x), use initial value from described RS(N, K) N-n+1 code element of code starts Search Error position and mistake in computation value, comprising:
According to following equation Search Error position,
&sigma; ( &alpha; i ) = &Sigma; j = 0 t &sigma; j &alpha; ij , i=N-n+1,N-n+2,...,N,
If σ is (α i) be zero, i code element made mistakes;
According to following equation mistake in computation value Y i,
Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
6. a decoder, is characterized in that, comprising:
Syndrome determination module, for according to Reed-Solomon RS(N, K) the reception data of code determine syndrome, wherein, N is described RS(N, K) code fixing code length, K is described RS(N, K) code fix information Baud Length, described RS(N, K) code the actual code length of shortening code be n;
Iteration module, for according to described syndrome, by Berlekamp-Mei Xi BM iterative algorithm, determines error location polynomial σ (x) and improper value evaluator ω (x);
Search computing module, for according to σ (x) and ω (x), uses initial value from described RS(N, K) yard N-n+1 code element start Search Error position and mistake in computation value, described initial value comprises α j (N-n+1) and α -(N-n+1), wherein, α is primitive element, j=1, and 2 ..., t, t is maximum error correction code element number;
Correction module, for according to the errors present that searches and the improper value that calculates to described RS(N, K) the reception data of code carry out error correction, obtain data after error correction.
7. decoder according to claim 6, is characterized in that, described decoder also comprises:
Initial value determination module, for determining described initial value.
8. decoder according to claim 7, is characterized in that, described initial value determination module comprises:
The first determining unit, for synchronously determining α in the time determining syndrome n-n+1and α -(N-n+1);
The second determining unit, in the time carrying out BM iteration by α n-n+1tire out and take advantage of, obtain α 2 (N-n+1), α 3 (N-n+1)..., α t (N-n+1).
9. decoder according to claim 8, is characterized in that, described the first determining unit comprises:
First determines subelement, and in the time determining syndrome, a code element of the described reception data of every input is by the tired α α that is multiplied by -1, input and obtain α when complete in the code element of described reception data n-n+1;
Second determines subelement, and in the time determining syndrome, a code element of the described reception data of every input is by α -1the tired α that is multiplied by, inputs and obtains α when complete in the code element of described reception data -(N-n+1).
10. according to the decoder described in any one in claim 6 to 9, it is characterized in that, described search computing module comprises:
Search unit, for basis following equation Search Error position,
&sigma; ( &alpha; i ) = &Sigma; j = 0 t &sigma; j &alpha; ij , i=N-n+1,N-n+2,...,N,
If σ is (α i) be zero, i code element made mistakes;
Improper value computing unit, for the following equation mistake in computation value Y of basis i,
Y i = &Sigma; j = 0 t &omega; j &alpha; ij ( &alpha; - 1 ) i ( &Sigma; j = 1 t / 2 &sigma; 2 j - 1 &alpha; i ( 2 j - 1 ) ) , i=N-n+1,N-n+2,...,N。
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