CN104049021B - There is the BIOFET of the sensing area of increase - Google Patents

Abstract

The invention provides a kind of biological field effect transistor (BioFET) and a kind of method manufacturing BioFET device.The method includes: use the one or more processing steps with complementary metal oxide semiconductors (CMOS) (CMOS) process compatible or typical complementary metal oxide semiconductors (CMOS) (CMOS) technique to form BioFET.BioFET device includes: substrate, transistor arrangement, sealing coat, the boundary layer being positioned in the opening of sealing coat and be positioned at the metal crown structure above boundary layer.Boundary layer is arranged on the side relative with grid structure of transistor with metal crown structure.

Description

There is the BIOFET of the sensing area of increase

Cross-reference to related applications

This application claims submit to, entitled " the BioFET with Increased Sensing on March 14th, 2013 Area " the priority of U.S. Provisional Patent Application the 61/782nd, 534, entire contents is hereby expressly incorporated by reference.

Technical field

The present invention relates to biosensor and for the method forming biochip.More particularly it relates to tool There is biochip of biosensor and fluid device and forming method thereof.

Background technology

Biosensor be for sense and detect the device of biomolecule and based on electronics, electrochemistry, optics and Mechanical detection principle is operated.Including the biosensor of transistor be inductance survey biological entities or the electric charge of biomolecule, Photon and the sensor of mechanical performance.Can be detected by detection biological entities or biomolecule itself, or logical Cross the interaction between specific reactants and biological entities/biomolecule and reaction detects.Quasiconductor work can be used Skill manufactures this biosensor, and this biosensor can converted electrical number and can being readily applied to rapidly In integrated circuit (IC) and MEMS (MEMS).

The experimental facilities that biochip is substantially miniaturized, it can implement hundreds of simultaneous bioid Learn reaction.Biochip can detect specific biomolecule, measures their performance, process signal and even can directly divide Analysis data.Biochip enables research worker to screen substantial amounts of biological analyte rapidly for multiple purpose, from disease Diagnosis is to the detection of bio-terrorism agent (bioterrorism agents).Advanced bio chip uses substantial amounts of biosensor With fluid passage with integrated reaction, sensing and sample management.BioFET(biological field effect transistor or biology-organic effect Transistor) it is a kind of biosensor including surveying the transistor of biomolecule or biological entities for inductance.Although BioFET Have the advantage that at a lot of aspects, but still there is challenge, such as, due to quasiconductor system in their manufacture and/or operating aspect Make the consistency problem between technique, occur in that biologic applications, semiconductor manufacturing work when implementing large-scale integrated (LSI) technique Restriction in skill and/or integrated and/or other challenges of the limit, the signal of telecommunication and biologic applications.

Summary of the invention

In order to solve the problem in the presence of prior art, according to an aspect of the invention, it is provided a kind of biological field Effect transistor (BioFET) device, including:

Substrate；

Transistor arrangement, is positioned in described substrate and has the grid being positioned at above source area, drain region and channel region Structure；

Sealing coat, is positioned on the side relative with described grid structure of described substrate, and described sealing coat has and is positioned at institute State the opening at the described channel region of transistor arrangement；

Boundary layer, is positioned in described opening；And

Metal crown structure, is positioned at above described boundary layer and covers the sidewall of described opening at least in part.

In an alternative embodiment, described metal crown structure includes tantalum, tantalum nitride, niobium, tungsten nitride, ruthenium-oxide or their group Close.

In an alternative embodiment, described metal crown structure is completely covered the sidewall of described opening.

In an alternative embodiment, a part for described metal crown structure covers a part for described sealing coat.

In an alternative embodiment, described boundary layer includes high-k dielectric.

In an alternative embodiment, described boundary layer includes aluminium oxide, titanium oxide, hafnium oxide, tantalum oxide or stannum oxide.

In an alternative embodiment, described BioFET device also includes: be arranged on the fluid passage on described sealing coat.

In an alternative embodiment, described BioFET device also includes: multilayer interconnection part (MLI), arrange in described substrate and It is positioned at the side identical with described grid structure of described substrate.

In an alternative embodiment, carrier substrates is bonded to described substrate by the passivation layer above described MLI.

In an alternative embodiment, the surface area of described metal crown structure is at least twice of surface area of described boundary layer.

According to a further aspect in the invention, a kind of side manufacturing biological field effect transistor (BioFET) device is additionally provided Method, including:

Forming transistor on a semiconductor substrate, wherein, described transistor includes: be formed at described Semiconductor substrate front On grid structure and channel region between source area and drain region；

Etching opening in sealing coat on the back side being arranged on described Semiconductor substrate, wherein, described opening exposes The channel region of described transistor；

Depositing interface material on channel region in said opening；

Described boundary material deposits metal level；And

Pattern described metal level to form metal crown structure.

In an alternative embodiment, described method also includes: form multilayer interconnection part (MLI) on the front of described substrate.

In an alternative embodiment, described sealing coat is the insulator of silicon-on-insulator (SOI) substrate.

In an alternative embodiment, described method also includes: Semiconductor substrate described in thinning；And, serve as a contrast at described quasiconductor Layer deposited isolating on the back side at the end.

In an alternative embodiment, described Semiconductor substrate is SOI substrate and described thinning removal buried oxide.

In an alternative embodiment, described method also includes: be joined to by receptor in described metal crown structure, wherein, described Receptor selects the group that free enzyme, antibody, part, receptor, polypeptide, nucleotide, the cell of organ, organism and tissue are formed.

According to another aspect of the invention, additionally provide a kind of device, including:

First biological field effect transistor (BioFET) device, including:

Grid structure, is formed on substrate；

Source area and drain region, adjacent with described grid structure be formed in described substrate；

Channel region, between described source area and described drain region, and is positioned at below described grid structure；

Boundary layer, is arranged on described channel region, and wherein, described boundary layer is arranged on the first side of described channel region, And described grid structure is arranged on the second relative side of described channel region；And

Metal crown structure, is positioned at above described boundary layer, and described metal crown structure has the table bigger than described boundary layer Area；And

Sensing amplifier, is connected to described first BioFET device.

In an alternative embodiment, described metal crown structure includes multilamellar.

In an alternative embodiment, described device also includes: multiple BioFET, and the plurality of BioFET is configured to array.

In an alternative embodiment, the material of the described metal crown structure of at least one BioFET in the plurality of BioFET Different from the material of the described metal crown structure of at least another BioFET in the plurality of BioFET.

Accompanying drawing explanation

When reading in conjunction with the accompanying drawings, the present invention may be better understood according to the following detailed description.It should be emphasized that , according to the standard practices in industry, all parts is not necessarily to scale and it is intended solely for illustrative purposes.Real On border, in order to clearly discuss, the quantity of various parts and size can be arbitrarily increased or reduce.

Fig. 1 is the sectional view of the embodiment of the BioFET device according to the one or more aspect of the present invention.

Fig. 2 A and 2B is each embodiment of the method for the manufacture BioFET device according to the one or more aspect of the present invention Flow chart.

Fig. 3 to Figure 14 is the sectional view of each embodiment of BioFET device constructed according to the invention.

Detailed description of the invention

Should be appreciated that disclosure below provides many different embodiments or example, to implement the difference of the present invention Feature.The instantiation of parts or layout is described below to simplify the present invention.Certainly they be only example and and need not In limiting the present invention.Additionally, in the following description, first component is formed at second component can include first over or on The embodiment that parts are formed in the way of directly contacting with second component, it is also possible to be included between first component and second component Form the embodiment that additional components makes first component and second component be not directly contacted with.Additionally, the relative positional terms quoted, Such as " top ", " anterior ", " bottom ", " rear portion ", for providing the relative position relation between element and being not used to table Show any absolute direction.For purposes of simplicity and clarity, arbitrarily can draw all parts with different chi examples.

In BioFET, MOSFET(mos field effect transistor) grid by biocompatible layer or life Changing compatibility layer or the biological functional layer as the immobilized probe molecule of surface receptor is replaced, wherein this grid controls source The conductivity of the quasiconductor between pole contact and drain contacts.Substantially, BioFET is the field with quasiconductor transducer Effect biosensor.The advantage of BioFET is the prospect with unmarked operation.The use of BioFET avoids such as with glimmering The costly and time consuming marking operation that analyte is marked by light or radioactive probe.

By target biological molecules or biological entities and grid or the acceptor molecule that is fixed on the grid of BioFET are tied up Fixed, regulate the conductivity of BioFET.When target biological molecules or biological entities are bonded to grid or immobilized receptor, The drain current of BioFET changes along with grid potential, and grid potential depends on bound target (target bound) Type and quantity.The change of drain current can be measured and can be used for determining between receptor and target biological molecules or biological entities The type of joint and quantity.Various receptors, such as ion, enzyme, antibody, part, receptor, polypeptide, oligonucleotide, organ Cell, organism and tissue etc., can be used for the grid of functionalization BioFET.Such as, in order to detect ssDNA(strand deoxidation core Ribosomal ribonucleic acid), the grid of functionalization BioFET can be carried out by immobilized complementary ssDNA chain.Additionally, in order to detect such as tumor mark The various protein of will thing, can carry out the grid of functionalization BioFET by monoclonal antibody.

There is the top of the floating grid that an example is the grid being connected to BioFET of the biosensor on sensing surface Portion.Floating grid is the grid being connected to BioFET by the stack of metal interconnecting wires and through hole (or multilayer interconnection part, MLI) Structure.Multiple metal levels above gate electrode also can be caused damage by antenna effect during MLI formation process.This In BioFET, electromotive force is occurred to adjust at the outer surface of final (top) metal level or the dielectric surface that is formed on the top of MLI Joint reaction, and indirectly sensed by BioFET.Due to the parasitic capacitance relevant to MLI, the remolding sensitivity other biological sensing of device The sensitivity of device is low.Therefore, the generally size of regulation sensing plate, so that can occur the electromotive force of sufficient detectable amount on sensing plate Regulation reaction.Minimum sensing plate size can limit the density of BioFET in turn.

In another example, biomolecule is directly engaged or is bonded to grid or grid electricity Jie of BioFET by receptor Matter.In the case of the parasitic capacitance not being associated with MLI, these " directly sensings " BioFET directly senses target organism Molecule.Gate electrode or gate-dielectric are exposed to fluid ring to be formed by the MLI material that its structural requirement is removed on BioFET , in fluid environment, wherein there is the reaction of potential regulating surface in the sensing trap in border.These BioFET are sensitiveer than floating grid polar form, But due to several reasons, it is relatively difficult to build.The sensing trap of etching has high aspect ratio, and such as 30 or higher, the most generally High energy plasma etching is utilized to implement.The high aspect ratio of sensing trap also limits the profile of etched sensing trap.Due to The infringement of electric charge induction, high energy plasma etching can damage gate electrode.Reducing the aspect ratio of sensing trap so that etching more Add a trial of easy aspect, cause the number of metal level to limit, be reduced to one layer or two metal layers.The minimizing of metal level Limit the interconnection wiring of device and integrated selection, such as, for controlling number and the type of the circuit of BioFET.This technique is also It is the sensitiveest to alignment, because misalignment may expose around the metal in the MLI of sensing trap or cause sensing surface area little In designed area.

In a further example, biomolecule is placed as from the dorsal part of substrate near grid.In this example, sensing table Face is formed on the dorsal part of transistor gate through the dorsal part of substrate.This example avoids having to etch wears multilayer interconnection part Difficulty, and also biomolecule is positioned to from grid enough close to, there is higher spirit than floating grid biosensor Quick property.Fig. 1 is the schematic diagram of dorsal part sensing (backside sensing, BSS) BioFET100.Semiconductor device 100 includes shape Become the grid structure 102 on substrate 114.Substrate 114 also includes source area 104, drain region 106 and between source area 104 With the active area 108(between drain region 106 is such as, including channel region).Applicable CMOS technology technology can be used to form grid Electrode structure 102, source area 104, drain region 106 and active area 108.Grid structure 102, source area 104, drain region 106 with And active area 108 forms FET.Sealing coat 110 is arranged on (that is, the lining of the opposite side relative to grid structure 102 of substrate 114 The back side at the end).

Opening is provided in sealing coat 110.Opening is substantially directed at active area 108.Boundary layer 124 is arranged on active area On the bottom of the opening on the surface of 108.

According to the multiple embodiment of the present invention, metal crown structure (metal crown structure) 126 is arranged on boundary layer Above in the of 124, and cover the sidewall of opening at least in part.Metal crown structure 126 is for detecting biomolecule or biology The sensing surface of entity.The area of metal crown structure 126 is more than the area of boundary layer 124 and therefore can accommodate more electromotive force tune Joint reaction.In certain embodiments, metal crown structure 126 extends to above the drift angle of opening and partly covers sealing coat 110.In certain embodiments, multiple receptors are limited in metal crown structure 126 or are amplified in metal crown structure 126 provide For detecting the site of biomolecule or biological entities.In other embodiments, metal crown structure 126 surface will be for having spy Biomolecule or the biological entities of determining affinity are bonded to metal material.The material bag containing metal for metal crown structure 126 Include tantalum, tantalum nitride, niobium, tungsten nitride, ruthenium-oxide or combinations thereof.It is used as including other metals of gold and platinum.According to one A little embodiments, the material for metal crown structure 126 is ohmic metal.

Semiconductor device also include being positioned at above sealing coat 110 and formed above metal crown structure 126 fluid channel or The fluidic structures 132 of trap.During operation, in fluid analysis thing 130 incoming fluid raceway groove.Fluid analysis thing 130 includes connecing The target molecule of the receptor 12 8 being bonded in metal crown structure 126.Semiconductor device 100 sensing reaction and affined target are divided Son.Semiconductor device 100 includes that symbol illustrates and the electric contact piece different from the cross section of actual contact, this electric contact piece With source area 106(116), drain region (118), grid structure 102(120) and/or active area 108(is such as, normal-gate (FG) 122) contact.

Therefore, although traditional FET employs gate contact and controls between source electrode and drain electrode (such as, raceway groove) The conductivity of quasiconductor, semiconductor device 100 allow the receptor being formed on the opposite side of FET device to control conductivity, Grid structure 102(is such as simultaneously, polysilicon) post tensioned unbonded prestressed concrete (such as, the source-substrate in traditional F ET or body node) is provided.Grid Structure 102 provides and can control channel electrons distribution and not have the post tensioned unbonded prestressed concrete of bulk substrate effect.Therefore, if molecule is attached Be connected to provide the receptor in metal crown structure 126, then the resistance in fieldistor channel district is changed.In some embodiments In, use normal-gate bias rather than post tensioned unbonded prestressed concrete bias.Front gate electrode is located adjacent to sense surface.Therefore, semiconductor device 100 can be used for detecting one or more specific biological molecules or biological real in analyte surrounding and/or in opening 112 Body.

Semiconductor device 100 can include extra passive component, such as resistor, capacitor, inducer and/or fuse； And other active parts, these other active devices include P-channel field-effect transistor (PEFT) transistor (PFET), N-channel field-effect transistor (NFET), mos field effect transistor (MOSFET), complementary metal oxide semiconductors (CMOS) (CMOS) transistor, High voltage transistor and/or high frequency transistor；Other parts being suitable for；And/or combinations thereof.It can also be appreciated that additional features can Add to semiconductor device 100, and for the Additional examples of composition of semiconductor device 100, parts more described below can Replaced or omitted.

Fig. 2 A is the process chart of the method 200 for manufacturing BSS biological field effect transistor (BioFET).Method 200 include that use is partly led with complementary metal oxide semiconductors (CMOS) (CMOS) process compatible or typical CMOS (Complementary Metal Oxide Semiconductor) One or more technological operations of body (CMOS) technique form BioFET.Be appreciated that can before method 200, period and Extra step is provided afterwards, and alternative or omit steps more described below in different embodiments of the invention. Furthermore, it is to be understood that method 200 includes the step with the feature of typical CMOS technology technological process, and herein to this A little steps are only briefly described.

Method 200 starts from operating 202, it is provided that substrate.Substrate is Semiconductor substrate.This Semiconductor substrate can be silicon substrate Or wafer.Alternatively, substrate comprises the steps that another elemental semiconductor, such as germanium；Compound semiconductor, including carborundum, arsenic Gallium, gallium phosphide, indium phosphide, indium arsenide and/or indium antimonide；Alloy semiconductor, including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP and/or GaInAsP；Or combinations thereof.In many embodiment, substrate is semiconductor-on-insulator (SOI) substrate.SOI substrate can include being formed by technique (such as note oxygen isolation (SIMOX) and/or other technique being suitable for) Bury oxygen (BOX) layer.Can be doped substrate, such as p-type or N-shaped are adulterated.As used herein, workpiece refer to substrate with And any material engaging or being deposited thereon.Semiconductor substrate (or device substrate) refers to that devices built is on which or within which Base material and do not include the material of any deposition or joint.Fig. 3 is to have partly manufacturing of substrate 302 The cross section of BioFET300.In the example of fig. 3, substrate 302 includes block silicon layer 304, oxide layer 306, active layer 308 SOI substrate.Oxide layer 306 can be to bury oxygen (BOX) layer.In one embodiment, BOX layer is silicon dioxide (SiO2).Active layer 308 can include silicon.Active layer 308 suitably can adulterate by N-shaped and/or p-type dopant.

With reference to Fig. 2 A, then method 200 carries out operating 204, forms field-effect transistor (FET) on substrate.FET is permissible It is N-shaped FET(nFET) or p-type FET(pFET).FET includes grid structure, source area, drain region, is positioned at source area and drain region Between channel region.Such as, according to the type of FET, source/drain regions can include n-type dopant or p-type dopant.Grid is tied Structure includes gate dielectric, gate electrode layer and/or other suitable layers.In certain embodiments, gate electrode is polysilicon.Other Gate electrode include metal gate electrode, metal gate electrode include the material of such as Cu, W, Ti, Ta, Cr, Pt, Ag, Au, such as TiN, The metallic compound being suitable for of TaN, NiSi, CoSi, or the combination of these conductive materials.In many embodiment, grid electricity is situated between Matter is silicon oxide.Other gate-dielectrics include silicon nitride, silicon oxynitride, have high-k (high k) dielectric medium and/ Or combinations thereof.The example of high-g value includes hafnium silicate, hafnium oxide, zirconium oxide, aluminium oxide, tantalum pentoxide, titanium dioxide Hafnium-aluminium oxide (HfO2-Al2O3) alloy or combinations thereof.FET can use typical CMOS technology to be formed, such as light Carve；Ion implanting；Diffusion；Deposition, including physical vapor deposition (PVD), evaporation of metal or sputtering, chemical vapor deposition (CVD), Plasma enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), high density Plasma CVD (HDPCVD), atomic layer CVD(ALCVD) and spin coating etc.；Etching, including wet etching, dry ecthing and plasma Body etches；And/or other CMOS technology being suitable for.

Fig. 3 is the cross section of the BioFET300 with substrate 302 of part manufacture.Transistor unit 310 is arranged on substrate On 302.Transistor unit 310 includes gate-dielectric 312, gate electrode 314 and the source/drain regions being arranged in trap 319 316.Source/drain regions 316 and trap 319 can include the adulterant of opposite types (such as, N-shaped, p-type).Gate electrode 314 is polycrystalline Silicon gate or metal gates.In certain embodiments, gate-dielectric 312 be gate oxide level (such as, SiO2, HfO2 or Other high k metal-oxides).

After substrate forms FET, substrate forms multilayer interconnection (MLI) structure.MLI structure can include wire, Conductive through hole and/or intermediate dielectric layer (such as, interlayer dielectric (ILD)).MLI structure can provide the physical connection with transistor And electrical connection.Wire can include copper, aluminum, tungsten, tantalum, titanium, nickel, cobalt, metal silicide, metal nitride, polysilicon, their group Close and/or other potentially include the material of one or more layers or one or more layers lining.Centre or interlayer dielectric layer are (such as, ILD layer) silicon dioxide, fluorinated silica glass (FGS), a kind of product of SILK(Michigan Dow Chemical can be included), BLACK DIAMOND(California, can obtain in the application material of Santa Clara) and/or other insulant.Can be by typical Applicable technique (such as CVD, PVD, ALD, coating, spin coating and/or other technique) during CMOS manufactures forms MLI.

With reference to the example of Fig. 3, MLI structure 318 is arranged on substrate 302.MLI structure 318 includes by conductive through hole or inserts Multiple conductor wires 320 of plug 322 connection.In one embodiment, conductor wire 320 includes aluminum and/or copper.An embodiment In, through hole 322 includes tungsten.In another embodiment, through hole 322 includes copper.The dielectric layer 324 being arranged on substrate 302 includes Intermediary's conductive component of MLI structure 318.Dielectric layer 324 can be interlayer dielectric or ILD layer (sometimes referred to as inter-metal dielectric, Or IMD layer) and/or be made up of multiple ILD sublayers.In one embodiment, dielectric layer 324 includes silicon oxide.MLI structure 318 Can provide to grid 314 and/or the electrical connection of source/drain 316.

Referring again to Fig. 2 A, in operation 206, the dorsal part at substrate forms opening.Opening is formed in and is arranged at substrate Dorsal part one or more layers in groove.Opening exposes being positioned at below grid and adjacent with the channel region of FET of substrate Region.Opening can be formed in the following manner: uses the photoetching process being suitable for provide the pattern on substrate and to provide erosion Carving technology is to remove material until exposing the body structure of FET device from dorsal part.The etch process being suitable for includes wet etching, includes The dry ecthing of plasma etching and/or other technique being suitable for.

In certain embodiments, the details of the operation forming opening includes the multiple steps shown in the process chart of Fig. 2 B Rapid and the sectional view of Fig. 4 to Figure 10.In the operation 252 of Fig. 2 B, it is attached carrier substrates.As shown in Figure 4, carrier substrates 402 attachments (such as, engaging) are to device substrate 302.Carrier substrates 402 is attached to the front of the device substrate 302 above MLI. In one embodiment, carrier substrates is bonded to the passivation layer being formed on the MLI of substrate and/or ILD layer.Carrier substrates can make It is attached to device substrate with melted, diffusion, congruent melting and/or other joint methods being suitable for.Exemplary carrier substrate includes silicon, glass Glass and quartz.Carrier substrates 402 can include other functions, such as interconnecting member, wafer bond site, the cavity of restriction and/or Other parts being suitable for.Carrier substrates can be removed in subsequent technique (such as, after thinning) period.

In the operation 254 of Fig. 2 B, thinning Semiconductor substrate.Upset device substrate.Wet etching process, dry ecthing can be used Technique, plasma etch process, chemically mechanical polishing (CMP) technique and/or for removing a part for Semiconductor substrate Other techniques being suitable for carry out thinning device substrate.The exemplary etchant being suitable for thinning substrate includes HNA(Fluohydric acid., nitre Acid and acetic acid), Tetramethylammonium hydroxide (TMAH), KOH, slow-release oxygen fluoride etch liquid (BOE) and/or with CMOS technology technology phase Other etchants being suitable for held.

In Figure 5, thinning device substrate makes to remove block silicon layer and buried insulating barrier.Can be in kinds of processes step Middle thinning device substrate, such as, first removes the block silicon layer of SOI wafer, then removes the buried insulating layer of SOI wafer.? In one embodiment, the first thinning technique includes using such as CMP, HNA and/or TMAH etching to remove bulk silicon, this technique Stop at buried oxidation layer.Can be the second thinning technique, such as BOE wet etching after first thinning technique, this technique can be gone Except buried oxide and can stop at the silicon of active layer.Thinning technique can expose the active area of substrate.In one embodiment, Expose channel region (such as, between source/drain regions and be positioned at the active area below grid structure).Thinning technique it After, the thickness of substrate can be between about 500 angstroms (A) to 1500A.Such as, in one embodiment, the active area of SOI substrate There is the thickness between about 500A to 1500A.

In other embodiments, thinning device substrate makes to remove block silicon layer, and buried insulating layer is retained in lining At at the end.Such as CMP, HNA and/or TMAH etching can be used to implement the removal of bulk silicon, and it stops at buried insulating layer.? After thinning technique, the thickness of substrate can have between about 500 angstroms (A) to 1500A.Such as, in one embodiment, SOI The thickness of the active area of substrate is between about 500A to 1500A.Buried insulating layer (surface of substrate is now provided) can be every Absciss layer.With dotted outline, Fig. 5 shows that the buried insulating layer 306 when not being removed is with as an example.

In the operation 256 of Fig. 2 B, substrate is formed groove and leads with the one or more of MLI structure to expose and to provide The contact of electric trace.Can by photoetching process with patterned trench opening, then by the wet etching being suitable for, dry ecthing or etc. from Daughter etch process forms groove.In one embodiment, groove exposes the part of metal one (metal1) layer of MLI (the first metal layer such as, after formation of the gate structure, formed in MLI structure).With reference to the example of Fig. 6, in substrate 302 Etch groove 602(specifically, through active layer 308), to expose the joint on the conductor wire 320 of MLI structure 318 (landing) district.Alternatively, may pass through isolation area 306(such as, oxide) etch groove.

In the operation 258 of Fig. 2 B, substrate forms sealing coat.Sealing coat can include such as oxide or nitride Dielectric material.In one embodiment, sealing coat is silicon oxide.With reference to the example of Fig. 7, sealing coat 702 is arranged on active layer 308 On.In one embodiment, sealing coat 702 is silicon dioxide.As it has been described above, in one embodiment, exhausted due to SOI substrate Edge layer is still located on substrate and plays a role to replace the needs (in whole or in part) to single sealing coat, the most also Do not form sealing coat.As it can be seen, remove the part of sealing coat 702, particularly those are located immediately at the bonding land of conductor wire 320 The part of the sealing coat 702 of top.

In the operation 260 of Fig. 2 B, sealing coat 702 is formed and patterns interconnection layer.Interconnection layer can provide MLI to tie The connection (such as, I/O connects) of structure.Interconnection layer can provide the connection (such as, I/O connects) of transistor 310.Interconnection layer can wrap Include conductive material, such as copper, aluminum, combinations thereof and/or other conductive materials being suitable for.Interconnection layer can provide such as redistributing layer (RDL) function.With reference to the example of Fig. 8, interconnection layer 802 is arranged on sealing coat 702.Interconnection layer 802 can provide input/output The signal of transistor 310.In one embodiment, interconnection layer 802 includes aluminium copper.

In the operation 262 of Fig. 2 B, form passivation layer on the device substrate.Passivation layer can cover a part for interconnection layer. Passivation layer can include opening, forms fastener (such as, I/O) at this opening part.In one embodiment, passivation layer includes dioxy SiClx, it may, however, also be other compositionss.Passivation layer is applicable to provide the protection to device (such as interconnection layer), including Protection device is from moist impact.With reference to the example of Fig. 9, the substrate including interconnection layer 802 forms passivation layer 902.Blunt Change layer 902 and include opening 904, engage (such as, lead-in wire engages, projection) at opening part and the connection (example of device 300 can be provided As, I/O connects).In other words, opening 904 can expose conduction I/O pad.

In the operation 264 of Fig. 2 B, the dorsal part at substrate forms opening.Opening can be formed make to expose the active of substrate District is positioned at the part of transistor arrangement (such as, channel region) lower section.Opening can substantially with the grid structure pair of transistor Accurate.Can be by the photoetching process being suitable for and such as dry ecthing, wet etching, plasma etching and/or their group subsequently The etch process closed forms opening.In one embodiment, opening is formed in the isolation layer.In one embodiment, exist (SOI substrate) buried insulating layer is formed opening.With reference to Figure 10, it is provided that opening 1002.Opening 1002 exposes active layer 308 A part.Specifically, the channel region 302 of active layer 308 can be exposed.Additionally, the one of source electrode and/or drain region can be exposed Part.The embodiment of Fig. 2 B relates to several aspects of the present invention, wherein, substrate with fluidly connect identical side and formed and use Electrical connection in BioFET device.

The invention still further relates to embodiment, wherein, substrate with fluidly connect relative side and formed for BioFET device The electrical connection of part.In these embodiments, before engaging carrier substrates and thinning device substrate, formed and be connected to be positioned at substrate Front on the electrode of MLI and pad.Groove 602 it is formed without from the back side.

Refer again to Fig. 2 A, in operation 208, form boundary layer in the opening.Boundary layer is formed at the grid structure of FET On the substrate exposed of lower section, and cover the whole bottom of opening 1002.Exemplary boundary material includes high k dielectric Film, metal-oxide, electrolyte and/or other materials being suitable for.The instantiation of boundary material includes HfO₂、Ta₂O₅, and Pt, The oxide of Au, W, Ti, Al and Cu, and such as SiO₂、Si₃N₄、Al₂O₃、TiO₂, TiN, SnO and SnO₂In other electricity be situated between Matter.Such as, boundary layer can be formed by using CMOS technology, and such as physical vapor deposition (PVD) (sputtering), chemical vapor are heavy Long-pending (CVD), plasma enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), high-density plasma CVD (HDPCVD) or atomic layer CVD(ALCVD).In certain embodiments, boundary layer bag Include multiple layer.In the example of Figure 11, boundary layer 1102 is arranged in a part for active layer 308 and source electrode and drain electrode.Boundary Surface layer 1102 can be patterned as aligning with grid structure and (such as, be set and be patterned as to be only remained in opening 1002 In).

Refer again to Fig. 2 A, operation 210 deposits metal level.Metal level can be metal element, metal alloy or conduction Metallic compound.Suitably metal element includes titanium, tantalum, niobium, tungsten, ruthenium or other transition gold commonly used in semiconductor processing Belong to.Metallic compound includes conductive nitride or the oxide of these transition metal.Such as, tungsten nitride, tantalum nitride and ruthenium-oxide. Metal level can be the composite bed of two-layer or multilamellar.Such as, metal level can include tungsten nitride and ruthenium-oxide.

Metal level is conformally deposited above substrate and in the opening covering boundary layer.PVD(can be used to sputter), metal Chemical vapor deposition (MCVD), atomic layer CVD(ALCVD), use the electrochemical deposition of crystal seed layer or electroless deposition to deposit Metal level.In certain embodiments, ion beam depositing can be used to come the most in the opening and around opening, deposit metal level.

In operation 212, patterned metal layer is to form metal crown structure.In certain embodiments, patterning includes: logical Overetch is to remove the unwanted part of the metal level deposited in operation 210.First etching mask is deposited and patterned. Etching mask can be the photoresist or hard mask patterned by photoetching process.In other embodiments, first on substrate Other substrate materials is deposited and patterned, and removes it after deposition metal level.Stripping photolithography glue material is also removed arbitrarily The metal level of overlying.When other metal surfaces exposed can be caused not by the dry ecthing including plasma to remove metal pattern During the plasma-induced infringement of desired amount, lift-off technology can be useful.Due to merely with wet etching or include mental retardation Amount plasma etching just can remove the photoresist in stripping technology, therefore, opposing metallic patterning techniques, the most preferably The method.But, stripping technology has the possibility producing more multi-pollutant, and obtained metal crown structure may include Jagged edge.

In the example of Figure 12, metal crown structure 1202 is arranged on above boundary layer 1102 and in opening 1002 and opening Around 1002.As it can be seen, metal crown structure 1202 includes the lip covering a part for sealing coat 702.But, implement at some In example, all metal crown structures 1202 are all located in opening 1002.

According to multiple embodiments, the surface area of metal crown structure 1202 is the about twice of the surface area of boundary layer 1102.Relatively Big surface area allows more possible potential regulating reaction to occur on its surface.But, this area arrives the most greatly generation and strides across The significant resistance of metal crown structure.Additionally, this area arrives BioFET the most greatly so that big quantitative response from the lining of I-V curve District moves in saturation region.But, grid bias can be changed during operation to guarantee that BioFET rests in lining district, sensitive The advantage that accompaniment increase in the reduction of degree and analyte concentration can reduce metal crown structure.

Refer again to Fig. 2 A, in operation 214, microfluidic channel or trap are set on the device substrate.Fluid passage limits The region of the analyte stream warp of metal crown superstructure.Can be engaged by utilizing the soft lithographic of dimethione (PDMS), wafer Method and/or other methods being suitable for form fluid passage.With reference to the example of Figure 13, fluid passage 1302 is arranged on substrate On.Fluid passage 1302 provides and is positioned at the trap 1304 above metal crown structure 1202.

Refer again to Fig. 2 A, in operation 216, metal crown structure arranges receptor or film processes.Receptor can include enzyme, Antibody, part, protein, polypeptide, nucleotide and their part.Receptor can be to be provided with the natural of modified forms on one end Albumen or enzyme are to detect specific analyte.The other end of receptor is arranged to be bonded to metal crown structure or be bonded to metal crown Another molecule of structure/film processes.As shown in figure 14, multiple receptors 1402 are arranged in metal crown structure 1202.By using Metal crown structure, the available bigger surface area of receptor is for joint, and therefore more site is available for biomolecule or life The detection of thing entity uses.

In certain embodiments, form or deposit the metal crown structure of more than one types.Different metal crown structures can Mean to form different surface areas by patterning.Therefore may compare the measured value of zones of different of transistor IV curve with really Setting analysis substrate concentration.In some instances, different materials is used in different sites.Owing to receptor may be designed to different Metal crown structural material has different affinitys, BioFET device can have be disposed for detecting different biomolecule or Several BioFET of biological entities.Such as, some sites can include the metal crown structure containing tantalum, and other sites can include containing The metal crown structure of ruthenium-oxide.A kind of receptor may be designed to that a kind of or other surfaces are had higher affinity.Another kind is subject to Body may not have selectivity between.Selective receptor is exposed by first passing through microfluidic channels and trap, can be Non-selective receptor takies the bond site on high-affinity surface before being exposed to surface.By being designed for different surfaces Receptor, BioFET device can be used for designing various biomolecules or biological entities.

During the operation of BioFET device, provide the solution comprising target molecule in the fluid passage.BioFET device The zones of different for processing target molecule can be included.Some biomaterials can be dissolved by cell, separate, dye, and with it Its mode uses chemistry, electrically or optically equipment test or analyzes.Such as, drop of blood can be inserted in entrance and first pass through Blood plasma and cell type are separated.In drop of blood, specific cell can be dissolved by cell.Some macromole in lysate can It is decomposed further analyzed with the downstream in flow path.By limiting or being cut into object chain, DNA (deoxyribonucleic acid) (DNA) point Son can be broken into fragment.

After biomaterial is processed into object, detect mesh by flowing through the BioFET containing microfluidic channel and trap Mark thing.Controllable flow is dynamic so that compared to the response time, this object is in the presence of metal crown structure sensing surface There is the long time of staying.In certain embodiments, change grid bias, collect the electric current flowing through BioFET simultaneously.Collect also Analyze the electrical information from BioFET.

In many embodiment, CMOS manufacture equipment (such as, manufacturing instrument) can be implemented according to many for relevant device Plant the method for embodiment until forming fluid passage.In one embodiment, user subsequently can provide process for treating surface, electricity Xie Zhi, receptor etc..

In a word, method disclosed herein and device provide the BioFET using CMOS and/or CMOS compatible technique to manufacture. Some embodiments of disclosed BioFET can be used in biology and/or medical applications, including relate to liquid, biological entities and/ Or those of reagent.A kind of testing mechanism of embodiments more of the present invention includes: due to target biological molecules or biology Entity is the FET of the BioFET that acceptor molecule binding on the grid structure of device causes with grid structure or setting (fixing) Conductivity regulates.

Some embodiments of BioFET are arranged in the form of an array.They can include for post tensioned unbonded prestressed concrete biasing post tensioned unbonded prestressed concrete to carry High response time and/or enhancing sensitivity.Grid structure can be built on silicon-on-insulator (SOI) substrate.This implements at some Example can provide and at full speed work and/or advantage that energy consumption is little.Inverting transistor and can improve manufacture on soi substrates is provided Homogeneity, has the technology controlling and process etc. of enhancing.Such as, owing to being formed on soi substrates, some embodiments can provide the short of enhancing Channelling effect.

It is, therefore, to be understood that in one embodiment, describe BioFET device, including substrate, the crystalline substance that is positioned in substrate Body tubular construction, the side that the grid structure with transistor of substrate is relative has the sealing coat of opening, it is positioned in opening Boundary layer and be positioned at the metal crown structure of the sidewall above boundary layer and at least partly covering opening.Transistor arrangement has It is positioned at the grid structure above source area, drain region and channel region.Opening in isolation structure is positioned at the ditch of transistor arrangement At road district.

One aspect of the present invention provides a kind of semiconductor device including BioFET device array.This array is connected to At least one sensing amplifier.The first BioFET device in array includes: the grid structure that is formed on substrate, be formed at Source area in the substrate that grid structure is adjacent and drain region, between source area and drain region and be positioned under grid structure The channel region of side and boundary layer over the channel region is set and is positioned at the metal crown structure above boundary layer, this metal crown Structure has the surface area bigger than boundary layer.Boundary layer is arranged on the first side of channel region, and grid structure is arranged on On the second relative side of channel region.

Another aspect provides the method manufacturing BioFET device, including: form crystalline substance on a semiconductor substrate Body pipe and the sealing coat on the second side being arranged on Semiconductor substrate etch opening, to expose the raceway groove of transistor District.Described transistor includes: is formed at the grid structure on the first side of Semiconductor substrate and is positioned at source area and drain region Between channel region.Described method also includes: depositing interface material, deposition metal level and pattern on channel region in the opening Change metal level to form metal crown structure.

Describing in these embodiments one or more, it is multiple excellent that the present invention can provide relative to prior art device Gesture.In the following discussion to advantage and advantage, it is notable that these advantages and/or result occur in some embodiments In, but it is not necessary to.The advantage of some embodiments of the present invention includes the ability providing client's customizable products.Example As, fluid passage formation, receptor introducing etc. can be performed by client.Client can customize the size of metal crown structure, shape and Material.Another exemplary advantage of one or more embodiment as described herein: in traditional device, usually require that height Aspect ratio processes to form biocompatible surface (such as, it is desirable to from the front-side etch of substrate to grid structure).Due to we Method provides the method processed on the back side of thinning wafer, thus reduces aspect ratio.

Claims (20)

1. biological field effect transistor (BioFET) device, including:

Substrate；

Transistor arrangement, is positioned in described substrate and has the grid structure being positioned at above source area, drain region and channel region, The width of described grid structure is less than described source area, described drain region and the combined width of described channel region；

Sealing coat, is positioned on the side relative with described grid structure of described substrate, and described sealing coat has and is positioned at described crystalline substance Opening at the described channel region of body tubular construction；

Boundary layer, is positioned in described opening；And

Metal crown structure, is positioned on described boundary layer and covers at least in part the sidewall of described opening.

Biological field field effect transistor devices the most according to claim 1, wherein, described metal crown structure includes tantalum, nitridation Tantalum, niobium, tungsten nitride, ruthenium-oxide or combinations thereof.

Biological field field effect transistor devices the most according to claim 1, wherein, described metal crown structure is completely covered described The sidewall of opening.

Biological field field effect transistor devices the most according to claim 1, wherein, the part covering of described metal crown structure A part for described sealing coat.

Biological field field effect transistor devices the most according to claim 1, wherein, described boundary layer includes high-k dielectric.

Biological field field effect transistor devices the most according to claim 1, wherein, described boundary layer includes aluminium oxide, oxidation Titanium, hafnium oxide, tantalum oxide or stannum oxide.

Biological field field effect transistor devices the most according to claim 1, also includes:

It is arranged on the fluid passage on described sealing coat.

Biological field field effect transistor devices the most according to claim 1, also includes:

Multilayer interconnection part (MLI), arranges in described substrate and is positioned at the side identical with described grid structure of described substrate.

Biological field field effect transistor devices the most according to claim 8, wherein, carrier substrates is by described multilayer interconnection part The passivation layer of top is bonded to described substrate.

Biological field field effect transistor devices the most according to claim 1, wherein, the surface area of described metal crown structure is At least twice of the surface area of described boundary layer.

11. 1 kinds of methods manufacturing biological field effect transistor (BioFET) device, including:

Forming transistor on a semiconductor substrate, wherein, described transistor includes: be formed on described Semiconductor substrate front Grid structure and the channel region between source area and drain region, the width of described grid structure is less than described source area, institute State drain region and the combined width of described channel region；

Etching opening in sealing coat on the back side being arranged on described Semiconductor substrate, wherein, described opening exposes described The channel region of transistor；

Depositing interface material on channel region in said opening；

Described boundary material deposits metal level；And

Pattern described metal level to form metal crown structure.

The method of 12. manufacture biological field field effect transistor devices according to claim 11, also includes: at described substrate Multilayer interconnection part (MLI) is formed on front.

The method of 13. manufacture biological field field effect transistor devices according to claim 11, wherein, described sealing coat is exhausted The insulator of silicon (SOI) substrate on edge body.

The method of 14. manufacture biological field field effect transistor devices according to claim 11, also includes:

Semiconductor substrate described in thinning；And

Layer deposited isolating on the back side of described Semiconductor substrate.

The method of 15. manufacture biological field field effect transistor devices according to claim 14, wherein, described Semiconductor substrate Buried oxide is removed for silicon-on-insulator (SOI) substrate and described thinning.

The method of 16. manufacture biological field field effect transistor devices according to claim 11, also includes:

Receptor is joined in described metal crown structure, wherein, described receptor choosing free enzyme, antibody, part, receptor, polypeptide, core The group that thuja acid, the cell of organ, organism and tissue are formed.

17. 1 kinds of biochip devices, including:

First biological field effect transistor (BioFET) device, including:

Grid structure, is formed on substrate；

Source area and drain region, adjacent with described grid structure be formed in described substrate；

Channel region, between described source area and described drain region, and is positioned at below described grid structure, and described grid is tied The width of structure is less than described source area, described drain region and the combined width of described channel region；

Boundary layer, is arranged on described channel region, and wherein, described boundary layer is arranged on the first side of described channel region, and Described grid structure is arranged on the second relative side of described channel region；And

Metal crown structure, is positioned at above described boundary layer, and described metal crown structure has the surface area bigger than described boundary layer； And

Sensing amplifier, is connected to described first biological field field effect transistor devices.

18. biochip devices according to claim 17, wherein, described metal crown structure includes multilamellar.

19. biochip devices according to claim 17, also include:

Multiple biological field effect transistors, the plurality of biological field effect transistor is configured to array.

20. biochip devices according to claim 19, wherein, in the plurality of biological field effect transistor at least In the material of the described metal crown structure of one biological field effect transistor and the plurality of biological field effect transistor at least The material of the described metal crown structure of another biological field effect transistor is different.