CN104035463A - Power supply circuit - Google Patents
Power supply circuit Download PDFInfo
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- CN104035463A CN104035463A CN201310071751.8A CN201310071751A CN104035463A CN 104035463 A CN104035463 A CN 104035463A CN 201310071751 A CN201310071751 A CN 201310071751A CN 104035463 A CN104035463 A CN 104035463A
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- power supply
- digital controlled
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- comparing unit
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Abstract
The invention discloses a power supply circuit. The power supply circuit comprises a comparison unit, a reference circuit and a power supply processing unit, wherein the comparison unit is used for being connected with two or more external power supplies, comparing power supply signals of the connected external power supplies and selecting one external power supply according to the comparison result, the reference circuit is used for generating a reference voltage and/or a reference current in accordance with the external power supply selected by the comparison unit and outputting the reference voltage and/or the reference current to the power supply processing unit, the power supply processing unit is used for outputting the power supply according to the reference voltage and/or the reference current which are generated by the reference circuit and the external power supply selected by the comparison unit. According to the technical scheme, the power supply circuit solves the technical problem that dual or multiple power supply schemes are not perfect in the prior art.
Description
Technical field
The present invention relates to electronic technology field, relate in particular to a kind of feed circuit.
Background technology
Increasing chip uses dual power supply or multiple feed, and this can work chip under various modes, has expanded the usable range of chip.But this also means that chip can work under any one power supply, also can work in the time that dual power supply or many power supplys all exist.This just requires reference circuit (Vinit) need to do equal number, and each power supply uses the reference circuit of oneself.As shown in Figure 1, for the structural representation of prior art double power supply circuit, comprise the first reference circuit 11, the second reference circuit 12, the first power circuit 13, second source circuit 14 and chip core circuit (CORE) 15, wherein, the first reference circuit 11 accesses the VCC1 in dual power supply, produce IREF1(current reference) and/or VREF1(voltage reference), and input to the first power circuit 13, the first power circuit 13 accesses IREF1 and/or VREF1, also access VCC1, according to IREF1 and/or VREF1, and VCC1 output VDD is to chip core circuit 15, the second reference circuit 12 accesses the VCC2 in dual power supply, produces IREF2 and/or VREF2, and inputs to second source circuit 14, second source circuit 14 accesses IREF2 and/or VREF2, also access VCC2, according to IREF2 and/or VREF2, and VCC2 output VDD is to chip core circuit 15.
Above-mentioned traditional scheme, owing to there being two or more complete power-supply systems, cause the waste of chip area, simultaneously in the time that two or more power supplys all exist, cause the waste of reference circuit power consumption, and the output of each power circuit or have competitive relation, often need to do more complicated processing and eliminate race problem, increase extra cost.
Summary of the invention
The invention provides a kind of feed circuit, solve prior art dual power supply or the perfect not technical matters of multiple feed scheme.
For solving the problems of the technologies described above, the present invention by the following technical solutions:
A kind of feed circuit, comprise comparing unit, reference circuit and power supply processing unit, wherein:
Comparing unit is used for accessing two or more external power sources, and the power supply signal of the external power source accessing is compared, and selects one of them external power source according to comparative result;
Reference circuit produces reference voltage and/or reference current for the external power source of selecting according to comparing unit, and exports power supply processing unit to;
Reference voltage and/or reference current that power supply processing unit produces according to reference circuit, and the external power source that comparing unit is selected is outwards exported power supply.
Further, these feed circuit also comprise gauge tap, described gauge tap is connected between described comparing unit and described reference circuit, and for the digital controlled signal of exporting according to described comparing unit, the external power source that comparing unit is selected accesses described reference circuit.
Further, described comparing unit is used for accessing two external power sources, and the power supply signal of described two external power sources is compared, according to comparative result output and external power source corresponding and opposite polarity two digital controlled signals one by one, described comparing unit utilizes respectively each digital controlled signal control external power source corresponding with it whether to access described reference circuit and described power supply processing unit.
Further, described comparing unit compares for the voltage of two external power sources to access, in described two digital controlled signals of output, the digital controlled signal that the power supply larger with voltage is corresponding is low level, and the digital controlled signal that the power supply less with voltage is corresponding is high level.
Further, described gauge tap comprises two identical PMOS pipes, the grid of one of them PMOS pipe accesses in described two digital controlled signals, the grid of another PMOS pipe accesses another in described two digital controlled signals, when each PMOS pipe is low level for the digital controlled signal accessing at grid, the power supply corresponding with accessed digital controlled signal accessed to described reference circuit.
Further, described comparing unit compares for the voltage of two power supplys to access, in described two digital controlled signals of output, the digital controlled signal that the power supply larger with voltage is corresponding is high level, and the digital controlled signal that the power supply less with voltage is corresponding is low level.
Further, described gauge tap comprises two identical NMOS pipes, the grid of one of them NMOS pipe accesses in described two digital controlled signals, the grid of another NMOS pipe accesses another in described two digital controlled signals, when each NMOS pipe is high level for the digital controlled signal accessing at grid, the power supply corresponding with accessed digital controlled signal accessed to described reference circuit.
Further, described gauge tap comprises two transmission gates, and each transmission gate all accesses described two digital controlled signals, under the control of described two digital controlled signals, one conducting in described two transmission gates, the power supply that comparing unit is selected accesses described reference circuit.
Further, described power supply processing unit comprises two power circuits, reference voltage and/or reference current that one of them power circuit access reference circuit produces, also access the one in described two digital controlled signals, and the power supply corresponding with accessed digital controlled signal; Reference voltage and/or reference current that another power circuit access reference circuit produces, also access the another one in described two digital controlled signals, and another power supply corresponding with accessed digital controlled signal; Described two power circuits open or cut out under the control of accessed digital controlled signal.
Feed circuit provided by the invention, by comparing unit, accessed two or more external power sources are selected, only had an external power source access reference circuit, corresponding needs a reference circuit, reduce area occupied and power consumption, also reduced the complexity of circuit.Simultaneously, owing to only using an external power source, therefore a shared power circuit also can be only set in power supply processing unit, further reduce area occupied and power consumption, reduce the complexity of circuit, when power supply processing unit comprises that while counting the power circuit of same number with power supply, the unlatching of the each power circuit of digital controlled signal control that can export by comparing unit, selects a power supply to use.
Brief description of the drawings
Fig. 1 is the structural representation of prior art double power supply circuit;
The structural representation of the feed circuit that Fig. 2 provides for one embodiment of the invention;
The structural representation of the feed circuit that Fig. 3 provides for another embodiment of the present invention.
Embodiment
Main design of the present invention is: by comparing unit, accessed two or more external power sources are selected, only had an external power source access reference circuit and power supply processing unit, power supply processing unit is only exported a VDD for external circuit.Feed circuit provided by the invention are including, but not limited to giving chip core circuit supply, and range of application is in chip.
By reference to the accompanying drawings the present invention is described in further detail below by embodiment.
The structural representation of the feed circuit that Fig. 2 provides for one embodiment of the invention, feed circuit comprise comparing unit 21, reference circuit 22 and power supply processing unit 23, comparing unit 21 for example, for accessing two or more external power sources (VCC1, VCC2 ... VCCn), and the power supply signal of the external power source accessing is compared, select one of them power supply VCCx according to comparative result; Reference circuit 22 produces reference voltage and/or reference current for the power supply VCCx selecting according to comparing unit 21, and exports power supply processing unit 23 to; The reference voltage that power supply processing unit 23 produces according to reference circuit 22 and/or reference current, and the power supply VCCx outside (for example chip core circuit) that comparing unit 21 is selected exports power supply.
In one embodiment, in power supply processing unit 23, can only include a shared power circuit, further save area occupied and power consumption, reduce costs and the complexity of circuit, in power supply processing unit 23, also can comprise the power circuit of counting same number with power supply, in this case, the unlatching that can control each power circuit selects a power supply to use.
In one embodiment, comparing unit 21 can compare the voltage swing of accessed external power source, selects the power supply that voltage is larger.
In one embodiment, comparing unit 21 by output digital controlled signal mode notify reference circuit 22 and power supply processing unit 23 selected go out external power source.
In one embodiment, between comparing unit 21 and reference circuit 22, can also comprise gauge tap, for the digital controlled signal of exporting according to comparing unit 21, the external power source access reference circuit 22 that comparing unit 21 is selected; Between comparing unit 21 and power supply processing unit 23, also can comprise gauge tap, for the digital controlled signal of exporting according to comparing unit 21, the external power source access power supply processing unit 23 that comparing unit 21 is selected; Or between comparing unit 21 and reference circuit 22, power supply processing unit 23, share a gauge tap, for the digital controlled signal of exporting according to comparing unit 21, external power source access reference circuit 22 and power supply processing unit 23 that comparing unit 21 is selected.
For double power supply circuit, comparing unit 21 is for accessing two external power sources, and these two external power sources are compared, can export and external power source corresponding and opposite polarity two digital controlled signals one by one according to comparative result, whether each digital controlled signal accesses reference circuit 22 and power supply processing unit 23 for controlling an external power source corresponding with it.In this case, gauge tap can be two identical PMOS pipes, or two identical NMOS pipes, or two are managed by PMOS pipe and NMOS the transmission gate forming.
The structural representation of the feed circuit that Fig. 3 provides for another embodiment of the present invention, as shown in Figure 3, feed circuit comprise comparing unit 31, gauge tap 32, reference circuit 33 and power supply processing unit 34, wherein,
Comparing unit 31 is for accessing two external power sources (VCC1 and VCC2), and the voltage of the external power source accessing is compared, according to comparative result output and external power source corresponding and opposite polarity two digital controlled signals one by one, be respectively the first digital controlled signal C, the second digital controlled signal-C, suppose: in the present embodiment, VCC1 is corresponding with C, VCC2 with-C is corresponding.
Gauge tap 32 comprises two identical PMOS pipes, the one PMOS pipe 321 and the 2nd PMOS pipe 322, wherein, one in two digital controlled signals that the grid access comparing unit 31 of the one PMOS pipe 321 is exported (is supposed in the present embodiment, that access is the first digital controlled signal C herein), accessed the one in source electrode or the grid of a PMOS pipe 321 with access external power source VCC1 that the first digital controlled signal C is corresponding, the another one in source electrode or the grid of a PMOS pipe 321 connects the input end of reference circuit 33; The grid of the 2nd PMOS pipe 322 accesses the second digital controlled signal-C, another external power source VCC2 corresponding with access the second digital controlled signal-C accesses the one in source electrode or the grid of the 2nd PMOS pipe 322, and the another one in source electrode or the grid of the 2nd PMOS pipe 322 connects the input end of reference circuit 33.The conducting in the time of grid access low level of each PMOS pipe, by the external power source access reference circuit 33 of its source electrode or grid access.Reference circuit 33 produces reference voltage and/or reference current for the external power source accessing according to gauge tap 32, and exports power supply processing unit 34 to.
Power supply processing unit 34 comprises the first power circuit 341 and second source circuit 342, the first power circuit 341 and second source circuit 342 access respectively reference voltage and/or the reference current that reference circuit 33 produces, simultaneously, the VCC1 of access comparing unit 31 and the first digital controlled signal C corresponding with VCC1 are accessed to the first power circuit 341, by the VCC2 of access comparing unit 31, and second digital controlled signal corresponding with VCC2-C access second source circuit 342, the first power circuit 341 opens or cuts out under the control of the first digital controlled signal C, second source circuit 342 is opened or is closed under the control of the second digital controlled signal-C.
In the present embodiment, reference circuit 33 is that two external power sources share, and has saved area occupied and power consumption, has reduced the complexity of cost and circuit.The principle of work of the feed circuit that the present embodiment is illustrated is as follows:
When VCC1 > VCC2, the comparing unit 31 first digital controlled signal C corresponding with VCC1 that export is low level, and the second digital controlled signal-C corresponding with VCC2 is high level.The PMOS that grid accesses the first digital controlled signal C manages 321 conductings, and a PMOS pipe 321 is by the VCC1 access reference circuit 33 of source electrode or grid access.Reference circuit 33 produces reference voltage and/or reference current according to VCC1, exports the first power circuit 341 and second source circuit 342 to.Under the enabling of the first digital controlled signal C, the first power circuit 341 is opened, and the reference voltage producing according to reference circuit 33 and/or reference current, and VCC1 generation VDD, export external circuit to.Under the forbidden energy control of the second digital controlled signal-C, second source circuit 342 is closed, and does not produce VDD.
When VCC1 < VCC2, the comparing unit 31 first digital controlled signal C corresponding with VCC1 that export is high level, and the second digital controlled signal-C corresponding with VCC2 is low level.The 2nd PMOS that grid accesses the second digital controlled signal-C manages 322 conductings, and the 2nd PMOS pipe 322 is by the VCC2 access reference circuit 33 of source electrode or grid access.Reference circuit 33 produces reference voltage and/or reference current according to VCC2, exports the first power circuit 341 and second source circuit 342 to.Under the enabling of the second digital controlled signal-C, second source circuit 342 is opened, and the reference voltage producing according to reference circuit 33 and/or reference current, and VCC2 generation VDD, export external circuit to.Under the forbidden energy control of the first digital controlled signal C, the first power circuit 341 cuts out, and does not produce VDD.
In another embodiment, suppose that in described two digital controlled signals that comparing unit 31 exports, the digital controlled signal that the external power source larger with voltage is corresponding is high level, the digital controlled signal that the external power source less with voltage is corresponding is low level.So in gauge tap 32, can use two identical NMOS pipe belts for two identical PMOS pipes in above-described embodiment, to export two digital controlled signals corresponding one by one with comparing unit 31, while being low level for the digital controlled signal accessing at grid, the external power source corresponding with accessed digital controlled signal accessed to described reference circuit 33.
In another embodiment, gauge tap 32 can also comprise that two are managed by PMOS pipe and NMOS the transmission gate forming, and each transmission gate all accesses described two digital controlled signals, for example:
The first digital controlled signal C is accessed to the grid of the PMOS pipe in the first transmission gate, the second digital controlled signal-C is accessed to the grid of the NMOS pipe in the first transmission gate; The first digital controlled signal C is accessed to the grid of the NMOS pipe in the second transmission gate; the second digital controlled signal-C is accessed to the grid of the PMOS pipe in the second transmission gate; the the first digital controlled signal C exporting when comparing unit 31 is low level; when the second digital controlled signal-C is high level; the first transmission gate conducting; external power source access reference circuit 33, the second transmission gates of access the first transmission gate are opened and closed; On the contrary, the first digital controlled signal C exporting when comparing unit 31 is high level, and when the second digital controlled signal-C is low level, the first transmission gate opens and closes, and the second transmission gate conducting, by the external power source access reference circuit 33 of access the second transmission gate.
Or, the first digital controlled signal C is accessed to the grid of the NMOS pipe in the first transmission gate, the second digital controlled signal-C is accessed to the grid of the PMOS pipe in the first transmission gate; The first digital controlled signal C is accessed to the grid of the PMOS pipe in the second transmission gate; the second digital controlled signal-C is accessed to the grid of the NMOS pipe in the second transmission gate; the the first digital controlled signal C exporting when comparing unit 31 is low level; when the second digital controlled signal-C is high level; the first transmission gate opens and closes; the second transmission gate conducting, by the external power source access reference circuit 33 of access the second transmission gate; On the contrary, the first digital controlled signal C exporting when comparing unit 31 is high level, and when the second digital controlled signal-C is low level, the first transmission gate conducting, opens and closes external power source access reference circuit 33, the second transmission gates of access the first transmission gate.
Feed circuit provided by the invention, only need a reference circuit, have reduced area occupied and power consumption, have also reduced the complexity of circuit.Simultaneously, owing to only using an external power source, therefore a shared power circuit also can be only set in power supply processing unit, further reduce area occupied and power consumption, reduce the complexity of circuit, when power supply processing unit comprises that while counting the power circuit of same number with external power source, the unlatching of the each power circuit of digital controlled signal control that can export by comparing unit, selects a power supply to use.
Above content is in conjunction with concrete embodiment further description made for the present invention, can not assert that specific embodiment of the invention is confined to these explanations.For general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (9)
1. feed circuit, is characterized in that, comprise comparing unit, reference circuit and power supply processing unit, wherein:
Comparing unit is used for accessing two or more external power sources, and the power supply signal of the external power source accessing is compared, and selects one of them external power source according to comparative result;
Reference circuit produces reference voltage and/or reference current for the external power source of selecting according to comparing unit, and exports power supply processing unit to;
Reference voltage and/or reference current that power supply processing unit produces according to reference circuit, and the external power source that comparing unit is selected is outwards exported power supply.
2. feed circuit as claimed in claim 1, it is characterized in that, also comprise gauge tap, described gauge tap is connected between described comparing unit and described reference circuit, for the digital controlled signal of exporting according to described comparing unit, the external power source that comparing unit is selected accesses described reference circuit.
3. feed circuit as claimed in claim 2, it is characterized in that, described comparing unit is used for accessing two external power sources, and the power supply signal of described two external power sources is compared, according to comparative result output and external power source corresponding and opposite polarity two digital controlled signals one by one, described comparing unit utilizes respectively each digital controlled signal control external power source corresponding with it whether to access described reference circuit and described power supply processing unit.
4. feed circuit as claimed in claim 3, it is characterized in that, described comparing unit compares for the voltage of two external power sources to access, in described two digital controlled signals of output, the digital controlled signal that the power supply larger with voltage is corresponding is low level, and the digital controlled signal that the power supply less with voltage is corresponding is high level.
5. feed circuit as claimed in claim 4, it is characterized in that, described gauge tap comprises two identical PMOS pipes, the grid of one of them PMOS pipe accesses in described two digital controlled signals, the grid of another PMOS pipe accesses another in described two digital controlled signals, when each PMOS pipe is low level for the digital controlled signal accessing at grid, the power supply corresponding with accessed digital controlled signal accessed to described reference circuit.
6. feed circuit as claimed in claim 3, it is characterized in that, described comparing unit compares for the voltage of two power supplys to access, in described two digital controlled signals of output, the digital controlled signal that the power supply larger with voltage is corresponding is high level, and the digital controlled signal that the power supply less with voltage is corresponding is low level.
7. feed circuit as claimed in claim 6, it is characterized in that, described gauge tap comprises two identical NMOS pipes, the grid of one of them NMOS pipe accesses in described two digital controlled signals, the grid of another NMOS pipe accesses another in described two digital controlled signals, when each NMOS pipe is high level for the digital controlled signal accessing at grid, the power supply corresponding with accessed digital controlled signal accessed to described reference circuit.
8. feed circuit as claimed in claim 6, it is characterized in that, described gauge tap comprises two transmission gates, each transmission gate all accesses described two digital controlled signals, under the control of described two digital controlled signals, one conducting in described two transmission gates, the power supply that comparing unit is selected accesses described reference circuit.
9. the feed circuit as described in claim 3 to 8 any one, it is characterized in that, described power supply processing unit comprises two power circuits, reference voltage and/or reference current that one of them power circuit access reference circuit produces, also access the one in described two digital controlled signals, and the power supply corresponding with accessed digital controlled signal; Reference voltage and/or reference current that another power circuit access reference circuit produces, also access the another one in described two digital controlled signals, and another power supply corresponding with accessed digital controlled signal; Described two power circuits open or cut out under the control of accessed digital controlled signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310071751.8A CN104035463A (en) | 2013-03-06 | 2013-03-06 | Power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310071751.8A CN104035463A (en) | 2013-03-06 | 2013-03-06 | Power supply circuit |
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| Publication Number | Publication Date |
|---|---|
| CN104035463A true CN104035463A (en) | 2014-09-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310071751.8A Pending CN104035463A (en) | 2013-03-06 | 2013-03-06 | Power supply circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108693904A (en) * | 2017-04-05 | 2018-10-23 | 立积电子股份有限公司 | Power supply control circuit and method thereof |
| CN117691860A (en) * | 2024-02-02 | 2024-03-12 | 深圳安森德半导体有限公司 | DCDC internal power supply device and DCDC power converter |
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| CN1310504A (en) * | 2000-02-22 | 2001-08-29 | 富士通株式会社 | DC-DC transfer circuit, power selection circuit and equipment |
| US20070285152A1 (en) * | 2006-06-12 | 2007-12-13 | Kabushiki Kaisha Toshiba | Power supply voltage controlling circuit and semiconductor integrated circuit |
| CN101246376A (en) * | 2007-02-13 | 2008-08-20 | 夏普株式会社 | Series regulator |
| CN101557122A (en) * | 2009-02-24 | 2009-10-14 | 深圳市民展科技开发有限公司 | Duplicate supply selection circuit |
| JP2013025696A (en) * | 2011-07-25 | 2013-02-04 | Asahi Kasei Electronics Co Ltd | Multi-input power supply circuit |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1310504A (en) * | 2000-02-22 | 2001-08-29 | 富士通株式会社 | DC-DC transfer circuit, power selection circuit and equipment |
| US20070285152A1 (en) * | 2006-06-12 | 2007-12-13 | Kabushiki Kaisha Toshiba | Power supply voltage controlling circuit and semiconductor integrated circuit |
| CN101246376A (en) * | 2007-02-13 | 2008-08-20 | 夏普株式会社 | Series regulator |
| CN101557122A (en) * | 2009-02-24 | 2009-10-14 | 深圳市民展科技开发有限公司 | Duplicate supply selection circuit |
| JP2013025696A (en) * | 2011-07-25 | 2013-02-04 | Asahi Kasei Electronics Co Ltd | Multi-input power supply circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108693904A (en) * | 2017-04-05 | 2018-10-23 | 立积电子股份有限公司 | Power supply control circuit and method thereof |
| CN108693904B (en) * | 2017-04-05 | 2020-06-02 | 立积电子股份有限公司 | Power supply control circuit and method thereof |
| CN117691860A (en) * | 2024-02-02 | 2024-03-12 | 深圳安森德半导体有限公司 | DCDC internal power supply device and DCDC power converter |
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