CN104009031A - Semiconductor device and display apparatus - Google Patents
Semiconductor device and display apparatus Download PDFInfo
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- CN104009031A CN104009031A CN201310061605.7A CN201310061605A CN104009031A CN 104009031 A CN104009031 A CN 104009031A CN 201310061605 A CN201310061605 A CN 201310061605A CN 104009031 A CN104009031 A CN 104009031A
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Abstract
The invention provides a semiconductor device and a display apparatus. The semiconductor device comprises a P-type substrate, a digital circuit module and a simulation circuit module. The digital circuit module receives and processes digital signals and comprises a deeply-doped N trap, a first P-type semiconductor element, a first N-type semiconductor element and a P trap, wherein the deeply-doped N trap is arranged on the P-type substrate, the first P-type semiconductor element and the P trap are respectively arranged on the deeply-doped N trap, and the first N-type semiconductor element is arranged on the P trap. The simulation circuit module receives the digital signals output by a digital circuit, outputs simulation signals and comprises a second P-type semiconductor element, a second N-type semiconductor element and an N trap, wherein the second N-type semiconductor element and the N trap are respectively arranged on the P-type substrate, and the second P-type semiconductor element is arranged on the N trap. The semiconductor device and the display apparatus have quite high reliability.
Description
Technical field
The present invention relates to a kind of semiconductor device and display unit.
Background technology
At present, semiconductor device, as semiconductor chip is widely used at electronic technology field.Conventionally semiconductor device comprises substrate, is arranged at digital circuit blocks and analog module on substrate, and digital circuit blocks is generally different from the withstand voltage that the semiconductor element of analog module needs conventionally, as: the semiconductor element of digital circuit blocks only needs the withstand voltage of general 3.3 volts above (or more than 5 volts), the semiconductor element of analog module is according to the difference of practical application and difference sometimes may need more than 10 volts withstand voltages.Especially, sometimes some analog module need to be exported positive voltage and negative voltage because of demand, now, the substrate of analog module need to connect negative voltage conventionally, but because digital circuit blocks and analog module all arrange on same substrate, when substrate connects negative voltage, may cause the semiconductor element of digital circuit blocks need to bear negative voltage to 3.3 volt (or 5 volts) cross-pressure and cause the damage of the semiconductor element of digital circuit blocks so on a large scale, reduce the reliability of semiconductor device.
Summary of the invention
In view of this, provide the semiconductor device that a kind of reliability is higher real in necessary.
In view of this, provide a kind of display unit with the semiconductor device that reliability is higher in fact for necessary.
A semiconductor device, it comprises: P type substrate, digital circuit blocks and analog module.This digital circuit blocks receives and processing digital signal, it comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this P type substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, and this first N type semiconductor element is arranged on this P trap.This analog module receives digital signal the outputting analog signal of this digital circuit output, it comprises the second P type semiconductor element, the second N type semiconductor element and N trap, this the second N type semiconductor element and N trap are arranged at respectively on this P type substrate, and this second P type semiconductor element is arranged on this N trap.
A semiconductor device, it comprises substrate, digital circuit blocks and analog module.This digital circuit blocks receives and processing digital signal, this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives digital signal the outputting analog signal of this digital circuit output, this analog module comprises the second P type semiconductor element and the second N type semiconductor element, this the second N type semiconductor element and the second P type semiconductor element are arranged at respectively on this substrate.
A display unit, it comprises: sequential control circuit, display floater and be connected in this sequential control circuit and this display floater between data drive circuit.This data drive circuit comprises P type substrate, digital circuit blocks and analog module.This digital circuit blocks receives and processes the digital signal of sequential control circuit output, it comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this P type substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, and this first N type semiconductor element is arranged on this P trap.This analog module receives the digital signal of this digital circuit blocks output and exports gray scale voltage signal to this display floater, it comprises the second P type semiconductor element, the second N type semiconductor element and N trap, this the second N type semiconductor element and N trap are arranged at respectively on this P type substrate, and this second P type semiconductor element is arranged on this N trap.
A display unit, it comprise sequential control circuit, display floater and be connected in this sequential control circuit and this display floater between data drive circuit, this data drive circuit comprises substrate, digital circuit blocks and analog module.This digital circuit blocks receives and processes the digital signal of sequential control circuit output, this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives the digital signal of this digital circuit blocks output and exports gray scale voltage signal to this display floater, this analog module comprises the second P type semiconductor element, the second N type semiconductor element, this the second N type semiconductor element and the second P type semiconductor element are arranged at respectively this substrate.
Compared to prior art, because the first N type semiconductor element of digital circuit blocks is arranged on dark doping N trap by P trap, and then no matter which kind of reference voltage this P type substrate connects, all be difficult to this first N type semiconductor element to exert an influence, thereby avoid this first N type semiconductor element produce electric leakage or damage, the reliability of this semiconductor device is higher.
Accompanying drawing explanation
Fig. 1 is the structural representation of display unit of the present invention.
Fig. 2 is the cutaway view of semiconductor device of the present invention.
Main element symbol description
| Display unit | 10 |
| Semiconductor device | 11 |
| Sequential control circuit | 12 |
| Display floater | 13 |
| P type substrate | 110 |
| Digital circuit blocks | 111 |
| Analog module | 116 |
| Dark doping N trap | 112 |
| The first P type semiconductor element | 113 |
| The first N type semiconductor element | 114 |
| P trap | 115 |
| The second P type semiconductor element | 117 |
| The second N type semiconductor element | 118 |
| N trap | 119 |
| Isolated area | 140、150 |
Following embodiment further illustrates the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Semiconductor device, as the data drive circuit of liquid crystal indicator, comprise P type substrate and be arranged at digital circuit blocks and the analog module on P type substrate, for digital picture signal being converted to the gray scale voltage signal of simulation, export display floater to, for avoiding liquid crystal to produce inertia, the gray scale voltage signal of analog module output needs constantly between positive-negative polarity, to switch conventionally.Usually, the analog voltage signal of the positive-negative polarity of above-mentioned semiconductor device output is divided into three kinds according to the difference of framework, be respectively total head framework, half pressure rack structure and positive/negative-pressure framework.The maximum voltage difference that defines this positive signal and negative polarity signal is A volt, and under total head framework, the scope of the voltage signal of the positive-negative polarity of this semiconductor device output is 0 to A to lie prostrate; Under half pressure rack structure, the scope of the voltage signal of the negative polarity of this semiconductor device output is 0 to A/2 volt, and the scope of the voltage signal of positive polarity is A/2 to A; Under positive/negative-pressure framework, the scope of the voltage signal of the negative polarity of this semiconductor device output is-A/2 to 0, and the scope of the voltage signal of positive polarity is 0 to A/2.
Normally, P type substrate connects potential minimum as reference voltage, and under total head and half framework of pressing, P type substrate all connects 0 volt; But under positive/negative-pressure framework, connect-A/2 of P type substrate volt, now, because digital circuit blocks and analog module are arranged on same substrate, thereby need to the bear-A/2 of N type semiconductor element that causes digital circuit blocks lie prostrate to the cross-pressure of 3.3V, cause digital circuit blocks can only resistance to low pressure N type semiconductor component wear, if can high voltage bearing N type semiconductor element and the semiconductor element of digital circuit blocks is all changed into, can increase unavoidably volume and the area of digital circuit blocks, be unfavorable for the integrated and compact of semiconductor device.One of them object of semiconductor device provided by the invention is: in the situation that do not change the N type semiconductor element of the resistance to low pressure of digital circuit blocks into high voltage bearing N type semiconductor element, improvement, because P type substrate connects electric leakage or the damage of the N type semiconductor element of the low pressure that different potentials causes, improves the reliability of this semiconductor device.
In addition, because different substrate electric potentials requires different to the cross-pressure of the semiconductor element of the digital circuit blocks of semiconductor device, therefore semiconductor device comprises two types, one type is that substrate connects 0 volt and can export the positive-negative polarity voltage of total head and half pressure rack structure, but can not exports the positive-negative polarity voltage of positive/negative-pressure framework; Another kind is that substrate connects the positive-negative polarity voltage that A/2 lied prostrate and can export positive/negative-pressure framework, but can not export the positive-negative polarity voltage of total head framework.Except improving semiconductor element, produce the object of the phenomenons such as electric leakage or damage, another object of the present invention is to provide a kind of semiconductor device, its substrate can connect 0 volt or-A/2 lies prostrate two kinds of current potentials, and can export that total head, half is pressed and the positive-negative polarity voltage of three kinds of frameworks of positive/negative-pressure.Below in conjunction with accompanying drawing, the present invention is specifically introduced.
Refer to Fig. 1 and Fig. 2, Fig. 1 is the structural representation of display unit 10 of the present invention.Fig. 2 is the generalized section of semiconductor device 11 of the present invention.This display unit 10 comprises sequential control circuit 12, display floater 13 and is connected in the semiconductor device 11 between this sequential control circuit 12 and this display floater 13.This display floater 13 is display panels.This semiconductor device 11 is data drive circuit, and it is for receiving and process the digital picture signal of these sequential control circuit 12 outputs the gray scale voltage signal of output simulation to this display floater 13.
This semiconductor device 11 comprises P type substrate 110, digital circuit blocks 111 and analog module 116.This digital circuit blocks 111 receives and processes the digital picture signal of sequential control circuit 12 outputs, it comprises dark doping N trap (Deep N Well) the 112, first P type semiconductor element 113, the first N type semiconductor element 114 and P trap 115, this dark doping N trap 112 is arranged on this P type substrate 110, this the first P type semiconductor element 113 and P trap 115 are arranged at respectively on this dark doping N trap 112, and this first N type semiconductor element 114 is arranged on this P trap (P Well) 115.This analog module 116 receives the digital signal of these digital circuit blocks 111 outputs and exports gray scale voltage signal to this display floater 13, it comprises the second P type semiconductor element 117, the second N type semiconductor element 118 and N trap 119, this the second N type semiconductor element 118 and N trap 119 are arranged at respectively on this P type substrate 110, and this second P type semiconductor element 117 is arranged on this N trap 119.
The gray scale voltage signal of the simulation of these analog module 116 outputs comprises positive polarity voltage signal and reverse voltage signal, the maximum voltage difference that defines this positive polarity voltage signal and reverse voltage signal is A, wherein in one embodiment, A be 13.5 volts (as for during the data drive circuit of notes type calculator and display), in other change embodiment, A can be 6 volts (for data drive circuits of panel computer time), 16.5 volts or 18 volts (for the data drive circuit of TV time).
Wherein, this analog module 116 can adapt to total head, half presses and three kinds of frameworks of positive/negative-pressure, exports the positive-negative polarity voltage of total head, half pressure and three kinds of frameworks of positive/negative-pressure.Particularly, under total head framework, the voltage range of this positive signal is 0 to A, and the voltage range of this negative polarity signal is 0 to A.Under half pressure rack structure, the voltage range of this positive signal is A/2 to A, and the voltage range of this negative polarity signal is 0 to A/2.Under positive/negative-pressure framework, the voltage range of this positive signal is 0 to A/2, and the voltage range of this negative polarity signal is-A/2 to 0.
Further, this the first P type semiconductor element 113 is the low pressure P type semiconductor element of low pressure that can resistance to digital circuit, the low and high level difference that defines the digital signal of this digital circuit blocks output is that (B is generally less than 4 volts to B, comprise 1.2 volts, the frameworks such as 1.8 volts and 3.3 volts), the maximum withstand voltage of this first P type semiconductor element 113 is less than or equal to the scope of 4 volts being more than or equal to B, this the first P type semiconductor element can be for maximum withstand voltage be at B to 4 volt ([B ~ 4V, comprise B volt and 4 volts] semiconductor element, as can be for maximum withstand voltage be at B to 4 volt ([B ~ 4V, comprise B volt and 4 volts] semiconductor PMOS.This first N type semiconductor element 114 is the low pressure N type semiconductor element of low pressure that can resistance to digital circuit, as withstand voltage NMOS of ([B ~ 4V] comprises B volt and 4 volts) between B volt is to 4 volts.
The high-voltage P-type semiconductor element that this second P type semiconductor element 117 is positive and negative maximum differential pressure (as withstand voltage is more than or equal to A) that can resistance to analog circuit, specifically can be the PMOS that maximum withstand voltage is more than or equal to A; The high-pressure N-shaped semiconductor element that this second N type semiconductor element 118 is positive and negative maximum differential pressure (as maximum withstand voltage is more than or equal to A) that can resistance to analog circuit, specifically can be maximum withstand voltage be more than or equal to A NMOS.In addition, in view of A is less than 20 volts conventionally, therefore the maximum withstand voltage of this second P type semiconductor element 117 and this second N type semiconductor element 118 can be in A to the 20 volt scope of ([A ~ 20V] comprises that A lies prostrate and 20 volts).
In addition, for avoiding digital circuit blocks 111 and analog module 116 phase mutual interference and impacts, from plane, this digital circuit blocks 111 is set up in parallel on this P type substrate 110 with analog module 116, and between this digital circuit blocks 111 and analog module 116, has isolated area (as: Isolation Rule) 140.
Further, from plane, between the first P type semiconductor element 113 of digital circuit blocks 111 and the first N type semiconductor element 114, also isolated area 150 can be set; Between the second P type semiconductor element 117 of analog module 116 and the second N type semiconductor element 118, also isolated area 150 can be set.
Compared to prior art, because the first N type semiconductor element 114 of this digital circuit blocks 111 is arranged on dark doping N trap 112 by this P trap 115, and then no matter this P type substrate 110 connects the reference voltage of which kind of framework, all be difficult to this first N type semiconductor element 114 to exert an influence, thereby avoid this first (low pressure of resistance to low pressure) N type semiconductor element 114 produce electric leakage or damage, this semiconductor device 11 and use the reliability of display unit 10 of this semiconductor device 11 higher.
Further, the semiconductor device 11 of this case can connect 0 volt or-A/2 lies prostrate two kinds of current potentials, and export any one framework positive-negative polarity voltage and do not damage the semiconductor element of numeral and analog module,, the semiconductor device 11 of this case can be suitable for total head, half and press and three kinds of frameworks of positive/negative-pressure, person's easy to use use.
Claims (14)
1. a semiconductor device, it comprises: P type substrate, digital circuit blocks and analog module, it is characterized in that: this digital circuit blocks receives and processing digital signal, this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this P type substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives digital signal the outputting analog signal of this digital circuit output, this analog module comprises the second P type semiconductor element, the second N type semiconductor element and N trap, this the second N type semiconductor element and N trap are arranged at respectively on this P type substrate, this the second P type semiconductor element is arranged on this N trap.
2. semiconductor device according to claim 1, wherein, the analog signal of this analog module output comprises positive polarity voltage signal and reverse voltage signal, the maximum voltage difference that defines this positive polarity voltage signal and reverse voltage signal is A, and wherein the maximum withstand voltage of the second P type semiconductor element and this second N type semiconductor element is more than or equal to A.
3. semiconductor device according to claim 2, wherein, the maximum voltage difference A of this positive polarity voltage signal and reverse voltage signal equals 13.5 volts, 6 volts, 16.5 volts or 18 volts.
4. semiconductor device according to claim 2, is characterized in that: the voltage range of this positive polarity voltage signal is 0 to A, and the voltage range of this reverse voltage signal is 0 to A.
5. semiconductor device according to claim 2, is characterized in that: the voltage range of this positive polarity voltage signal is A/2 to A, and the voltage range of this reverse voltage signal is 0 to A/2.
6. semiconductor device according to claim 2, is characterized in that: the voltage range of this positive polarity voltage signal is 0 to A/2, and the voltage range of this reverse voltage signal is-A/2 to 0.
7. semiconductor device according to claim 1, it is characterized in that: the height adjusted value of the digital signal of this digital circuit blocks output is B, wherein the maximum withstand voltage of the first P type semiconductor element and this first N type semiconductor element is less than or equal to the scope of 4 volts being more than or equal to B.
8. semiconductor device according to claim 7, is characterized in that: B equals 1.2 volts, 1.8 volts or 3.3 volts.
9. semiconductor device according to claim 1, it is characterized in that: the data drive circuit that this semiconductor device is display unit, it is connected between sequential control circuit and display floater, receives the digital picture signal of this sequential control circuit output the gray scale voltage signal of output simulation to this display floater.
10. semiconductor device according to claim 1, is characterized in that: this digital circuit blocks and analog module are set up in parallel on this P type substrate, and have isolated area between this digital circuit blocks and analog module.
11. semiconductor device according to claim 1, is characterized in that: between the first P type semiconductor element of digital circuit blocks and the first N type semiconductor element, have isolated area; Between the second P type semiconductor element of analog module and the second N type semiconductor element, there is isolated area.
12. 1 kinds of semiconductor device, it comprises substrate, digital circuit blocks and analog module, it is characterized in that: this digital circuit blocks receives and processing digital signal, this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives digital signal the outputting analog signal of this digital circuit output, this analog module comprises the second P type semiconductor element and the second N type semiconductor element, this the second N type semiconductor element and the second P type semiconductor element are arranged at respectively on this substrate.
13. 1 kinds of display unit, it comprises: sequential control circuit, display floater and be connected in this sequential control circuit and this display floater between data drive circuit, this data drive circuit comprises P type substrate, digital circuit blocks and analog module, it is characterized in that: this digital circuit blocks receives and process the digital signal of sequential control circuit output, this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this P type substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives the digital signal of this digital circuit blocks output and exports gray scale voltage signal to this display floater, this analog module comprises the second P type semiconductor element, the second N type semiconductor element and N trap, this the second N type semiconductor element and N trap are arranged at respectively on this P type substrate, this the second P type semiconductor element is arranged on this N trap.
14. 1 kinds of display unit, it comprises sequential control circuit, display floater and be connected in this sequential control circuit and this display floater between data drive circuit, this data drive circuit comprises substrate, digital circuit blocks and analog module, this digital circuit blocks receives and processes the digital signal of sequential control circuit output, it is characterized in that: this digital circuit blocks comprises dark doping N trap, the first P type semiconductor element, the first N type semiconductor element and P trap, this dark doping N trap is arranged on this substrate, this the first P type semiconductor element and P trap are arranged at respectively on this dark doping N trap, this the first N type semiconductor element is arranged on this P trap, this analog module receives the digital signal of this digital circuit blocks output and exports gray scale voltage signal to this display floater, this analog module comprises the second P type semiconductor element, the second N type semiconductor element, this the second N type semiconductor element and the second P type semiconductor element are arranged at respectively this substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310061605.7A CN104009031A (en) | 2013-02-27 | 2013-02-27 | Semiconductor device and display apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310061605.7A CN104009031A (en) | 2013-02-27 | 2013-02-27 | Semiconductor device and display apparatus |
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| CN104009031A true CN104009031A (en) | 2014-08-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201310061605.7A Pending CN104009031A (en) | 2013-02-27 | 2013-02-27 | Semiconductor device and display apparatus |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070045659A1 (en) * | 2005-08-31 | 2007-03-01 | Seiko Epson Corporation | Integrated circuit device and electronic instrument |
| CN1953321A (en) * | 2005-10-21 | 2007-04-25 | 冲电气工业株式会社 | Operational amplifier |
| US20070211508A1 (en) * | 2001-04-10 | 2007-09-13 | Renesas Technology Corp. | Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment |
| CN203232679U (en) * | 2013-02-27 | 2013-10-09 | 天钰科技股份有限公司 | Semiconductor element and display device |
-
2013
- 2013-02-27 CN CN201310061605.7A patent/CN104009031A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070211508A1 (en) * | 2001-04-10 | 2007-09-13 | Renesas Technology Corp. | Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment |
| US20070045659A1 (en) * | 2005-08-31 | 2007-03-01 | Seiko Epson Corporation | Integrated circuit device and electronic instrument |
| CN1953321A (en) * | 2005-10-21 | 2007-04-25 | 冲电气工业株式会社 | Operational amplifier |
| CN203232679U (en) * | 2013-02-27 | 2013-10-09 | 天钰科技股份有限公司 | Semiconductor element and display device |
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Application publication date: 20140827 |
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