CN103999051B - 用于着色器核心中着色器资源分配的策略 - Google Patents

用于着色器核心中着色器资源分配的策略 Download PDF

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Publication number
CN103999051B
CN103999051B CN201280061763.6A CN201280061763A CN103999051B CN 103999051 B CN103999051 B CN 103999051B CN 201280061763 A CN201280061763 A CN 201280061763A CN 103999051 B CN103999051 B CN 103999051B
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queue
pipeline
pipe
pipe queue
calculating
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Chinese (zh)
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CN103999051A (zh
Inventor
罗伯特·斯科特·哈托格
马克·莱瑟
迈克尔·曼特
雷克斯·麦克拉里
塞巴斯蒂安·努斯鲍姆
菲利普·J·罗杰斯
拉尔夫·克莱·泰勒
托马斯·沃勒
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
CN201280061763.6A 2011-12-14 2012-12-14 用于着色器核心中着色器资源分配的策略 Active CN103999051B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/325,286 2011-12-14
US13/325,286 US20130155077A1 (en) 2011-12-14 2011-12-14 Policies for Shader Resource Allocation in a Shader Core
PCT/US2012/069836 WO2013090773A2 (en) 2011-12-14 2012-12-14 Policies for shader resource allocation in a shader core

Publications (2)

Publication Number Publication Date
CN103999051A CN103999051A (zh) 2014-08-20
CN103999051B true CN103999051B (zh) 2018-07-31

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US (2) US20130155077A1 (https=)
EP (1) EP2791795B1 (https=)
JP (1) JP6189858B2 (https=)
KR (1) KR101922681B1 (https=)
CN (1) CN103999051B (https=)
WO (1) WO2013090773A2 (https=)

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US10026145B2 (en) * 2016-12-13 2018-07-17 Qualcomm Incorporated Resource sharing on shader processor of GPU
US10147159B2 (en) 2017-04-07 2018-12-04 Microsoft Technology Licensing, Llc Ink render using high priority queues
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US20180307533A1 (en) * 2017-04-21 2018-10-25 Intel Corporation Faciltating multi-level microcontroller scheduling for efficient computing microarchitecture
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US10558418B2 (en) * 2017-07-27 2020-02-11 Advanced Micro Devices, Inc. Monitor support on accelerated processing device
CN109697115B (zh) * 2017-10-20 2023-06-06 伊姆西Ip控股有限责任公司 用于调度应用的方法、装置以及计算机可读介质
US10796472B2 (en) * 2018-06-30 2020-10-06 Intel Corporation Method and apparatus for simultaneously executing multiple contexts on a graphics engine
US11593311B2 (en) * 2019-09-24 2023-02-28 Ati Technologies Ulc Compression system with longest match processing for generating compressed data
US11210757B2 (en) * 2019-12-13 2021-12-28 Advanced Micro Devices, Inc. GPU packet aggregation system
US11403729B2 (en) * 2020-02-28 2022-08-02 Advanced Micro Devices, Inc. Dynamic transparent reconfiguration of a multi-tenant graphics processing unit
US12033275B2 (en) * 2021-09-29 2024-07-09 Advanced Micro Devices, Inc. System and methods for efficient execution of a collaborative task in a shader system
US11941723B2 (en) 2021-12-29 2024-03-26 Advanced Micro Devices, Inc. Dynamic dispatch for workgroup distribution
US11941742B2 (en) 2022-06-23 2024-03-26 Apple Inc. Tiled processor communication fabric
US20240419482A1 (en) * 2023-06-16 2024-12-19 Advanced Micro Devices, Inc. GPU Circuit Self-Context Save During Context Unmap
US20250110776A1 (en) * 2023-09-29 2025-04-03 Advanced Micro Devices, Inc. Hardware queue priority mechanism
US20250217195A1 (en) * 2023-12-30 2025-07-03 Advanced Micro Devices, Inc. Local launch in workgroup processors
CN121771825A (zh) * 2024-09-30 2026-03-31 华为技术有限公司 通信方法及相关装置
CN119127314B (zh) * 2024-11-08 2025-03-04 湖南进芯电子科技有限公司 一种数字信号处理器的指令执行方法及数字信号处理器

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Also Published As

Publication number Publication date
US20180321946A1 (en) 2018-11-08
CN103999051A (zh) 2014-08-20
WO2013090773A2 (en) 2013-06-20
JP2015502618A (ja) 2015-01-22
KR20140101384A (ko) 2014-08-19
EP2791795A2 (en) 2014-10-22
EP2791795B1 (en) 2018-09-05
JP6189858B2 (ja) 2017-08-30
WO2013090773A3 (en) 2013-08-08
US10579388B2 (en) 2020-03-03
US20130155077A1 (en) 2013-06-20
KR101922681B1 (ko) 2018-11-27

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