CN103995941A - Isolating setting method of pore impedance matching in high-speed circuit design - Google Patents
Isolating setting method of pore impedance matching in high-speed circuit design Download PDFInfo
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- CN103995941A CN103995941A CN201410249179.4A CN201410249179A CN103995941A CN 103995941 A CN103995941 A CN 103995941A CN 201410249179 A CN201410249179 A CN 201410249179A CN 103995941 A CN103995941 A CN 103995941A
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- hole
- isolation
- parameter
- impedance matching
- network
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000011148 porous material Substances 0.000 title abstract 5
- 238000002955 isolation Methods 0.000 claims abstract description 48
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 230000000977 initiatory effect Effects 0.000 claims description 3
- 238000013507 mapping Methods 0.000 abstract description 4
- 238000004088 simulation Methods 0.000 abstract description 4
- 238000000605 extraction Methods 0.000 abstract description 3
- 238000012938 design process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
Abstract
The invention discloses an isolating setting method of pore impedance matching in a high-speed circuit design. According to the method, pores needing to be subjected to isolating setting are screened out through modes of network selection, group selection and point selection. The method includes the following two selective modes that (1) partial layers are selected and subjected to isolating setting according to mapped cascades; (2) all the settable cascades of target pores are defined and are subjected to isolating setting. Meanwhile, effective parameter setting of oval isolation is provided, and precise and effective data are guaranteed. By means of the method, selection, parameter setting and differentiating in the operation process are efficient and precise, and extraction of parameters and mapping of the cascades both simulate the modeling steps in the simulation process, so that data are more precise, in particular, in the high-speed backboard designing process, the advantages of convenience and high efficiency of the method are manifested when thousands of pores are subjected to isolating setting by means of the method.
Description
Technical field
The present invention relates to High-speed Board Design field, relate in particular to the isolation method to set up of a kind of High-speed Board Design mesopore impedance matching.
Background technology
At present, in industry, 100M and above digital circuit are very general, can not ignore in the resistance matching problem of this speed and above High-speed Board Design mesopore.Conventionally this type of design process is: use emulation mode to determine isolation size; Spacing according to simulation result adjusting hole to copper.Thereby reach the object of adjusting impedance matching.But, in circuit design software, adjust isolation ratio more difficult, consuming time very large in the aspects such as size, dish storehouse, data volume, and also accuracy is difficult to ensure card.
Summary of the invention
The object of the invention is to, by the isolation method to set up of a kind of High-speed Board Design mesopore impedance matching, solve the problem that above background technology part is mentioned.
For reaching this object, the present invention by the following technical solutions:
An isolation method to set up for High-speed Board Design mesopore impedance matching, it comprises the steps:
A, initialization layer stack structure, keep each layer of storehouse hole polarity and the degree of depth independent;
B, initiation parameter input, solidify different parameters of isolating sizes;
C, obtain target through hole by the mode of network selection, point selection, group selection;
D, judge and the network type in selected hole if differential networks has difference hole pair, be isolated into ellipse, perform step E, if single line network, i.e. single through hole only, is isolated into circle, perform step I, if invalid network is not carried out any operation, return to step D;
E, determine through hole pair by the mutual reference of differential lines and hole degree of coupling, and preserve;
F, judge every group of relative position that through hole is right, if two hole relative positions are horizontal and vertical, perform step G, if other angle performs step H;
G, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, by the two public parallel tangents of circle point of contacts parallel with two groups, rectangle isolation is set, execution step J;
H, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, according to position, hole, angled rectangle isolation, execution step J are set;
I, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation;
The copper that covers of J, generation respective layer or all layer current networks is isolated;
Copper figure is covered in K, renewal.
Especially, if operated network is without through hole parts or without parts in described step D, be defined as invalid network.
Especially, in described step F, other angle comprises that two hole relative positions are the deviation angle that 45 degree directions and personal error cause.
Especially, in described step G and H, the isolation setting up procedure of slotted eye specifically comprises: first, determine the circle isolation size in hole; Secondly, establish right relative position and the direction in hole of two close together; Finally, the rectangle isolation profile that calculating need to be added between hole pair.
The isolation method to set up of High-speed Board Design mesopore provided by the invention impedance matching is screened the hole that needs isolation to arrange by the mode of network selection, group selection, point selection, and provide two kinds of selections: (1) is stacked according to mapping, and optionally setting unit layering arranges isolation; (2) objective definition hole all arrange stackedly, and isolation is all set.The parameter setting of effective ellipse isolation is provided simultaneously, ensures the accurate and effective of data.Efficient on the selection of the present invention in operating process, parameter setting, discriminant approach, accurately, the modeling procedure of the extraction of parameter and the equal analog simulation process of stacked mapping, this mode makes data more accurate, especially in the design process of High speed rear panel, thousands of hole isolation arranges and more embodies convenient, the efficient feature of this method.
Brief description of the drawings
The isolation method to set up process flow diagram of the High-speed Board Design mesopore impedance matching that Fig. 1 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the invention will be further described.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, in accompanying drawing, only show part related to the present invention but not full content.
Please refer to shown in Fig. 1 the isolation method to set up process flow diagram of the High-speed Board Design mesopore impedance matching that Fig. 1 provides for the embodiment of the present invention.
The isolation method to set up of the present embodiment high speed circuit design mesopore impedance matching comprises the steps:
Step S101, beginning, initialization layer stack structure, keeps each layer of storehouse hole polarity and the degree of depth independent, and this situation can comprise the hole stack informations such as blind hole, back drill, positive negative film.
Step S102, initiation parameter input, solidify different parameters of isolating sizes.The different isolation of storage configuration information, can call principal function when in use efficiently.
Step S103, obtain target through hole by the mode of network selection, point selection, group selection.The data of selecting are used array to deposit, and can store multiple choices result.
Step S104, judge the network type in selected hole, if differential networks, has difference hole pair, be isolated into ellipse, perform step S105, if single line network, i.e. single through hole only, is isolated into circle, perform step S109, if invalid network, does not carry out any operation, return to step S104.If operated network is without through hole parts or without parts in the present embodiment, be defined as invalid network.Provide obstructed parameter assignment mode according to obstructed network type.
Step S105, determine through hole pair by the mutual reference of differential lines and hole degree of coupling, and preserve.
By judging the through hole location information of the dipolar path of difference and coupling, the through hole of network, to grouping, is defined as oval isolation at isolation setting up procedure for this reason.
Step S106, judge every group of relative position that through hole is right, if two hole relative positions are horizontal and vertical, perform step S107, if other angle performs step S108.In the present embodiment, other angle comprises that two hole relative positions are the deviation angle that 45 degree directions and personal error cause.
Step S107, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, by the two public parallel tangents of circle point of contacts parallel with two groups, rectangle isolation is set, execution step S1010.
Step S108, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, according to position, hole, angled rectangle isolation, execution step S1010 are set.
The isolation setting up procedure of slotted eye specifically comprises in the present embodiment: first, determine the circle isolation size in hole; Secondly, establish right relative position and the direction in hole of two close together; Finally, the rectangle isolation profile that calculating need to be added between hole pair.
Step S109, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation.
The copper that covers of step S1010, generation respective layer or all layer current networks is isolated.
Copper figure is covered in step S1011, renewal, finishes.
On the selection of technical scheme of the present invention in operating process, parameter setting, discriminant approach efficiently, thought accurately, the modeling procedure of the extraction of parameter and the equal analog simulation process of stacked mapping, this mode makes data more accurate, especially in the design process of High speed rear panel, thousands of hole isolation arranges and more embodies convenient, the efficient feature of this method.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, to those skilled in the art, the present invention can have various changes and variation.All any amendments of doing, be equal to replacement, improvement etc., within protection scope of the present invention all should be included within spirit of the present invention and principle.
Claims (4)
1. an isolation method to set up for High-speed Board Design mesopore impedance matching, is characterized in that, comprises the steps:
A, initialization layer stack structure, keep each layer of storehouse hole polarity and the degree of depth independent;
B, initiation parameter input, solidify different parameters of isolating sizes;
C, obtain target through hole by the mode of network selection, point selection, group selection;
D, judge and the network type in selected hole if differential networks has difference hole pair, be isolated into ellipse, perform step E, if single line network, i.e. single through hole only, is isolated into circle, perform step I, if invalid network is not carried out any operation, return to step D;
E, determine through hole pair by the mutual reference of differential lines and hole degree of coupling, and preserve;
F, judge every group of relative position that through hole is right, if two hole relative positions are horizontal and vertical, perform step G, if other angle performs step H;
G, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, by the two public parallel tangents of circle point of contacts parallel with two groups, rectangle isolation is set, execution step J;
H, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation, according to position, hole, angled rectangle isolation, execution step J are set;
I, utilize through hole to cure parameter and hole storehouse parameter, for hole arranges circular isolation;
The copper that covers of J, generation respective layer or all layer current networks is isolated;
Copper figure is covered in K, renewal.
2. the isolation method to set up of High-speed Board Design mesopore according to claim 1 impedance matching, is characterized in that, if operated network is without through hole parts or without parts in described step D, is defined as invalid network.
3. the isolation method to set up of High-speed Board Design mesopore according to claim 2 impedance matching, is characterized in that, in described step F, other angle comprises that two hole relative positions are the deviation angle that 45 degree directions and personal error cause.
4. the isolation method to set up of High-speed Board Design mesopore according to claim 3 impedance matching, is characterized in that, in described step G and H, the isolation setting up procedure of slotted eye specifically comprises: first, determine the circle isolation size in hole; Secondly, establish right relative position and the direction in hole of two close together; Finally, the rectangle isolation profile that calculating need to be added between hole pair.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410249179.4A CN103995941B (en) | 2014-06-06 | 2014-06-06 | A kind of isolation method to set up of High-speed Board Design mesopore impedance matching |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410249179.4A CN103995941B (en) | 2014-06-06 | 2014-06-06 | A kind of isolation method to set up of High-speed Board Design mesopore impedance matching |
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| Publication Number | Publication Date |
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| CN103995941A true CN103995941A (en) | 2014-08-20 |
| CN103995941B CN103995941B (en) | 2017-08-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520994A (en) * | 2018-02-12 | 2018-09-11 | 中天宽带技术有限公司 | A kind of miniaturization Wide-band dielectric phase shifter impedance matching circuit Fast design method |
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| US6427085B1 (en) * | 1999-05-11 | 2002-07-30 | Cardiac Pacemakers, Inc. | Cardiac sense amplifier for capture verification |
| CN101662882A (en) * | 2005-01-25 | 2010-03-03 | 财团法人工业技术研究院 | Transmission hole of matched high frequency broadband impedance |
| CN103717012A (en) * | 2012-09-28 | 2014-04-09 | 杭州华三通信技术有限公司 | PCB board via impedance control method and structure |
| CN103796424A (en) * | 2014-01-06 | 2014-05-14 | 联想(北京)有限公司 | Multi-layer circuit board and method for controlling impedance thereof |
-
2014
- 2014-06-06 CN CN201410249179.4A patent/CN103995941B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6427085B1 (en) * | 1999-05-11 | 2002-07-30 | Cardiac Pacemakers, Inc. | Cardiac sense amplifier for capture verification |
| CN101662882A (en) * | 2005-01-25 | 2010-03-03 | 财团法人工业技术研究院 | Transmission hole of matched high frequency broadband impedance |
| CN103717012A (en) * | 2012-09-28 | 2014-04-09 | 杭州华三通信技术有限公司 | PCB board via impedance control method and structure |
| CN103796424A (en) * | 2014-01-06 | 2014-05-14 | 联想(北京)有限公司 | Multi-layer circuit board and method for controlling impedance thereof |
Non-Patent Citations (1)
| Title |
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| 羿昌宇等: "大规模高速背板的信号完整性设计与仿真", 《航空电子技术》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520994A (en) * | 2018-02-12 | 2018-09-11 | 中天宽带技术有限公司 | A kind of miniaturization Wide-band dielectric phase shifter impedance matching circuit Fast design method |
| CN108520994B (en) * | 2018-02-12 | 2019-12-13 | 中天宽带技术有限公司 | method for quickly designing impedance matching circuit of miniaturized broadband dielectric phase shifter |
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| Publication number | Publication date |
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| CN103995941B (en) | 2017-08-25 |
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Address after: No. 11-3 Hongyi Road, Xinwu District, Wuxi City, Jiangsu Province, 214028 Patentee after: Wuxi Synchronous Electronic Technology Co.,Ltd. Country or region after: China Address before: Room C508, No. 18 Qingyuan Road, Wuxi National High tech Industrial Development Zone, Wuxi City, Jiangsu Province, 214135 Patentee before: P.C.B.A. ELECTRONIC (WUXI) LTD. Country or region before: China |
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